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17f50f22 SR |
1 | /* |
2 | * (C) Copyright 2004-2005 | |
3 | * Wolfgang Denk, DENX Software Engineering, wd@denx.de. | |
4 | * | |
5 | * (C) Copyright 2002 Jun Gu <jung@artesyncp.com> | |
6 | * Add support for Am29F016D and dynamic switch setting. | |
7 | * | |
8 | * See file CREDITS for list of people who contributed to this | |
9 | * project. | |
10 | * | |
11 | * This program is free software; you can redistribute it and/or | |
12 | * modify it under the terms of the GNU General Public License as | |
13 | * published by the Free Software Foundation; either version 2 of | |
14 | * the License, or (at your option) any later version. | |
15 | * | |
16 | * This program is distributed in the hope that it will be useful, | |
17 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
18 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
19 | * GNU General Public License for more details. | |
20 | * | |
21 | * You should have received a copy of the GNU General Public License | |
22 | * along with this program; if not, write to the Free Software | |
23 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, | |
24 | * MA 02111-1307 USA | |
25 | */ | |
26 | ||
27 | /* | |
28 | * Modified 4/5/2001 | |
29 | * Wait for completion of each sector erase command issued | |
30 | * 4/5/2001 | |
31 | * Chris Hallinan - DS4.COM, Inc. - clh@net1plus.com | |
32 | */ | |
33 | ||
34 | #include <common.h> | |
35 | #include <ppc4xx.h> | |
36 | #include <asm/processor.h> | |
37 | #include <ppc440.h> | |
38 | #include "bamboo.h" | |
39 | ||
40 | #undef DEBUG | |
41 | ||
42 | #ifdef DEBUG | |
43 | #define DEBUGF(x...) printf(x) | |
44 | #else | |
45 | #define DEBUGF(x...) | |
46 | #endif /* DEBUG */ | |
47 | ||
48 | flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */ | |
49 | ||
50 | /* | |
51 | * Mark big flash bank (16 bit instead of 8 bit access) in address with bit 0 | |
52 | */ | |
53 | static unsigned long flash_addr_table[8][CFG_MAX_FLASH_BANKS] = { | |
54 | {0x87800001, 0xFFF00000, 0xFFF80000}, /* 0:boot from small flash */ | |
55 | {0x00000000, 0x00000000, 0x00000000}, /* 1:boot from pci 66 */ | |
56 | {0x00000000, 0x00000000, 0x00000000}, /* 2:boot from nand flash */ | |
57 | {0x87800000, 0x87880000, 0xFF800001}, /* 3:boot from big flash 33*/ | |
58 | {0x87800000, 0x87880000, 0xFF800001}, /* 4:boot from big flash 66*/ | |
59 | {0x00000000, 0x00000000, 0x00000000}, /* 5:boot from */ | |
60 | {0x00000000, 0x00000000, 0x00000000}, /* 6:boot from pci 66 */ | |
61 | {0x00000000, 0x00000000, 0x00000000}, /* 7:boot from */ | |
62 | }; | |
63 | ||
64 | /* | |
65 | * include common flash code (for amcc boards) | |
66 | */ | |
67 | #include "../common/flash.c" | |
68 | ||
69 | /*----------------------------------------------------------------------- | |
70 | * Functions | |
71 | */ | |
72 | static ulong flash_get_size(vu_long * addr, flash_info_t * info); | |
73 | static int write_word(flash_info_t * info, ulong dest, ulong data); | |
74 | ||
75 | /*----------------------------------------------------------------------- | |
76 | */ | |
77 | ||
78 | unsigned long flash_init(void) | |
79 | { | |
80 | unsigned long total_b = 0; | |
81 | unsigned long size_b[CFG_MAX_FLASH_BANKS]; | |
82 | unsigned short index = 0; | |
83 | int i; | |
84 | unsigned long val; | |
85 | unsigned long ebc_boot_size; | |
86 | unsigned long boot_selection; | |
87 | ||
88 | mfsdr(sdr_pstrp0, val); | |
89 | index = (val & SDR0_PSTRP0_BOOTSTRAP_MASK) >> 29; | |
90 | ||
91 | if ((index == 5) || (index == 7)) { | |
92 | /* | |
93 | * Boot Settings in IIC EEprom address 0xA8 or 0xA4 | |
94 | * Read Serial Device Strap Register1 in PPC440EP | |
95 | */ | |
96 | mfsdr(sdr_sdstp1, val); | |
97 | boot_selection = val & SDR0_SDSTP1_BOOT_SEL_MASK; | |
98 | ebc_boot_size = val & SDR0_SDSTP1_EBC_ROM_BS_MASK; | |
99 | ||
100 | switch(boot_selection) { | |
101 | case SDR0_SDSTP1_BOOT_SEL_EBC: | |
102 | switch(ebc_boot_size) { | |
103 | case SDR0_SDSTP1_EBC_ROM_BS_16BIT: | |
104 | index = 3; | |
105 | break; | |
106 | case SDR0_SDSTP1_EBC_ROM_BS_8BIT: | |
107 | index = 0; | |
108 | break; | |
109 | } | |
110 | break; | |
111 | ||
112 | case SDR0_SDSTP1_BOOT_SEL_PCI: | |
113 | index = 1; | |
114 | break; | |
115 | ||
116 | case SDR0_SDSTP1_BOOT_SEL_NDFC: | |
117 | index = 2; | |
118 | break; | |
119 | } | |
120 | } | |
121 | ||
122 | DEBUGF("\n"); | |
123 | DEBUGF("FLASH: Index: %d\n", index); | |
124 | ||
125 | /* Init: no FLASHes known */ | |
126 | for (i = 0; i < CFG_MAX_FLASH_BANKS; ++i) { | |
127 | flash_info[i].flash_id = FLASH_UNKNOWN; | |
128 | flash_info[i].sector_count = -1; | |
129 | flash_info[i].size = 0; | |
130 | ||
131 | /* check whether the address is 0 */ | |
132 | if (flash_addr_table[index][i] == 0) { | |
133 | continue; | |
134 | } | |
135 | ||
136 | /* call flash_get_size() to initialize sector address */ | |
137 | size_b[i] = flash_get_size((vu_long *) flash_addr_table[index][i], | |
138 | &flash_info[i]); | |
139 | flash_info[i].size = size_b[i]; | |
140 | if (flash_info[i].flash_id == FLASH_UNKNOWN) { | |
141 | printf("## Unknown FLASH on Bank %d - Size = 0x%08lx = %ld MB\n", | |
142 | i, size_b[i], size_b[i] << 20); | |
143 | flash_info[i].sector_count = -1; | |
144 | flash_info[i].size = 0; | |
145 | } | |
146 | ||
147 | /* Monitor protection ON by default */ | |
148 | (void)flash_protect(FLAG_PROTECT_SET, CFG_MONITOR_BASE, | |
149 | CFG_MONITOR_BASE + CFG_MONITOR_LEN - 1, | |
150 | &flash_info[i]); | |
151 | #if defined(CFG_ENV_IS_IN_FLASH) | |
152 | (void)flash_protect(FLAG_PROTECT_SET, CFG_ENV_ADDR, | |
153 | CFG_ENV_ADDR + CFG_ENV_SECT_SIZE - 1, | |
154 | &flash_info[i]); | |
155 | #if defined(CFG_ENV_IS_IN_FLASH) && defined(CFG_ENV_ADDR_REDUND) | |
156 | (void)flash_protect(FLAG_PROTECT_SET, CFG_ENV_ADDR_REDUND, | |
157 | CFG_ENV_ADDR_REDUND + CFG_ENV_SECT_SIZE - 1, | |
158 | &flash_info[i]); | |
159 | #endif | |
160 | #endif | |
161 | ||
162 | total_b += flash_info[i].size; | |
163 | } | |
164 | ||
165 | return total_b; | |
166 | } |