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Replace CONFIG_SYS_GBL_DATA_SIZE by auto-generated value
[people/ms/u-boot.git] / board / amcc / bluestone / init.S
CommitLineData
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1/*
2 * Copyright (c) 2010, Applied Micro Circuits Corporation
3 * Author: Tirumala R Marri <tmarri@apm.com>
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
25ddd1fb 24#include <asm-offsets.h>
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25#include <ppc_asm.tmpl>
26#include <config.h>
27#include <asm/mmu.h>
28#include <asm/ppc4xx.h>
29
30/**************************************************************************
31 * TLB TABLE
32 *
33 * This table is used by the cpu boot code to setup the initial tlb
34 * entries. Rather than make broad assumptions in the cpu source tree,
35 * this table lets each board set things up however they like.
36 *
37 * Pointer to the table is returned in r1
38 *
39 *************************************************************************/
40 .section .bootpg,"ax"
41 .globl tlbtab
42
43tlbtab:
44 tlbtab_start
45
46 /* TLB 0 */
47 tlbentry(CONFIG_SYS_BOOT_BASE_ADDR, SZ_16M, CONFIG_SYS_BOOT_BASE_ADDR,
48 4, AC_RWX | SA_G)
49
50 /* TLB-entry for init-ram in dcache (SA_I must be turned off!) */
51 tlbentry(CONFIG_SYS_INIT_RAM_ADDR, SZ_4K, CONFIG_SYS_INIT_RAM_ADDR,
52 0, AC_RWX | SA_G)
53
54 /* TLB-entry for OCM */
55 tlbentry(CONFIG_SYS_OCM_BASE, SZ_64K, 0x00040000, 4,
56 AC_RWX | SA_I)
57
58 /* TLB-entry for Local Configuration registers => peripherals */
59 tlbentry(CONFIG_SYS_PERIPHERAL_BASE, SZ_16K,
60 CONFIG_SYS_PERIPHERAL_BASE, 4, AC_RWX | SA_IG)
61 tlbtab_end