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rename CFG_ macros to CONFIG_SYS
[people/ms/u-boot.git] / board / amcc / common / flash.c
CommitLineData
0e6d798c 1/*
7ec25502 2 * (C) Copyright 2004-2005
0e6d798c
WD		 3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * (C) Copyright 2002 Jun Gu <jung@artesyncp.com>
6 * Add support for Am29F016D and dynamic switch setting.
7 *
8 * See file CREDITS for list of people who contributed to this
9 * project.
10 *
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License as
13 * published by the Free Software Foundation; either version 2 of
14 * the License, or (at your option) any later version.
15 *
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
24 * MA 02111-1307 USA
25 */
26
27/*
28 * Modified 4/5/2001
29 * Wait for completion of each sector erase command issued
30 * 4/5/2001
31 * Chris Hallinan - DS4.COM, Inc. - clh@net1plus.com
32 */
33
34#include <common.h>
35#include <ppc4xx.h>
36#include <asm/processor.h>
37
6d0f6bcf 38flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH chips */
0e6d798c 39
0e6d798c
WD		 40/*-----------------------------------------------------------------------
41 * Functions
42 */
0e6d798c 43static int write_word(flash_info_t * info, ulong dest, ulong data);
6d0f6bcf 44#ifdef CONFIG_SYS_FLASH_2ND_16BIT_DEV
17f50f22
SR		 45static int write_word_1(flash_info_t * info, ulong dest, ulong data);
46static int write_word_2(flash_info_t * info, ulong dest, ulong data);
47static int flash_erase_1(flash_info_t * info, int s_first, int s_last);
48static int flash_erase_2(flash_info_t * info, int s_first, int s_last);
49static ulong flash_get_size_1(vu_long * addr, flash_info_t * info);
50static ulong flash_get_size_2(vu_long * addr, flash_info_t * info);
51#endif
0e6d798c 52
0e6d798c
WD		 53void flash_print_info(flash_info_t * info)
54{
55 int i;
56 int k;
57 int size;
58 int erased;
59 volatile unsigned long *flash;
60
61 if (info->flash_id == FLASH_UNKNOWN) {
62 printf("missing or unknown FLASH type\n");
63 return;
64 }
65
66 switch (info->flash_id & FLASH_VENDMASK) {
67 case FLASH_MAN_AMD:
68 printf("AMD ");
69 break;
7ec25502
SR		 70 case FLASH_MAN_STM:
71 printf("STM ");
72 break;
0e6d798c
WD		 73 case FLASH_MAN_FUJ:
74 printf("FUJITSU ");
75 break;
76 case FLASH_MAN_SST:
77 printf("SST ");
78 break;
16850919 79 case FLASH_MAN_MX:
9ede3cc5
SR		 80 printf ("MACRONIX ");
81 break;
0e6d798c
WD		 82 default:
83 printf("Unknown Vendor ");
84 break;
85 }
86
87 switch (info->flash_id & FLASH_TYPEMASK) {
88 case FLASH_AM040:
89 printf("AM29F040 (512 Kbit, uniform sector size)\n");
90 break;
91 case FLASH_AM400B:
92 printf("AM29LV400B (4 Mbit, bottom boot sect)\n");
93 break;
94 case FLASH_AM400T:
95 printf("AM29LV400T (4 Mbit, top boot sector)\n");
96 break;
97 case FLASH_AM800B:
98 printf("AM29LV800B (8 Mbit, bottom boot sect)\n");
99 break;
100 case FLASH_AM800T:
101 printf("AM29LV800T (8 Mbit, top boot sector)\n");
102 break;
8a316c9b
SR		 103 case FLASH_AMD016:
104 printf("AM29F016D (16 Mbit, uniform sector size)\n");
105 break;
0e6d798c
WD		 106 case FLASH_AM160B:
107 printf("AM29LV160B (16 Mbit, bottom boot sect)\n");
108 break;
109 case FLASH_AM160T:
110 printf("AM29LV160T (16 Mbit, top boot sector)\n");
111 break;
112 case FLASH_AM320B:
113 printf("AM29LV320B (32 Mbit, bottom boot sect)\n");
114 break;
115 case FLASH_AM320T:
116 printf("AM29LV320T (32 Mbit, top boot sector)\n");
117 break;
8a316c9b 118 case FLASH_AM033C:
0e6d798c
WD		 119 printf("AM29LV033C (32 Mbit, top boot sector)\n");
120 break;
121 case FLASH_SST800A:
122 printf("SST39LF/VF800 (8 Mbit, uniform sector size)\n");
123 break;
124 case FLASH_SST160A:
125 printf("SST39LF/VF160 (16 Mbit, uniform sector size)\n");
126 break;
17f50f22
SR		 127 case FLASH_STMW320DT:
128 printf ("M29W320DT (32 M, top sector)\n");
129 break;
9ede3cc5
SR		 130 case FLASH_MXLV320T:
131 printf ("MXLV320T (32 Mbit, top sector)\n");
132 break;
0e6d798c
WD		 133 default:
134 printf("Unknown Chip Type\n");
135 break;
136 }
137
138 printf(" Size: %ld KB in %d Sectors\n",
139 info->size >> 10, info->sector_count);
140
141 printf(" Sector Start Addresses:");
142 for (i = 0; i < info->sector_count; ++i) {
143 /*
144 * Check if whole sector is erased
145 */
146 if (i != (info->sector_count - 1))
147 size = info->start[i + 1] - info->start[i];
148 else
149 size = info->start[0] + info->size - info->start[i];
150 erased = 1;
8a316c9b 151 flash = (volatile unsigned long *)info->start[i];
0e6d798c
WD		 152 size = size >> 2; /* divide by 4 for longword access */
153 for (k = 0; k < size; k++) {
154 if (*flash++ != 0xffffffff) {
155 erased = 0;
156 break;
157 }
158 }
159
160 if ((i % 5) == 0)
161 printf("\n ");
162 printf(" %08lX%s%s",
163 info->start[i],
164 erased ? " E" : " ", info->protect[i] ? "RO " : " ");
165 }
166 printf("\n");
167 return;
168}
169
0e6d798c
WD		 170
171/*
172 * The following code cannot be run from FLASH!
173 */
6d0f6bcf 174#ifdef CONFIG_SYS_FLASH_2ND_16BIT_DEV
0e6d798c 175static ulong flash_get_size(vu_long * addr, flash_info_t * info)
17f50f22
SR		 176{
177 /* bit 0 used for big flash marking */
178 if ((ulong)addr & 0x1) {
179 return flash_get_size_2((vu_long *)((ulong)addr & 0xfffffffe), info);
180 } else {
181 return flash_get_size_1(addr, info);
182 }
183}
184
185static ulong flash_get_size_1(vu_long * addr, flash_info_t * info)
186#else
187static ulong flash_get_size(vu_long * addr, flash_info_t * info)
188#endif
0e6d798c
WD		 189{
190 short i;
6d0f6bcf 191 CONFIG_SYS_FLASH_WORD_SIZE value;
0e6d798c 192 ulong base = (ulong) addr;
6d0f6bcf 193 volatile CONFIG_SYS_FLASH_WORD_SIZE *addr2 = (CONFIG_SYS_FLASH_WORD_SIZE *) addr;
0e6d798c 194
8a316c9b 195 DEBUGF("FLASH ADDR: %08x\n", (unsigned)addr);
0e6d798c
WD		 196
197 /* Write auto select command: read Manufacturer ID */
6d0f6bcf
JCPV		 198 addr2[CONFIG_SYS_FLASH_ADDR0] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00AA00AA;
199 addr2[CONFIG_SYS_FLASH_ADDR1] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00550055;
200 addr2[CONFIG_SYS_FLASH_ADDR0] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00900090;
0e6d798c
WD		 201 udelay(1000);
202
203 value = addr2[0];
204 DEBUGF("FLASH MANUFACT: %x\n", value);
205
206 switch (value) {
6d0f6bcf 207 case (CONFIG_SYS_FLASH_WORD_SIZE) AMD_MANUFACT:
0e6d798c
WD		 208 info->flash_id = FLASH_MAN_AMD;
209 break;
6d0f6bcf 210 case (CONFIG_SYS_FLASH_WORD_SIZE) FUJ_MANUFACT:
0e6d798c
WD		 211 info->flash_id = FLASH_MAN_FUJ;
212 break;
6d0f6bcf 213 case (CONFIG_SYS_FLASH_WORD_SIZE) SST_MANUFACT:
0e6d798c
WD		 214 info->flash_id = FLASH_MAN_SST;
215 break;
6d0f6bcf 216 case (CONFIG_SYS_FLASH_WORD_SIZE) STM_MANUFACT:
0e6d798c
WD		 217 info->flash_id = FLASH_MAN_STM;
218 break;
219 default:
220 info->flash_id = FLASH_UNKNOWN;
221 info->sector_count = 0;
222 info->size = 0;
8a316c9b 223 return (0); /* no or unknown flash */
0e6d798c
WD		 224 }
225
16850919 226 value = addr2[1]; /* device ID */
0e6d798c
WD		 227 DEBUGF("\nFLASH DEVICEID: %x\n", value);
228
229 switch (value) {
6d0f6bcf 230 case (CONFIG_SYS_FLASH_WORD_SIZE) AMD_ID_LV040B:
0e6d798c
WD		 231 info->flash_id += FLASH_AM040;
232 info->sector_count = 8;
16850919 233 info->size = 0x0080000; /* => 512 KiB */
0e6d798c 234 break;
8a316c9b 235
6d0f6bcf 236 case (CONFIG_SYS_FLASH_WORD_SIZE) AMD_ID_F040B:
0e6d798c
WD		 237 info->flash_id += FLASH_AM040;
238 info->sector_count = 8;
16850919 239 info->size = 0x0080000; /* => 512 KiB */
0e6d798c 240 break;
8a316c9b 241
6d0f6bcf 242 case (CONFIG_SYS_FLASH_WORD_SIZE) STM_ID_M29W040B:
7ec25502
SR		 243 info->flash_id += FLASH_AM040;
244 info->sector_count = 8;
16850919 245 info->size = 0x0080000; /* => 512 KiB */
7ec25502 246 break;
8a316c9b 247
6d0f6bcf 248 case (CONFIG_SYS_FLASH_WORD_SIZE) AMD_ID_F016D:
8a316c9b
SR		 249 info->flash_id += FLASH_AMD016;
250 info->sector_count = 32;
16850919
WD		 251 info->size = 0x00200000; /* => 2 MiB */
252 break;
8a316c9b 253
6d0f6bcf 254 case (CONFIG_SYS_FLASH_WORD_SIZE) AMD_ID_LV033C:
0e6d798c
WD		 255 info->flash_id += FLASH_AMDLV033C;
256 info->sector_count = 64;
16850919
WD		 257 info->size = 0x00400000; /* => 4 MiB */
258 break;
8a316c9b 259
6d0f6bcf 260 case (CONFIG_SYS_FLASH_WORD_SIZE) AMD_ID_LV400T:
8a316c9b
SR		 261 info->flash_id += FLASH_AM400T;
262 info->sector_count = 11;
16850919
WD		 263 info->size = 0x00080000; /* => 512 KiB */
264 break;
8a316c9b 265
6d0f6bcf 266 case (CONFIG_SYS_FLASH_WORD_SIZE) AMD_ID_LV400B:
8a316c9b
SR		 267 info->flash_id += FLASH_AM400B;
268 info->sector_count = 11;
16850919
WD		 269 info->size = 0x00080000; /* => 512 KiB */
270 break;
8a316c9b 271
6d0f6bcf 272 case (CONFIG_SYS_FLASH_WORD_SIZE) AMD_ID_LV800T:
8a316c9b
SR		 273 info->flash_id += FLASH_AM800T;
274 info->sector_count = 19;
16850919
WD		 275 info->size = 0x00100000; /* => 1 MiB */
276 break;
8a316c9b 277
6d0f6bcf 278 case (CONFIG_SYS_FLASH_WORD_SIZE) AMD_ID_LV800B:
8a316c9b
SR		 279 info->flash_id += FLASH_AM800B;
280 info->sector_count = 19;
16850919
WD		 281 info->size = 0x00100000; /* => 1 MiB */
282 break;
8a316c9b 283
6d0f6bcf 284 case (CONFIG_SYS_FLASH_WORD_SIZE) AMD_ID_LV160T:
8a316c9b
SR		 285 info->flash_id += FLASH_AM160T;
286 info->sector_count = 35;
16850919
WD		 287 info->size = 0x00200000; /* => 2 MiB */
288 break;
8a316c9b 289
6d0f6bcf 290 case (CONFIG_SYS_FLASH_WORD_SIZE) AMD_ID_LV160B:
8a316c9b
SR		 291 info->flash_id += FLASH_AM160B;
292 info->sector_count = 35;
16850919
WD		 293 info->size = 0x00200000; /* => 2 MiB */
294 break;
8a316c9b 295
0e6d798c
WD		 296 default:
297 info->flash_id = FLASH_UNKNOWN;
8a316c9b 298 return (0); /* => no or unknown flash */
0e6d798c
WD		 299 }
300
301 /* set up sector start address table */
302 if (((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST) ||
7ec25502
SR		 303 ((info->flash_id & FLASH_TYPEMASK) == FLASH_AM040) ||
304 ((info->flash_id & FLASH_TYPEMASK) == FLASH_AMD016)) {
0e6d798c
WD		 305 for (i = 0; i < info->sector_count; i++)
306 info->start[i] = base + (i * 0x00010000);
307 } else {
308 if (info->flash_id & FLASH_BTYPE) {
16850919 309 /* set sector offsets for bottom boot block type */
0e6d798c
WD		 310 info->start[0] = base + 0x00000000;
311 info->start[1] = base + 0x00004000;
312 info->start[2] = base + 0x00006000;
313 info->start[3] = base + 0x00008000;
314 for (i = 4; i < info->sector_count; i++) {
8a316c9b
SR		 315 info->start[i] =
316 base + (i * 0x00010000) - 0x00030000;
0e6d798c
WD		 317 }
318 } else {
16850919 319 /* set sector offsets for top boot block type */
0e6d798c
WD		 320 i = info->sector_count - 1;
321 info->start[i--] = base + info->size - 0x00004000;
322 info->start[i--] = base + info->size - 0x00006000;
323 info->start[i--] = base + info->size - 0x00008000;
324 for (; i >= 0; i--) {
325 info->start[i] = base + i * 0x00010000;
326 }
327 }
328 }
329
330 /* check for protected sectors */
331 for (i = 0; i < info->sector_count; i++) {
332 /* read sector protection at sector address, (A7 .. A0) = 0x02 */
333 /* D0 = 1 if protected */
6d0f6bcf 334 addr2 = (volatile CONFIG_SYS_FLASH_WORD_SIZE *)(info->start[i]);
8a316c9b
SR		 335
336 /* For AMD29033C flash we need to resend the command of *
337 * reading flash protection for upper 8 Mb of flash */
338 if (i == 32) {
6d0f6bcf
JCPV		 339 addr2[CONFIG_SYS_FLASH_ADDR0] = (CONFIG_SYS_FLASH_WORD_SIZE) 0xAAAAAAAA;
340 addr2[CONFIG_SYS_FLASH_ADDR1] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x55555555;
341 addr2[CONFIG_SYS_FLASH_ADDR0] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x90909090;
7ec25502
SR		 342 }
343
0e6d798c
WD		 344 if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST)
345 info->protect[i] = 0;
346 else
347 info->protect[i] = addr2[2] & 1;
348 }
349
a56bd922 350 /* issue bank reset to return to read mode */
6d0f6bcf 351 addr2[0] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00F000F0;
0e6d798c
WD		 352
353 return (info->size);
354}
355
17f50f22 356static int wait_for_DQ7_1(flash_info_t * info, int sect)
0e6d798c
WD		 357{
358 ulong start, now, last;
6d0f6bcf
JCPV		 359 volatile CONFIG_SYS_FLASH_WORD_SIZE *addr =
360 (CONFIG_SYS_FLASH_WORD_SIZE *) (info->start[sect]);
0e6d798c
WD		 361
362 start = get_timer(0);
363 last = start;
6d0f6bcf
JCPV		 364 while ((addr[0] & (CONFIG_SYS_FLASH_WORD_SIZE) 0x00800080) !=
365 (CONFIG_SYS_FLASH_WORD_SIZE) 0x00800080) {
366 if ((now = get_timer(start)) > CONFIG_SYS_FLASH_ERASE_TOUT) {
0e6d798c
WD		 367 printf("Timeout\n");
368 return -1;
369 }
370 /* show that we're waiting */
371 if ((now - last) > 1000) { /* every second */
372 putc('.');
373 last = now;
374 }
375 }
376 return 0;
377}
378
6d0f6bcf 379#ifdef CONFIG_SYS_FLASH_2ND_16BIT_DEV
17f50f22
SR		 380int flash_erase(flash_info_t * info, int s_first, int s_last)
381{
382 if (((info->flash_id & FLASH_TYPEMASK) == FLASH_AM320B) ||
383 ((info->flash_id & FLASH_TYPEMASK) == FLASH_AM320T) ||
9ede3cc5 384 ((info->flash_id & FLASH_TYPEMASK) == FLASH_MXLV320T) ||
17f50f22
SR		 385 ((info->flash_id & FLASH_TYPEMASK) == FLASH_STMW320DT)) {
386 return flash_erase_2(info, s_first, s_last);
387 } else {
388 return flash_erase_1(info, s_first, s_last);
389 }
390}
391
392static int flash_erase_1(flash_info_t * info, int s_first, int s_last)
393#else
0e6d798c 394int flash_erase(flash_info_t * info, int s_first, int s_last)
17f50f22 395#endif
0e6d798c 396{
6d0f6bcf
JCPV		 397 volatile CONFIG_SYS_FLASH_WORD_SIZE *addr = (CONFIG_SYS_FLASH_WORD_SIZE *) (info->start[0]);
398 volatile CONFIG_SYS_FLASH_WORD_SIZE *addr2;
0e6d798c
WD		 399 int flag, prot, sect, l_sect;
400 int i;
401
402 if ((s_first < 0) || (s_first > s_last)) {
403 if (info->flash_id == FLASH_UNKNOWN) {
404 printf("- missing\n");
405 } else {
406 printf("- no sectors to erase\n");
407 }
408 return 1;
409 }
410
411 if (info->flash_id == FLASH_UNKNOWN) {
412 printf("Can't erase unknown flash type - aborted\n");
413 return 1;
414 }
415
416 prot = 0;
417 for (sect = s_first; sect <= s_last; ++sect) {
418 if (info->protect[sect]) {
419 prot++;
420 }
421 }
422
423 if (prot) {
424 printf("- Warning: %d protected sectors will not be erased!\n",
425 prot);
426 } else {
427 printf("\n");
428 }
429
430 l_sect = -1;
431
432 /* Disable interrupts which might cause a timeout here */
433 flag = disable_interrupts();
434
435 /* Start erase on unprotected sectors */
436 for (sect = s_first; sect <= s_last; sect++) {
437 if (info->protect[sect] == 0) { /* not protected */
6d0f6bcf 438 addr2 = (CONFIG_SYS_FLASH_WORD_SIZE *) (info->start[sect]);
0e6d798c
WD		 439
440 if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST) {
6d0f6bcf
JCPV		 441 addr[CONFIG_SYS_FLASH_ADDR0] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00AA00AA;
442 addr[CONFIG_SYS_FLASH_ADDR1] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00550055;
443 addr[CONFIG_SYS_FLASH_ADDR0] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00800080;
444 addr[CONFIG_SYS_FLASH_ADDR0] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00AA00AA;
445 addr[CONFIG_SYS_FLASH_ADDR1] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00550055;
446 addr2[0] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00500050; /* block erase */
0e6d798c
WD		 447 for (i = 0; i < 50; i++)
448 udelay(1000); /* wait 1 ms */
449 } else {
6d0f6bcf
JCPV		 450 addr[CONFIG_SYS_FLASH_ADDR0] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00AA00AA;
451 addr[CONFIG_SYS_FLASH_ADDR1] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00550055;
452 addr[CONFIG_SYS_FLASH_ADDR0] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00800080;
453 addr[CONFIG_SYS_FLASH_ADDR0] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00AA00AA;
454 addr[CONFIG_SYS_FLASH_ADDR1] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00550055;
455 addr2[0] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00300030; /* sector erase */
0e6d798c
WD		 456 }
457 l_sect = sect;
458 /*
459 * Wait for each sector to complete, it's more
460 * reliable. According to AMD Spec, you must
461 * issue all erase commands within a specified
462 * timeout. This has been seen to fail, especially
463 * if printf()s are included (for debug)!!
464 */
17f50f22 465 wait_for_DQ7_1(info, sect);
0e6d798c
WD		 466 }
467 }
468
469 /* re-enable interrupts if necessary */
470 if (flag)
471 enable_interrupts();
472
473 /* wait at least 80us - let's wait 1 ms */
474 udelay(1000);
475
476 /* reset to read mode */
6d0f6bcf
JCPV		 477 addr = (CONFIG_SYS_FLASH_WORD_SIZE *) info->start[0];
478 addr[0] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00F000F0; /* reset bank */
0e6d798c
WD		 479
480 printf(" done\n");
481 return 0;
482}
483
484/*-----------------------------------------------------------------------
485 * Copy memory to flash, returns:
486 * 0 - OK
487 * 1 - write timeout
488 * 2 - Flash not erased
489 */
490int write_buff(flash_info_t * info, uchar * src, ulong addr, ulong cnt)
491{
492 ulong cp, wp, data;
493 int i, l, rc;
494
8a316c9b 495 wp = (addr & ~3); /* get lower word aligned address */
0e6d798c
WD		 496
497 /*
498 * handle unaligned start bytes
499 */
500 if ((l = addr - wp) != 0) {
501 data = 0;
8a316c9b
SR		 502 for (i = 0, cp = wp; i < l; ++i, ++cp) {
503 data = (data << 8) | (*(uchar *) cp);
504 }
505 for (; i < 4 && cnt > 0; ++i) {
506 data = (data << 8) | *src++;
507 --cnt;
508 ++cp;
509 }
510 for (; cnt == 0 && i < 4; ++i, ++cp) {
511 data = (data << 8) | (*(uchar *) cp);
512 }
513
514 if ((rc = write_word(info, wp, data)) != 0) {
515 return (rc);
516 }
517 wp += 4;
0e6d798c
WD		 518 }
519
520 /*
521 * handle word aligned part
522 */
523 while (cnt >= 4) {
524 data = 0;
525 for (i = 0; i < 4; ++i) {
526 data = (data << 8) | *src++;
527 }
528 if ((rc = write_word(info, wp, data)) != 0) {
529 return (rc);
530 }
531 wp += 4;
532 cnt -= 4;
533 }
534
535 if (cnt == 0) {
536 return (0);
537 }
538
539 /*
540 * handle unaligned tail bytes
541 */
542 data = 0;
543 for (i = 0, cp = wp; i < 4 && cnt > 0; ++i, ++cp) {
544 data = (data << 8) | *src++;
545 --cnt;
546 }
547 for (; i < 4; ++i, ++cp) {
548 data = (data << 8) | (*(uchar *) cp);
549 }
550
551 return (write_word(info, wp, data));
552}
553
554/*-----------------------------------------------------------------------
17f50f22 555 * Copy memory to flash, returns:
0e6d798c
WD		 556 * 0 - OK
557 * 1 - write timeout
558 * 2 - Flash not erased
559 */
6d0f6bcf 560#ifdef CONFIG_SYS_FLASH_2ND_16BIT_DEV
17f50f22
SR		 561static int write_word(flash_info_t * info, ulong dest, ulong data)
562{
563 if (((info->flash_id & FLASH_TYPEMASK) == FLASH_AM320B) ||
564 ((info->flash_id & FLASH_TYPEMASK) == FLASH_AM320T) ||
9ede3cc5 565 ((info->flash_id & FLASH_TYPEMASK) == FLASH_MXLV320T) ||
17f50f22
SR		 566 ((info->flash_id & FLASH_TYPEMASK) == FLASH_STMW320DT)) {
567 return write_word_2(info, dest, data);
568 } else {
569 return write_word_1(info, dest, data);
570 }
571}
572
573static int write_word_1(flash_info_t * info, ulong dest, ulong data)
574#else
0e6d798c 575static int write_word(flash_info_t * info, ulong dest, ulong data)
17f50f22
SR		 576#endif
577{
6d0f6bcf
JCPV		 578 volatile CONFIG_SYS_FLASH_WORD_SIZE *addr2 = (CONFIG_SYS_FLASH_WORD_SIZE *) (info->start[0]);
579 volatile CONFIG_SYS_FLASH_WORD_SIZE *dest2 = (CONFIG_SYS_FLASH_WORD_SIZE *) dest;
580 volatile CONFIG_SYS_FLASH_WORD_SIZE *data2 = (CONFIG_SYS_FLASH_WORD_SIZE *) & data;
17f50f22
SR		 581 ulong start;
582 int i;
583
584 /* Check if Flash is (sufficiently) erased */
585 if ((*((vu_long *)dest) & data) != data) {
586 return (2);
587 }
588
6d0f6bcf 589 for (i = 0; i < 4 / sizeof(CONFIG_SYS_FLASH_WORD_SIZE); i++) {
17f50f22
SR		 590 int flag;
591
592 /* Disable interrupts which might cause a timeout here */
593 flag = disable_interrupts();
594
6d0f6bcf
JCPV		 595 addr2[CONFIG_SYS_FLASH_ADDR0] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00AA00AA;
596 addr2[CONFIG_SYS_FLASH_ADDR1] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00550055;
597 addr2[CONFIG_SYS_FLASH_ADDR0] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00A000A0;
17f50f22
SR		 598
599 dest2[i] = data2[i];
600
601 /* re-enable interrupts if necessary */
602 if (flag)
603 enable_interrupts();
604
605 /* data polling for D7 */
606 start = get_timer(0);
6d0f6bcf
JCPV		 607 while ((dest2[i] & (CONFIG_SYS_FLASH_WORD_SIZE) 0x00800080) !=
608 (data2[i] & (CONFIG_SYS_FLASH_WORD_SIZE) 0x00800080)) {
17f50f22 609
6d0f6bcf 610 if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT) {
17f50f22
SR		 611 return (1);
612 }
613 }
614 }
615
616 return (0);
617}
618
6d0f6bcf 619#ifdef CONFIG_SYS_FLASH_2ND_16BIT_DEV
17f50f22 620
6d0f6bcf
JCPV		 621#undef CONFIG_SYS_FLASH_WORD_SIZE
622#define CONFIG_SYS_FLASH_WORD_SIZE unsigned short
17f50f22
SR		 623
624/*
625 * The following code cannot be run from FLASH!
626 */
627static ulong flash_get_size_2(vu_long * addr, flash_info_t * info)
628{
629 short i;
630 int n;
6d0f6bcf 631 CONFIG_SYS_FLASH_WORD_SIZE value;
17f50f22 632 ulong base = (ulong) addr;
6d0f6bcf 633 volatile CONFIG_SYS_FLASH_WORD_SIZE *addr2 = (CONFIG_SYS_FLASH_WORD_SIZE *) addr;
17f50f22
SR		 634
635 DEBUGF("FLASH ADDR: %08x\n", (unsigned)addr);
636
637 /* Write auto select command: read Manufacturer ID */
6d0f6bcf
JCPV		 638 addr2[CONFIG_SYS_FLASH_ADDR0] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00AA00AA;
639 addr2[CONFIG_SYS_FLASH_ADDR1] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00550055;
640 addr2[CONFIG_SYS_FLASH_ADDR0] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00900090;
17f50f22
SR		 641 udelay(1000);
642
643 value = addr2[0];
644 DEBUGF("FLASH MANUFACT: %x\n", value);
645
646 switch (value) {
6d0f6bcf 647 case (CONFIG_SYS_FLASH_WORD_SIZE) AMD_MANUFACT:
17f50f22
SR		 648 info->flash_id = FLASH_MAN_AMD;
649 break;
6d0f6bcf 650 case (CONFIG_SYS_FLASH_WORD_SIZE) FUJ_MANUFACT:
17f50f22
SR		 651 info->flash_id = FLASH_MAN_FUJ;
652 break;
6d0f6bcf 653 case (CONFIG_SYS_FLASH_WORD_SIZE) SST_MANUFACT:
17f50f22
SR		 654 info->flash_id = FLASH_MAN_SST;
655 break;
6d0f6bcf 656 case (CONFIG_SYS_FLASH_WORD_SIZE) STM_MANUFACT:
17f50f22
SR		 657 info->flash_id = FLASH_MAN_STM;
658 break;
6d0f6bcf 659 case (CONFIG_SYS_FLASH_WORD_SIZE) MX_MANUFACT:
9ede3cc5
SR		 660 info->flash_id = FLASH_MAN_MX;
661 break;
17f50f22
SR		 662 default:
663 info->flash_id = FLASH_UNKNOWN;
664 info->sector_count = 0;
665 info->size = 0;
666 return (0); /* no or unknown flash */
667 }
668
16850919 669 value = addr2[1]; /* device ID */
17f50f22
SR		 670
671 DEBUGF("\nFLASH DEVICEID: %x\n", value);
672
673 switch (value) {
674
6d0f6bcf 675 case (CONFIG_SYS_FLASH_WORD_SIZE)AMD_ID_LV320T:
17f50f22
SR		 676 info->flash_id += FLASH_AM320T;
677 info->sector_count = 71;
16850919 678 info->size = 0x00400000; break; /* => 4 MiB */
17f50f22 679
6d0f6bcf 680 case (CONFIG_SYS_FLASH_WORD_SIZE)AMD_ID_LV320B:
17f50f22
SR		 681 info->flash_id += FLASH_AM320B;
682 info->sector_count = 71;
16850919 683 info->size = 0x00400000; break; /* => 4 MiB */
17f50f22 684
6d0f6bcf 685 case (CONFIG_SYS_FLASH_WORD_SIZE)STM_ID_29W320DT:
17f50f22
SR		 686 info->flash_id += FLASH_STMW320DT;
687 info->sector_count = 67;
16850919 688 info->size = 0x00400000; break; /* => 4 MiB */
17f50f22 689
6d0f6bcf 690 case (CONFIG_SYS_FLASH_WORD_SIZE)MX_ID_LV320T:
9ede3cc5
SR		 691 info->flash_id += FLASH_MXLV320T;
692 info->sector_count = 71;
693 info->size = 0x00400000;
694 break; /* => 4 MB */
695
17f50f22
SR		 696 default:
697 info->flash_id = FLASH_UNKNOWN;
698 return (0); /* => no or unknown flash */
699 }
700
701 /* set up sector start address table */
702 if (((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST) ||
703 ((info->flash_id & FLASH_TYPEMASK) == FLASH_AM040) ||
704 ((info->flash_id & FLASH_TYPEMASK) == FLASH_AMD016)) {
705 for (i = 0; i < info->sector_count; i++)
706 info->start[i] = base + (i * 0x00010000);
707 } else if ((info->flash_id & FLASH_TYPEMASK) == FLASH_STMW320DT) {
708 /* set sector offsets for top boot block type */
709 base += info->size;
710 i = info->sector_count;
711 /* 1 x 16k boot sector */
712 base -= 16 << 10;
713 --i;
714 info->start[i] = base;
715 /* 2 x 8k boot sectors */
716 for (n=0; n<2; ++n) {
717 base -= 8 << 10;
718 --i;
719 info->start[i] = base;
720 }
721 /* 1 x 32k boot sector */
722 base -= 32 << 10;
723 --i;
724 info->start[i] = base;
725
726 while (i > 0) { /* 64k regular sectors */
727 base -= 64 << 10;
728 --i;
729 info->start[i] = base;
730 }
9ede3cc5
SR		 731 } else if ((info->flash_id & FLASH_TYPEMASK) == FLASH_MXLV320T) {
732 i = info->sector_count - 1;
733 info->start[i--] = base + info->size - 0x00002000;
734 info->start[i--] = base + info->size - 0x00004000;
735 info->start[i--] = base + info->size - 0x00006000;
736 info->start[i--] = base + info->size - 0x00008000;
737 info->start[i--] = base + info->size - 0x0000a000;
738 info->start[i--] = base + info->size - 0x0000c000;
739 info->start[i--] = base + info->size - 0x0000e000;
740 info->start[i--] = base + info->size - 0x00010000;
741
742 for (; i >= 0; i--)
743 info->start[i] = base + i * 0x00010000;
17f50f22
SR		 744 } else {
745 if (info->flash_id & FLASH_BTYPE) {
16850919 746 /* set sector offsets for bottom boot block type */
17f50f22 747 info->start[0] = base + 0x00000000;
d2f68006
EO		 748 info->start[1] = base + 0x00002000;
749 info->start[2] = base + 0x00004000;
750 info->start[3] = base + 0x00006000;
751 info->start[4] = base + 0x00008000;
752 info->start[5] = base + 0x0000a000;
753 info->start[6] = base + 0x0000c000;
754 info->start[7] = base + 0x0000e000;
755 for (i = 8; i < info->sector_count; i++) {
17f50f22 756 info->start[i] =
d2f68006 757 base + ((i-7) * 0x00010000);
17f50f22
SR		 758 }
759 } else {
16850919 760 /* set sector offsets for top boot block type */
17f50f22 761 i = info->sector_count - 1;
d2f68006 762 info->start[i--] = base + info->size - 0x00002000;
17f50f22
SR		 763 info->start[i--] = base + info->size - 0x00004000;
764 info->start[i--] = base + info->size - 0x00006000;
765 info->start[i--] = base + info->size - 0x00008000;
d2f68006
EO		 766 info->start[i--] = base + info->size - 0x0000a000;
767 info->start[i--] = base + info->size - 0x0000c000;
768 info->start[i--] = base + info->size - 0x0000e000;
17f50f22
SR		 769 for (; i >= 0; i--) {
770 info->start[i] = base + i * 0x00010000;
771 }
772 }
773 }
774
775 /* check for protected sectors */
776 for (i = 0; i < info->sector_count; i++) {
777 /* read sector protection at sector address, (A7 .. A0) = 0x02 */
778 /* D0 = 1 if protected */
6d0f6bcf 779 addr2 = (volatile CONFIG_SYS_FLASH_WORD_SIZE *)(info->start[i]);
17f50f22
SR		 780
781 /* For AMD29033C flash we need to resend the command of *
782 * reading flash protection for upper 8 Mb of flash */
783 if (i == 32) {
6d0f6bcf
JCPV		 784 addr2[CONFIG_SYS_FLASH_ADDR0] = (CONFIG_SYS_FLASH_WORD_SIZE) 0xAAAAAAAA;
785 addr2[CONFIG_SYS_FLASH_ADDR1] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x55555555;
786 addr2[CONFIG_SYS_FLASH_ADDR0] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x90909090;
17f50f22
SR		 787 }
788
789 if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST)
790 info->protect[i] = 0;
791 else
792 info->protect[i] = addr2[2] & 1;
793 }
794
795 /* issue bank reset to return to read mode */
6d0f6bcf 796 addr2[0] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00F000F0;
17f50f22
SR		 797
798 return (info->size);
799}
800
801static int wait_for_DQ7_2(flash_info_t * info, int sect)
802{
803 ulong start, now, last;
6d0f6bcf
JCPV		 804 volatile CONFIG_SYS_FLASH_WORD_SIZE *addr =
805 (CONFIG_SYS_FLASH_WORD_SIZE *) (info->start[sect]);
17f50f22
SR		 806
807 start = get_timer(0);
808 last = start;
6d0f6bcf
JCPV		 809 while ((addr[0] & (CONFIG_SYS_FLASH_WORD_SIZE) 0x00800080) !=
810 (CONFIG_SYS_FLASH_WORD_SIZE) 0x00800080) {
811 if ((now = get_timer(start)) > CONFIG_SYS_FLASH_ERASE_TOUT) {
17f50f22
SR		 812 printf("Timeout\n");
813 return -1;
814 }
815 /* show that we're waiting */
816 if ((now - last) > 1000) { /* every second */
817 putc('.');
818 last = now;
819 }
820 }
821 return 0;
822}
823
824static int flash_erase_2(flash_info_t * info, int s_first, int s_last)
825{
6d0f6bcf
JCPV		 826 volatile CONFIG_SYS_FLASH_WORD_SIZE *addr = (CONFIG_SYS_FLASH_WORD_SIZE *) (info->start[0]);
827 volatile CONFIG_SYS_FLASH_WORD_SIZE *addr2;
17f50f22
SR		 828 int flag, prot, sect, l_sect;
829 int i;
830
831 if ((s_first < 0) || (s_first > s_last)) {
832 if (info->flash_id == FLASH_UNKNOWN) {
833 printf("- missing\n");
834 } else {
835 printf("- no sectors to erase\n");
836 }
837 return 1;
838 }
839
840 if (info->flash_id == FLASH_UNKNOWN) {
841 printf("Can't erase unknown flash type - aborted\n");
842 return 1;
843 }
844
845 prot = 0;
846 for (sect = s_first; sect <= s_last; ++sect) {
847 if (info->protect[sect]) {
848 prot++;
849 }
850 }
851
852 if (prot) {
853 printf("- Warning: %d protected sectors will not be erased!\n",
854 prot);
855 } else {
856 printf("\n");
857 }
858
859 l_sect = -1;
860
861 /* Disable interrupts which might cause a timeout here */
862 flag = disable_interrupts();
863
864 /* Start erase on unprotected sectors */
865 for (sect = s_first; sect <= s_last; sect++) {
866 if (info->protect[sect] == 0) { /* not protected */
6d0f6bcf 867 addr2 = (CONFIG_SYS_FLASH_WORD_SIZE *) (info->start[sect]);
17f50f22
SR		 868
869 if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST) {
6d0f6bcf
JCPV		 870 addr[CONFIG_SYS_FLASH_ADDR0] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00AA00AA;
871 addr[CONFIG_SYS_FLASH_ADDR1] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00550055;
872 addr[CONFIG_SYS_FLASH_ADDR0] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00800080;
873 addr[CONFIG_SYS_FLASH_ADDR0] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00AA00AA;
874 addr[CONFIG_SYS_FLASH_ADDR1] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00550055;
875 addr2[0] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00500050; /* block erase */
17f50f22
SR		 876 for (i = 0; i < 50; i++)
877 udelay(1000); /* wait 1 ms */
878 } else {
6d0f6bcf
JCPV		 879 addr[CONFIG_SYS_FLASH_ADDR0] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00AA00AA;
880 addr[CONFIG_SYS_FLASH_ADDR1] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00550055;
881 addr[CONFIG_SYS_FLASH_ADDR0] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00800080;
882 addr[CONFIG_SYS_FLASH_ADDR0] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00AA00AA;
883 addr[CONFIG_SYS_FLASH_ADDR1] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00550055;
884 addr2[0] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00300030; /* sector erase */
17f50f22
SR		 885 }
886 l_sect = sect;
887 /*
888 * Wait for each sector to complete, it's more
889 * reliable. According to AMD Spec, you must
890 * issue all erase commands within a specified
891 * timeout. This has been seen to fail, especially
892 * if printf()s are included (for debug)!!
893 */
894 wait_for_DQ7_2(info, sect);
895 }
896 }
897
898 /* re-enable interrupts if necessary */
899 if (flag)
900 enable_interrupts();
901
902 /* wait at least 80us - let's wait 1 ms */
903 udelay(1000);
904
905 /* reset to read mode */
6d0f6bcf
JCPV		 906 addr = (CONFIG_SYS_FLASH_WORD_SIZE *) info->start[0];
907 addr[0] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00F000F0; /* reset bank */
17f50f22
SR		 908
909 printf(" done\n");
910 return 0;
911}
912
913static int write_word_2(flash_info_t * info, ulong dest, ulong data)
0e6d798c 914{
6d0f6bcf
JCPV		 915 volatile CONFIG_SYS_FLASH_WORD_SIZE *addr2 = (CONFIG_SYS_FLASH_WORD_SIZE *) (info->start[0]);
916 volatile CONFIG_SYS_FLASH_WORD_SIZE *dest2 = (CONFIG_SYS_FLASH_WORD_SIZE *) dest;
917 volatile CONFIG_SYS_FLASH_WORD_SIZE *data2 = (CONFIG_SYS_FLASH_WORD_SIZE *) & data;
0e6d798c
WD		 918 ulong start;
919 int i;
920
921 /* Check if Flash is (sufficiently) erased */
8a316c9b 922 if ((*((vu_long *)dest) & data) != data) {
0e6d798c
WD		 923 return (2);
924 }
925
6d0f6bcf 926 for (i = 0; i < 4 / sizeof(CONFIG_SYS_FLASH_WORD_SIZE); i++) {
0e6d798c
WD		 927 int flag;
928
929 /* Disable interrupts which might cause a timeout here */
930 flag = disable_interrupts();
931
6d0f6bcf
JCPV		 932 addr2[CONFIG_SYS_FLASH_ADDR0] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00AA00AA;
933 addr2[CONFIG_SYS_FLASH_ADDR1] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00550055;
934 addr2[CONFIG_SYS_FLASH_ADDR0] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00A000A0;
0e6d798c
WD		 935
936 dest2[i] = data2[i];
937
938 /* re-enable interrupts if necessary */
939 if (flag)
940 enable_interrupts();
941
942 /* data polling for D7 */
943 start = get_timer(0);
6d0f6bcf
JCPV		 944 while ((dest2[i] & (CONFIG_SYS_FLASH_WORD_SIZE) 0x00800080) !=
945 (data2[i] & (CONFIG_SYS_FLASH_WORD_SIZE) 0x00800080)) {
0e6d798c 946
6d0f6bcf 947 if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT) {
0e6d798c
WD		 948 return (1);
949 }
950 }
951 }
952
953 return (0);
954}
6d0f6bcf 955#endif /* CONFIG_SYS_FLASH_2ND_16BIT_DEV */
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