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565add12 UA |
1 | // SPDX-License-Identifier: GPL-2.0+ |
2 | /* | |
3 | * (C) Copyright 2020 Arm Limited | |
4 | * Usama Arif <usama.arif@arm.com> | |
5 | */ | |
6 | ||
d678a59d | 7 | #include <common.h> |
565add12 UA |
8 | #include <dm.h> |
9 | #include <dm/platform_data/serial_pl01x.h> | |
10 | #include <asm/armv8/mmu.h> | |
401d1c4f | 11 | #include <asm/global_data.h> |
565add12 | 12 | |
8a8d24bd | 13 | static const struct pl01x_serial_plat serial_plat = { |
565add12 UA |
14 | .base = UART0_BASE, |
15 | .type = TYPE_PL011, | |
f410d0ac | 16 | .clock = CFG_PL011_CLOCK, |
565add12 UA |
17 | }; |
18 | ||
20e442ab | 19 | U_BOOT_DRVINFO(total_compute_serials) = { |
565add12 | 20 | .name = "serial_pl01x", |
8a8d24bd | 21 | .plat = &serial_plat, |
565add12 UA |
22 | }; |
23 | ||
24 | static struct mm_region total_compute_mem_map[] = { | |
25 | { | |
26 | .virt = 0x0UL, | |
27 | .phys = 0x0UL, | |
28 | .size = 0x80000000UL, | |
29 | .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | | |
30 | PTE_BLOCK_NON_SHARE | | |
31 | PTE_BLOCK_PXN | PTE_BLOCK_UXN | |
32 | }, { | |
33 | .virt = 0x80000000UL, | |
34 | .phys = 0x80000000UL, | |
35 | .size = 0xff80000000UL, | |
36 | .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | | |
37 | PTE_BLOCK_INNER_SHARE | |
38 | }, { | |
39 | /* List terminator */ | |
40 | 0, | |
41 | } | |
42 | }; | |
43 | ||
44 | struct mm_region *mem_map = total_compute_mem_map; | |
45 | ||
46 | int board_init(void) | |
47 | { | |
48 | return 0; | |
49 | } | |
50 | ||
51 | int dram_init(void) | |
52 | { | |
53 | gd->ram_size = PHYS_SDRAM_1_SIZE; | |
54 | return 0; | |
55 | } | |
56 | ||
57 | int dram_init_banksize(void) | |
58 | { | |
59 | gd->bd->bi_dram[0].start = PHYS_SDRAM_1; | |
60 | gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; | |
61 | ||
b20b16a7 UA |
62 | gd->bd->bi_dram[1].start = PHYS_SDRAM_2; |
63 | gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE; | |
64 | ||
565add12 UA |
65 | return 0; |
66 | } | |
67 | ||
68 | /* Nothing to be done here as handled by PSCI interface */ | |
35b65dd8 | 69 | void reset_cpu(void) |
565add12 UA |
70 | { |
71 | } |