]>
Commit | Line | Data |
---|---|---|
fb6e1f1b LC |
1 | /* |
2 | * (C) Copyright 2011 Comelit Group SpA | |
3 | * Luca Ceresoli <luca.ceresoli@comelit.it> | |
4 | * | |
5 | * Based on board/ti/beagle/beagle.c: | |
6 | * (C) Copyright 2004-2008 | |
7 | * Texas Instruments, <www.ti.com> | |
8 | * | |
9 | * Author : | |
10 | * Sunil Kumar <sunilsaini05@gmail.com> | |
11 | * Shashi Ranjan <shashiranjanmca05@gmail.com> | |
12 | * | |
13 | * Derived from Beagle Board and 3430 SDP code by | |
14 | * Richard Woodruff <r-woodruff2@ti.com> | |
15 | * Syed Mohammed Khasim <khasim@ti.com> | |
16 | * | |
17 | * | |
18 | * See file CREDITS for list of people who contributed to this | |
19 | * project. | |
20 | * | |
21 | * This program is free software; you can redistribute it and/or | |
22 | * modify it under the terms of the GNU General Public License as | |
23 | * published by the Free Software Foundation; either version 2 of | |
24 | * the License, or (at your option) any later version. | |
25 | * | |
26 | * This program is distributed in the hope that it will be useful, | |
27 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
28 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
29 | * GNU General Public License for more details. | |
30 | * | |
31 | * You should have received a copy of the GNU General Public License | |
32 | * along with this program; if not, write to the Free Software | |
33 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, | |
34 | * MA 02111-1307 USA | |
35 | */ | |
36 | #include <common.h> | |
37 | #include <netdev.h> | |
38 | #include <twl4030.h> | |
39 | #include <asm/io.h> | |
eaff60d7 | 40 | #include <asm/arch/mmc_host_def.h> |
fb6e1f1b LC |
41 | #include <asm/arch/omap3-regs.h> |
42 | #include <asm/arch/mux.h> | |
43 | #include <asm/arch/mem.h> | |
44 | #include <asm/arch/sys_proto.h> | |
84c3b631 | 45 | #include <asm/gpio.h> |
fb6e1f1b LC |
46 | #include <asm/mach-types.h> |
47 | #include "dig297.h" | |
48 | ||
49 | DECLARE_GLOBAL_DATA_PTR; | |
50 | ||
51 | #ifdef CONFIG_CMD_NET | |
52 | static void setup_net_chip(void); | |
53 | ||
54 | #define NET_LAN9221_RESET_GPIO 12 | |
55 | ||
56 | /* GPMC CS 5 connected to an SMSC LAN9220 ethernet controller */ | |
57 | #define NET_LAN9220_GPMC_CONFIG1 (DEVICESIZE_16BIT) | |
58 | #define NET_LAN9220_GPMC_CONFIG2 (CSWROFFTIME(8) | \ | |
59 | CSRDOFFTIME(7) | \ | |
60 | ADVONTIME(1)) | |
61 | #define NET_LAN9220_GPMC_CONFIG3 (ADVWROFFTIME(2) | \ | |
62 | ADVRDOFFTIME(2) | \ | |
63 | ADVONTIME(1)) | |
64 | #define NET_LAN9220_GPMC_CONFIG4 (WEOFFTIME(8) | \ | |
65 | WEONTIME(1) | \ | |
66 | OEOFFTIME(7)| \ | |
67 | OEONTIME(1)) | |
68 | #define NET_LAN9220_GPMC_CONFIG5 (PAGEBURSTACCESSTIME(0) | \ | |
69 | RDACCESSTIME(6) | \ | |
70 | WRCYCLETIME(0x1D) | \ | |
71 | RDCYCLETIME(0x1D)) | |
72 | #define NET_LAN9220_GPMC_CONFIG6 ((1 << 31) | \ | |
73 | WRACCESSTIME(0x1D) | \ | |
74 | WRDATAONADMUXBUS(3)) | |
75 | ||
76 | static const u32 gpmc_lan_config[] = { | |
77 | NET_LAN9220_GPMC_CONFIG1, | |
78 | NET_LAN9220_GPMC_CONFIG2, | |
79 | NET_LAN9220_GPMC_CONFIG3, | |
80 | NET_LAN9220_GPMC_CONFIG4, | |
81 | NET_LAN9220_GPMC_CONFIG5, | |
82 | NET_LAN9220_GPMC_CONFIG6, | |
83 | /* CONFIG7: computed by enable_gpmc_cs_config() */ | |
84 | }; | |
85 | #endif /* CONFIG_CMD_NET */ | |
86 | ||
87 | /* | |
88 | * Routine: board_init | |
89 | * Description: Early hardware init. | |
90 | */ | |
91 | int board_init(void) | |
92 | { | |
93 | gpmc_init(); /* in SRAM or SDRAM, finish GPMC */ | |
fb6e1f1b LC |
94 | /* boot param addr */ |
95 | gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100); | |
96 | ||
97 | return 0; | |
98 | } | |
99 | ||
100 | /* | |
101 | * Routine: misc_init_r | |
102 | * Description: Configure board specific parts | |
103 | */ | |
104 | int misc_init_r(void) | |
105 | { | |
106 | struct gpio *gpio1_base = (struct gpio *)OMAP34XX_GPIO1_BASE; | |
107 | struct gpio *gpio5_base = (struct gpio *)OMAP34XX_GPIO5_BASE; | |
108 | ||
109 | twl4030_power_init(); | |
110 | twl4030_led_init(TWL4030_LED_LEDEN_LEDAON | TWL4030_LED_LEDEN_LEDBON); | |
111 | ||
112 | /* | |
113 | * GPIO list | |
114 | * - 159 OUT (GPIO5+31): reset for remote camera interface connector. | |
115 | * - 19 OUT (GPIO1+19): integrated speaker amplifier (1=on, 0=shdn). | |
116 | * - 20 OUT (GPIO1+20): handset amplifier (1=on, 0=shdn). | |
117 | */ | |
118 | ||
119 | /* Configure GPIOs to output */ | |
120 | writel(~(GPIO19 | GPIO20), &gpio1_base->oe); | |
121 | writel(~(GPIO31), &gpio5_base->oe); | |
122 | ||
123 | /* Set GPIO values */ | |
124 | writel((GPIO19 | GPIO20), &gpio1_base->setdataout); | |
125 | writel(0, &gpio5_base->setdataout); | |
126 | ||
127 | #if defined(CONFIG_CMD_NET) | |
128 | setup_net_chip(); | |
129 | #endif | |
130 | ||
131 | dieid_num_r(); | |
132 | ||
133 | return 0; | |
134 | } | |
135 | ||
136 | /* | |
137 | * Routine: set_muxconf_regs | |
138 | * Description: Setting up the configuration Mux registers specific to the | |
139 | * hardware. Many pins need to be moved from protect to primary | |
140 | * mode. | |
141 | */ | |
142 | void set_muxconf_regs(void) | |
143 | { | |
144 | MUX_DIG297(); | |
145 | } | |
146 | ||
eaff60d7 TR |
147 | #ifdef CONFIG_GENERIC_MMC |
148 | int board_mmc_init(bd_t *bis) | |
149 | { | |
bbbc1ae9 | 150 | omap_mmc_init(0, 0, 0); |
eaff60d7 TR |
151 | return 0; |
152 | } | |
153 | #endif | |
154 | ||
fb6e1f1b LC |
155 | #ifdef CONFIG_CMD_NET |
156 | /* | |
157 | * Routine: setup_net_chip | |
158 | * Description: Setting up the configuration GPMC registers specific to the | |
159 | * Ethernet hardware. | |
160 | */ | |
161 | static void setup_net_chip(void) | |
162 | { | |
163 | struct ctrl *ctrl_base = (struct ctrl *)OMAP34XX_CTRL_BASE; | |
164 | ||
165 | /* Configure GPMC registers */ | |
166 | enable_gpmc_cs_config(gpmc_lan_config, &gpmc_cfg->cs[5], | |
167 | CONFIG_SMC911X_BASE, GPMC_SIZE_16M); | |
168 | ||
169 | /* Enable off mode for NWE in PADCONF_GPMC_NWE register */ | |
170 | writew(readw(&ctrl_base->gpmc_nwe) | 0x0E00, &ctrl_base->gpmc_nwe); | |
171 | /* Enable off mode for NOE in PADCONF_GPMC_NADV_ALE register */ | |
172 | writew(readw(&ctrl_base->gpmc_noe) | 0x0E00, &ctrl_base->gpmc_noe); | |
173 | /* Enable off mode for ALE in PADCONF_GPMC_NADV_ALE register */ | |
174 | writew(readw(&ctrl_base->gpmc_nadv_ale) | 0x0E00, | |
175 | &ctrl_base->gpmc_nadv_ale); | |
176 | ||
177 | /* Make GPIO 12 as output pin and send a magic pulse through it */ | |
84c3b631 SP |
178 | if (!gpio_request(NET_LAN9221_RESET_GPIO, "")) { |
179 | gpio_direction_output(NET_LAN9221_RESET_GPIO, 0); | |
180 | gpio_set_value(NET_LAN9221_RESET_GPIO, 1); | |
fb6e1f1b | 181 | udelay(1); |
84c3b631 | 182 | gpio_set_value(NET_LAN9221_RESET_GPIO, 0); |
fb6e1f1b | 183 | udelay(31000); /* Should be >= 30ms according to datasheet */ |
84c3b631 | 184 | gpio_set_value(NET_LAN9221_RESET_GPIO, 1); |
fb6e1f1b LC |
185 | } |
186 | } | |
187 | #endif /* CONFIG_CMD_NET */ | |
188 | ||
189 | int board_eth_init(bd_t *bis) | |
190 | { | |
191 | int rc = 0; | |
192 | rc = smc911x_initialize(0, CONFIG_SMC911X_BASE); | |
193 | return rc; | |
194 | } |