]> git.ipfire.org Git - people/ms/u-boot.git/blame - board/cray/L1/L1.c
rename CFG_ macros to CONFIG_SYS
[people/ms/u-boot.git] / board / cray / L1 / L1.c
CommitLineData
47d1a6e1
WD
1/*
2 * (C) Copyright 2000
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24#include <common.h>
25#include <asm/processor.h>
79b2d0bb 26#include <4xx_i2c.h>
47d1a6e1 27#include <command.h>
47d1a6e1 28#include <rtc.h>
7f70e853 29#include <post.h>
47d1a6e1
WD
30#include <net.h>
31#include <malloc.h>
32
33#define L1_MEMSIZE (32*1024*1024)
34
35/* the std. DHCP stufff */
36#define DHCP_ROUTER 3
37#define DHCP_NETMASK 1
38#define DHCP_BOOTFILE 67
39#define DHCP_ROOTPATH 17
40#define DHCP_HOSTNAME 12
41
42/* some extras used by CRAY
43 *
44 * on the server this looks like:
45 *
46 * option L1-initrd-image code 224 = string;
47 * option L1-initrd-image "/opt/craysv2/craymcu/l1/flash/initrd.image"
48 */
49#define DHCP_L1_INITRD 224
50
51/* new, [better?] way via official vendor-extensions, defining an option
52 * space.
53 * on the server this looks like:
54 *
7f70e853
WD
55 * option space CRAYL1;
56 * option CRAYL1.initrd code 3 = string;
57 * ..etc...
47d1a6e1
WD
58 */
59#define DHCP_VENDOR_SPECX 43
60#define DHCP_VX_INITRD 3
61#define DHCP_VX_BOOTCMD 4
7f70e853 62#define DHCP_VX_BOOTARGS 5
47d1a6e1 63#define DHCP_VX_ROOTDEV 6
7f70e853
WD
64#define DHCP_VX_FROMFLASH 7
65#define DHCP_VX_BOOTSCRIPT 8
66#define DHCP_VX_RCFILE 9
67#define DHCP_VX_MAGIC 10
47d1a6e1
WD
68
69/* Things DHCP server can tellme about. If there's no flash address, then
70 * they dont participate in 'update' to flash, and we force their values
71 * back to '0' every boot to be sure to get them fresh from DHCP. Yes, I
72 * know this is a pain...
73 *
74 * If I get no bootfile, boot from flash. If rootpath, use that. If no
75 * rootpath use initrd in flash.
76 */
77typedef struct dhcp_item_s {
78 u8 dhcp_option;
79 u8 dhcp_vendor_option;
80 char *dhcpvalue;
81 char *envname;
82} dhcp_item_t;
83static dhcp_item_t Things[] = {
84 {DHCP_ROUTER, 0, NULL, "gateway"},
85 {DHCP_NETMASK, 0, NULL, "netmask"},
86 {DHCP_BOOTFILE, 0, NULL, "bootfile"},
87 {DHCP_ROOTPATH, 0, NULL, "rootpath"},
88 {DHCP_HOSTNAME, 0, NULL, "hostname"},
89 {DHCP_L1_INITRD, 0, NULL, "initrd"},
90/* and the other way.. */
91 {DHCP_VENDOR_SPECX, DHCP_VX_INITRD, NULL, "initrd"},
92 {DHCP_VENDOR_SPECX, DHCP_VX_BOOTCMD, NULL, "bootcmd"},
7f70e853
WD
93 {DHCP_VENDOR_SPECX, DHCP_VX_FROMFLASH, NULL, "fromflash"},
94 {DHCP_VENDOR_SPECX, DHCP_VX_BOOTSCRIPT, NULL, "bootscript"},
95 {DHCP_VENDOR_SPECX, DHCP_VX_RCFILE, NULL, "rcfile"},
96 {DHCP_VENDOR_SPECX, DHCP_VX_BOOTARGS, NULL, "xbootargs"},
47d1a6e1 97 {DHCP_VENDOR_SPECX, DHCP_VX_ROOTDEV, NULL, NULL},
7f70e853 98 {DHCP_VENDOR_SPECX, DHCP_VX_MAGIC, NULL, NULL}
47d1a6e1
WD
99};
100
101#define N_THINGS ((sizeof(Things))/(sizeof(dhcp_item_t)))
102
7f70e853
WD
103extern char bootscript[];
104
105/* Here is the boot logic as HUSH script. Overridden by any TFP provided
106 * bootscript file.
107 */
108
109static void init_sdram (void);
47d1a6e1
WD
110
111/* ------------------------------------------------------------------------- */
c837dcb1 112int board_early_init_f (void)
47d1a6e1 113{
7f70e853
WD
114 /* Running from ROM: global data is still READONLY */
115 init_sdram ();
47d1a6e1
WD
116 mtdcr (uicsr, 0xFFFFFFFF); /* clear all ints */
117 mtdcr (uicer, 0x00000000); /* disable all ints */
118 mtdcr (uiccr, 0x00000020); /* set all but FPGA SMI to be non-critical */
119 mtdcr (uicpr, 0xFFFFFFE0); /* set int polarities */
120 mtdcr (uictr, 0x10000000); /* set int trigger levels */
121 mtdcr (uicvcr, 0x00000001); /* set vect base=0,INT0 highest priority */
122 mtdcr (uicsr, 0xFFFFFFFF); /* clear all ints */
123 return 0;
124}
125
126/* ------------------------------------------------------------------------- */
127int checkboard (void)
128{
129 return (0);
130}
7f70e853 131/* ------------------------------------------------------------------------- */
47d1a6e1
WD
132
133/* ------------------------------------------------------------------------- */
134int misc_init_r (void)
135{
77ddac94 136 char *s, *e;
47d1a6e1
WD
137 image_header_t *hdr;
138 time_t timestamp;
139 struct rtc_time tm;
7f70e853 140 char bootcmd[32];
47d1a6e1 141
6d0f6bcf 142 hdr = (image_header_t *) (CONFIG_SYS_MONITOR_BASE - image_get_header_size ());
d5934ad7 143#if defined(CONFIG_FIT)
9a4daad0 144 if (genimg_get_format ((void *)hdr) != IMAGE_FORMAT_LEGACY) {
d5934ad7
MB
145 puts ("Non legacy image format not supported\n");
146 return -1;
147 }
148#endif
149
b97a2a0a 150 timestamp = (time_t)image_get_time (hdr);
47d1a6e1
WD
151 to_tm (timestamp, &tm);
152 printf ("Welcome to U-Boot on Cray L1. Compiled %4d-%02d-%02d %2d:%02d:%02d (UTC)\n", tm.tm_year, tm.tm_mon, tm.tm_mday, tm.tm_hour, tm.tm_min, tm.tm_sec);
153
154#define FACTORY_SETTINGS 0xFFFC0000
155 if ((s = getenv ("ethaddr")) == NULL) {
77ddac94 156 e = (char *) (FACTORY_SETTINGS);
47d1a6e1
WD
157 if (*(e + 0) != '0'
158 || *(e + 1) != '0'
159 || *(e + 2) != ':'
160 || *(e + 3) != '4' || *(e + 4) != '0' || *(e + 17) != '\0') {
161 printf ("No valid MAC address in flash location 0x3C0000!\n");
162 } else {
163 printf ("Factory MAC: %s\n", e);
164 setenv ("ethaddr", e);
165 }
166 }
7f70e853
WD
167 sprintf (bootcmd,"autoscript %X",(unsigned)bootscript);
168 setenv ("bootcmd", bootcmd);
47d1a6e1
WD
169 return (0);
170}
171
172/* ------------------------------------------------------------------------- */
9973e3c6 173phys_size_t initdram (int board_type)
47d1a6e1
WD
174{
175 return (L1_MEMSIZE);
176}
177
178/* ------------------------------------------------------------------------- */
179/* stubs so we can print dates w/o any nvram RTC.*/
b73a19e1 180int rtc_get (struct rtc_time *tmp)
47d1a6e1 181{
b73a19e1 182 return 0;
47d1a6e1 183}
d1e23194 184int rtc_set (struct rtc_time *tmp)
47d1a6e1 185{
d1e23194 186 return 0;
47d1a6e1
WD
187}
188void rtc_reset (void)
189{
190 return;
191}
192
193/* ------------------------------------------------------------------------- */
7f70e853 194/* Do sdram bank init in C so I can read it..no console to print to yet!
47d1a6e1 195 */
7f70e853 196static void init_sdram (void)
47d1a6e1 197{
7f70e853 198 unsigned long tmp;
47d1a6e1
WD
199
200 /* write SDRAM bank 0 register */
201 mtdcr (memcfga, mem_mb0cf);
202 mtdcr (memcfgd, 0x00062001);
203
204/* Set the SDRAM Timing reg, SDTR1 and the refresh timer reg, RTR. */
205/* To set the appropriate timings, we need to know the SDRAM speed. */
206/* We can use the PLB speed since the SDRAM speed is the same as */
207/* the PLB speed. The PLB speed is the FBK divider times the */
208/* 405GP reference clock, which on the L1 is 25Mhz. */
209/* Thus, if FBK div is 2, SDRAM is 50Mhz; if FBK div is 3, SDRAM is */
210/* 150Mhz; if FBK is 3, SDRAM is 150Mhz. */
211
212 /* divisor = ((mfdcr(strap)>> 28) & 0x3); */
213
214/* write SDRAM timing for 100Mhz. */
215 mtdcr (memcfga, mem_sdtr1);
216 mtdcr (memcfgd, 0x0086400D);
217
218/* write SDRAM refresh interval register */
219 mtdcr (memcfga, mem_rtr);
220 mtdcr (memcfgd, 0x05F00000);
221 udelay (200);
222
223/* sdram controller.*/
224 mtdcr (memcfga, mem_mcopt1);
225 mtdcr (memcfgd, 0x90800000);
226 udelay (200);
227
7f70e853
WD
228/* initially, disable ECC on all banks */
229 udelay (200);
47d1a6e1
WD
230 mtdcr (memcfga, mem_ecccf);
231 tmp = mfdcr (memcfgd);
232 tmp &= 0xff0fffff;
233 mtdcr (memcfga, mem_ecccf);
234 mtdcr (memcfgd, tmp);
235
7f70e853
WD
236 return;
237}
238
239extern int memory_post_test (int flags);
240
241int testdram (void)
242{
243 unsigned long tmp;
244 uint *pstart = (uint *) 0x00000000;
245 uint *pend = (uint *) L1_MEMSIZE;
246 uint *p;
247
248 if (getenv_r("booted",NULL,0) <= 0)
249 {
250 printf ("testdram..");
251 /*AA*/
252 for (p = pstart; p < pend; p++)
253 *p = 0xaaaaaaaa;
254 for (p = pstart; p < pend; p++) {
255 if (*p != 0xaaaaaaaa) {
8bde7f77 256 printf ("SDRAM test fails at: %08x, was %08x expected %08x\n",
7f70e853
WD
257 (uint) p, *p, 0xaaaaaaaa);
258 return 1;
259 }
260 }
261 /*55*/
262 for (p = pstart; p < pend; p++)
263 *p = 0x55555555;
264 for (p = pstart; p < pend; p++) {
265 if (*p != 0x55555555) {
8bde7f77 266 printf ("SDRAM test fails at: %08x, was %08x expected %08x\n",
7f70e853
WD
267 (uint) p, *p, 0x55555555);
268 return 1;
269 }
270 }
271 /*addr*/
272 for (p = pstart; p < pend; p++)
273 *p = (unsigned)p;
274 for (p = pstart; p < pend; p++) {
275 if (*p != (unsigned)p) {
8bde7f77 276 printf ("SDRAM test fails at: %08x, was %08x expected %08x\n",
7f70e853
WD
277 (uint) p, *p, (uint)p);
278 return 1;
279 }
280 }
281 printf ("Success. ");
282 }
283 printf ("Enable ECC..");
284
47d1a6e1
WD
285 mtdcr (memcfga, mem_mcopt1);
286 tmp = (mfdcr (memcfgd) & ~0xFFE00000) | 0x90800000;
287 mtdcr (memcfga, mem_mcopt1);
288 mtdcr (memcfgd, tmp);
289 udelay (600);
7f70e853
WD
290 for (p = (unsigned long) 0; ((unsigned long) p < L1_MEMSIZE); *p++ = 0L)
291 ;
47d1a6e1
WD
292 udelay (400);
293 mtdcr (memcfga, mem_ecccf);
294 tmp = mfdcr (memcfgd);
47d1a6e1
WD
295 tmp |= 0x00800000;
296 mtdcr (memcfgd, tmp);
297 udelay (400);
7f70e853
WD
298 printf ("enabled.\n");
299 return (0);
47d1a6e1
WD
300}
301
302/* ------------------------------------------------------------------------- */
303static u8 *dhcp_env_update (u8 thing, u8 * pop)
304{
305 u8 i, oplen;
306
307 oplen = *(pop + 1);
308
309 if ((Things[thing].dhcpvalue = malloc (oplen)) == NULL) {
310 printf ("Whoops! failed to malloc space for DHCP thing %s\n",
311 Things[thing].envname);
312 return NULL;
313 }
314 for (i = 0; (i < oplen); i++)
315 if ((*(Things[thing].dhcpvalue + i) = *(pop + 2 + i)) == ' ')
316 break;
317 *(Things[thing].dhcpvalue + i) = '\0';
318
319/* set env. */
320 if (Things[thing].envname)
7f70e853 321 {
47d1a6e1 322 setenv (Things[thing].envname, Things[thing].dhcpvalue);
7f70e853 323 }
77ddac94 324 return ((u8 *)(Things[thing].dhcpvalue));
47d1a6e1
WD
325}
326
327/* ------------------------------------------------------------------------- */
328u8 *dhcp_vendorex_prep (u8 * e)
329{
330 u8 thing;
331
332/* ask for the things I want. */
333 *e++ = 55; /* Parameter Request List */
334 *e++ = N_THINGS;
335 for (thing = 0; thing < N_THINGS; thing++)
336 *e++ = Things[thing].dhcp_option;
337 *e++ = 255;
338
339 return e;
340}
341
342/* ------------------------------------------------------------------------- */
343/* .. return NULL means it wasnt mine, non-null means I got it..*/
344u8 *dhcp_vendorex_proc (u8 * pop)
345{
346 u8 oplen, *sub_op, sub_oplen, *retval;
347 u8 thing = 0;
348
349 retval = NULL;
350 oplen = *(pop + 1);
351/* if pop is vender spec indicator, there are sub-options. */
352 if (*pop == DHCP_VENDOR_SPECX) {
353 for (sub_op = pop + 2;
354 oplen && (sub_oplen = *(sub_op + 1));
355 oplen -= sub_oplen, sub_op += (sub_oplen + 2)) {
356 for (thing = 0; thing < N_THINGS; thing++) {
357 if (*sub_op == Things[thing].dhcp_vendor_option) {
7f70e853
WD
358 if (!(retval = dhcp_env_update (thing, sub_op))) {
359 return NULL;
360 }
47d1a6e1
WD
361 }
362 }
363 }
364 } else {
365 for (thing = 0; thing < N_THINGS; thing++) {
366 if (*pop == Things[thing].dhcp_option)
367 if (!(retval = dhcp_env_update (thing, pop)))
368 return NULL;
369 }
370 }
7f70e853 371 return (pop);
47d1a6e1 372}