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7ebf7443 WD |
1 | /* |
2 | * (C) Copyright 2002 ELTEC Elektronik AG | |
3 | * Frank Gottschling <fgottschling@eltec.de> | |
4 | * | |
5 | * See file CREDITS for list of people who contributed to this | |
6 | * project. | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or | |
9 | * modify it under the terms of the GNU General Public License as | |
10 | * published by the Free Software Foundation; either version 2 of | |
11 | * the License, or (at your option) any later version. | |
12 | * | |
13 | * This program is distributed in the hope that it will be useful, | |
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | * GNU General Public License for more details. | |
17 | * | |
18 | * You should have received a copy of the GNU General Public License | |
19 | * along with this program; if not, write to the Free Software | |
20 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, | |
21 | * MA 02111-1307 USA | |
22 | */ | |
23 | ||
24 | #include <common.h> | |
25 | #include <command.h> | |
26 | #include <mpc106.h> | |
27 | #include <video_fb.h> | |
10efa024 | 28 | #include <netdev.h> |
7ebf7443 | 29 | |
d87080b7 WD |
30 | DECLARE_GLOBAL_DATA_PTR; |
31 | ||
7ebf7443 WD |
32 | /* ------------------------------------------------------------------------- */ |
33 | ||
34 | int checkboard (void) | |
35 | { | |
8bde7f77 WD |
36 | puts ("Board: ELTEC PowerPC\n"); |
37 | return (0); | |
7ebf7443 WD |
38 | } |
39 | ||
40 | /* ------------------------------------------------------------------------- */ | |
41 | ||
42 | int checkflash (void) | |
43 | { | |
8bde7f77 WD |
44 | /* TODO */ |
45 | printf ("Test not implemented !\n"); | |
46 | return (0); | |
7ebf7443 WD |
47 | } |
48 | ||
49 | /* ------------------------------------------------------------------------- */ | |
50 | ||
51 | static unsigned int mpc106_read_cfg_dword (unsigned int reg) | |
52 | { | |
8bde7f77 | 53 | unsigned int reg_addr = MPC106_REG | (reg & 0xFFFFFFFC); |
7ebf7443 | 54 | |
8bde7f77 | 55 | out32r (MPC106_REG_ADDR, reg_addr); |
7ebf7443 | 56 | |
8bde7f77 | 57 | return (in32r (MPC106_REG_DATA | (reg & 0x3))); |
7ebf7443 WD |
58 | } |
59 | ||
60 | /* ------------------------------------------------------------------------- */ | |
61 | ||
62 | long int dram_size (int board_type) | |
63 | { | |
8bde7f77 WD |
64 | /* |
65 | * No actual initialisation to do - done when setting up | |
66 | * PICRs MCCRs ME/SARs etc in asm_init.S. | |
67 | */ | |
7ebf7443 | 68 | |
8bde7f77 | 69 | register unsigned long i, msar1, mear1, memSize; |
7ebf7443 | 70 | |
6d0f6bcf | 71 | #if defined(CONFIG_SYS_MEMTEST) |
8bde7f77 | 72 | register unsigned long reg; |
7ebf7443 | 73 | |
8bde7f77 | 74 | printf ("Testing DRAM\n"); |
7ebf7443 | 75 | |
8bde7f77 | 76 | /* write each mem addr with it's address */ |
6d0f6bcf | 77 | for (reg = CONFIG_SYS_MEMTEST_START; reg < CONFIG_SYS_MEMTEST_END; reg += 4) |
8bde7f77 | 78 | *reg = reg; |
7ebf7443 | 79 | |
6d0f6bcf | 80 | for (reg = CONFIG_SYS_MEMTEST_START; reg < CONFIG_SYS_MEMTEST_END; reg += 4) { |
8bde7f77 WD |
81 | if (*reg != reg) |
82 | return -1; | |
83 | } | |
7ebf7443 WD |
84 | #endif |
85 | ||
8bde7f77 WD |
86 | /* |
87 | * Since MPC107 memory controller chip has already been set to | |
88 | * control all memory, just read and interpret its memory boundery register. | |
89 | */ | |
90 | memSize = 0; | |
91 | msar1 = mpc106_read_cfg_dword (MPC106_MSAR1); | |
92 | mear1 = mpc106_read_cfg_dword (MPC106_MEAR1); | |
93 | i = mpc106_read_cfg_dword (MPC106_MBER) & 0xf; | |
94 | ||
95 | do { | |
96 | if (i & 0x01) /* is bank enabled ? */ | |
97 | memSize += (mear1 & 0xff) - (msar1 & 0xff) + 1; | |
98 | msar1 >>= 8; | |
99 | mear1 >>= 8; | |
100 | i >>= 1; | |
101 | } while (i); | |
102 | ||
103 | return (memSize * 0x100000); | |
7ebf7443 | 104 | } |
8bde7f77 | 105 | |
7ebf7443 WD |
106 | /* ------------------------------------------------------------------------- */ |
107 | ||
9973e3c6 | 108 | phys_size_t initdram (int board_type) |
7ebf7443 | 109 | { |
8bde7f77 | 110 | return dram_size (board_type); |
7ebf7443 WD |
111 | } |
112 | ||
113 | /* ------------------------------------------------------------------------- */ | |
114 | ||
115 | /* | |
116 | * The BAB 911 can be reset by writing bit 0 of the Processor Initialization | |
117 | * Register PI in the MPC 107 (at offset 0x41090 of the Embedded Utilities | |
118 | * Memory Block). | |
119 | */ | |
8bde7f77 | 120 | int do_reset (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) |
7ebf7443 | 121 | { |
8bde7f77 WD |
122 | out8 (MPC107_EUMB_PI, 1); |
123 | return (0); | |
7ebf7443 WD |
124 | } |
125 | ||
126 | /* ------------------------------------------------------------------------- */ | |
127 | ||
128 | #if defined(CONFIG_WATCHDOG) | |
129 | ||
130 | /* | |
131 | * Since the 7xx CPUs don't have an internal watchdog, this function is | |
132 | * board specific. | |
133 | */ | |
8bde7f77 | 134 | void watchdog_reset (void) |
7ebf7443 WD |
135 | { |
136 | } | |
8bde7f77 | 137 | #endif /* CONFIG_WATCHDOG */ |
7ebf7443 WD |
138 | |
139 | /* ------------------------------------------------------------------------- */ | |
140 | ||
141 | void after_reloc (ulong dest_addr) | |
142 | { | |
8bde7f77 WD |
143 | /* |
144 | * Jump to the main U-Boot board init code | |
145 | */ | |
27b207fd | 146 | board_init_r ((gd_t *)gd, dest_addr); |
7ebf7443 WD |
147 | } |
148 | ||
149 | /* ------------------------------------------------------------------------- */ | |
150 | ||
151 | #ifdef CONFIG_CONSOLE_EXTRA_INFO | |
152 | extern GraphicDevice smi; | |
153 | ||
154 | void video_get_info_str (int line_number, char *info) | |
155 | { | |
8bde7f77 WD |
156 | /* init video info strings for graphic console */ |
157 | switch (line_number) { | |
158 | case 1: | |
159 | sprintf (info, " MPC7xx V%d.%d at %d / %d MHz", | |
160 | (get_pvr () >> 8) & 0xFF, get_pvr () & 0xFF, 400, 100); | |
161 | return; | |
162 | case 2: | |
163 | sprintf (info, " ELTEC ELPPC with %ld MB DRAM and %ld MB FLASH", | |
164 | dram_size (0) / 0x100000, flash_init () / 0x100000); | |
165 | return; | |
166 | case 3: | |
167 | sprintf (info, " %s", smi.modeIdent); | |
168 | return; | |
169 | } | |
170 | ||
171 | /* no more info lines */ | |
172 | *info = 0; | |
173 | return; | |
7ebf7443 WD |
174 | } |
175 | #endif | |
10efa024 BW |
176 | |
177 | int board_eth_init(bd_t *bis) | |
178 | { | |
179 | return pci_eth_init(bis); | |
180 | } |