]>
Commit | Line | Data |
---|---|---|
affae2bf WD |
1 | /* |
2 | * (C) Copyright 2000 | |
3 | * Wolfgang Denk, DENX Software Engineering, wd@denx.de. | |
4 | * | |
1a459660 | 5 | * SPDX-License-Identifier: GPL-2.0+ |
affae2bf WD |
6 | */ |
7 | ||
8 | #include <common.h> | |
9 | #include <mpc8xx.h> | |
10 | ||
6d0f6bcf | 11 | flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH chips */ |
affae2bf | 12 | |
5a1aceb0 | 13 | #if defined(CONFIG_ENV_IS_IN_FLASH) |
0e8d1586 | 14 | # ifndef CONFIG_ENV_ADDR |
6d0f6bcf | 15 | # define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_ENV_OFFSET) |
affae2bf | 16 | # endif |
0e8d1586 JCPV |
17 | # ifndef CONFIG_ENV_SIZE |
18 | # define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE | |
affae2bf | 19 | # endif |
0e8d1586 JCPV |
20 | # ifndef CONFIG_ENV_SECT_SIZE |
21 | # define CONFIG_ENV_SECT_SIZE CONFIG_ENV_SIZE | |
affae2bf WD |
22 | # endif |
23 | #endif | |
24 | ||
99edcfb2 WD |
25 | #define QUAD_ID(id) ((((ulong)(id) & 0xFF) << 24) | \ |
26 | (((ulong)(id) & 0xFF) << 16) | \ | |
27 | (((ulong)(id) & 0xFF) << 8) | \ | |
28 | (((ulong)(id) & 0xFF) << 0) \ | |
29 | ) | |
30 | ||
affae2bf WD |
31 | /*----------------------------------------------------------------------- |
32 | * Functions | |
33 | */ | |
bf9e3b38 WD |
34 | static ulong flash_get_size (vu_long * addr, flash_info_t * info); |
35 | static int write_word (flash_info_t * info, ulong dest, ulong data); | |
affae2bf WD |
36 | |
37 | /*----------------------------------------------------------------------- | |
38 | */ | |
affae2bf WD |
39 | unsigned long flash_init (void) |
40 | { | |
6d0f6bcf | 41 | volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR; |
affae2bf | 42 | volatile memctl8xx_t *memctl = &immap->im_memctl; |
99edcfb2 WD |
43 | vu_long *bcsr = (vu_long *)BCSR_ADDR; |
44 | unsigned long pd_size, total_size, bsize, or_am; | |
affae2bf WD |
45 | int i; |
46 | ||
47 | /* Init: no FLASHes known */ | |
6d0f6bcf | 48 | for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; ++i) { |
affae2bf | 49 | flash_info[i].flash_id = FLASH_UNKNOWN; |
99edcfb2 WD |
50 | flash_info[i].size = 0; |
51 | flash_info[i].sector_count = 0; | |
52 | flash_info[i].start[0] = 0xFFFFFFFF; /* For TFTP */ | |
affae2bf WD |
53 | } |
54 | ||
99edcfb2 WD |
55 | switch ((bcsr[2] & BCSR2_FLASH_PD_MASK) >> BCSR2_FLASH_PD_SHIFT) { |
56 | case 2: | |
57 | case 4: | |
58 | case 6: | |
59 | pd_size = 0x800000; | |
60 | or_am = 0xFF800000; | |
61 | break; | |
affae2bf | 62 | |
99edcfb2 WD |
63 | case 5: |
64 | case 7: | |
65 | pd_size = 0x400000; | |
66 | or_am = 0xFFC00000; | |
67 | break; | |
affae2bf | 68 | |
99edcfb2 WD |
69 | case 8: |
70 | pd_size = 0x200000; | |
71 | or_am = 0xFFE00000; | |
72 | break; | |
affae2bf | 73 | |
99edcfb2 WD |
74 | default: |
75 | pd_size = 0; | |
76 | or_am = 0xFFE00000; | |
9b55a253 | 77 | printf("## Unsupported flash detected by BCSR: 0x%08lX\n", bcsr[2]); |
affae2bf WD |
78 | } |
79 | ||
99edcfb2 | 80 | total_size = 0; |
6d0f6bcf JCPV |
81 | for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS && total_size < pd_size; ++i) { |
82 | bsize = flash_get_size((vu_long *)(CONFIG_SYS_FLASH_BASE + total_size), | |
99edcfb2 WD |
83 | &flash_info[i]); |
84 | ||
85 | if (flash_info[i].flash_id == FLASH_UNKNOWN) { | |
86 | printf ("## Unknown FLASH on Bank %d - Size = 0x%08lx = %ld MB\n", | |
87 | i, bsize, bsize >> 20); | |
88 | } | |
89 | ||
90 | total_size += bsize; | |
bf9e3b38 | 91 | } |
affae2bf | 92 | |
99edcfb2 WD |
93 | if (total_size != pd_size) { |
94 | printf("## Detected flash size %lu conflicts with PD data %lu\n", | |
95 | total_size, pd_size); | |
affae2bf WD |
96 | } |
97 | ||
98 | /* Remap FLASH according to real size */ | |
6d0f6bcf | 99 | memctl->memc_or0 = or_am | CONFIG_SYS_OR_TIMING_FLASH; |
affae2bf | 100 | |
6d0f6bcf JCPV |
101 | for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS && flash_info[i].size != 0; ++i) { |
102 | #if CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE | |
affae2bf | 103 | /* monitor protection ON by default */ |
6d0f6bcf | 104 | if (CONFIG_SYS_MONITOR_BASE >= flash_info[i].start[0]) |
99edcfb2 | 105 | flash_protect (FLAG_PROTECT_SET, |
6d0f6bcf JCPV |
106 | CONFIG_SYS_MONITOR_BASE, |
107 | CONFIG_SYS_MONITOR_BASE + monitor_flash_len - 1, | |
99edcfb2 | 108 | &flash_info[i]); |
affae2bf WD |
109 | #endif |
110 | ||
5a1aceb0 | 111 | #ifdef CONFIG_ENV_IS_IN_FLASH |
affae2bf | 112 | /* ENV protection ON by default */ |
0e8d1586 | 113 | if (CONFIG_ENV_ADDR >= flash_info[i].start[0]) |
99edcfb2 | 114 | flash_protect (FLAG_PROTECT_SET, |
0e8d1586 JCPV |
115 | CONFIG_ENV_ADDR, |
116 | CONFIG_ENV_ADDR + CONFIG_ENV_SIZE - 1, | |
99edcfb2 | 117 | &flash_info[i]); |
affae2bf | 118 | #endif |
affae2bf WD |
119 | } |
120 | ||
99edcfb2 | 121 | return total_size; |
affae2bf WD |
122 | } |
123 | ||
124 | /*----------------------------------------------------------------------- | |
125 | */ | |
bf9e3b38 | 126 | void flash_print_info (flash_info_t * info) |
affae2bf WD |
127 | { |
128 | int i; | |
129 | ||
bf9e3b38 | 130 | if (info->flash_id == FLASH_UNKNOWN) { |
affae2bf WD |
131 | printf ("missing or unknown FLASH type\n"); |
132 | return; | |
133 | } | |
134 | ||
bf9e3b38 WD |
135 | switch (info->flash_id & FLASH_VENDMASK) { |
136 | case FLASH_MAN_AMD: | |
137 | printf ("AMD "); | |
138 | break; | |
139 | case FLASH_MAN_FUJ: | |
140 | printf ("FUJITSU "); | |
141 | break; | |
142 | case FLASH_MAN_BM: | |
143 | printf ("BRIGHT MICRO "); | |
144 | break; | |
145 | default: | |
146 | printf ("Unknown Vendor "); | |
147 | break; | |
affae2bf WD |
148 | } |
149 | ||
bf9e3b38 WD |
150 | switch (info->flash_id & FLASH_TYPEMASK) { |
151 | case FLASH_AM040: | |
152 | printf ("29F040 or 29LV040 (4 Mbit, uniform sectors)\n"); | |
153 | break; | |
154 | case FLASH_AM080: | |
155 | printf ("29F080 or 29LV080 (8 Mbit, uniform sectors)\n"); | |
156 | break; | |
157 | case FLASH_AM400B: | |
158 | printf ("AM29LV400B (4 Mbit, bottom boot sect)\n"); | |
159 | break; | |
160 | case FLASH_AM400T: | |
161 | printf ("AM29LV400T (4 Mbit, top boot sector)\n"); | |
162 | break; | |
163 | case FLASH_AM800B: | |
164 | printf ("AM29LV800B (8 Mbit, bottom boot sect)\n"); | |
165 | break; | |
166 | case FLASH_AM800T: | |
167 | printf ("AM29LV800T (8 Mbit, top boot sector)\n"); | |
168 | break; | |
169 | case FLASH_AM160B: | |
170 | printf ("AM29LV160B (16 Mbit, bottom boot sect)\n"); | |
171 | break; | |
172 | case FLASH_AM160T: | |
173 | printf ("AM29LV160T (16 Mbit, top boot sector)\n"); | |
174 | break; | |
175 | case FLASH_AM320B: | |
176 | printf ("AM29LV320B (32 Mbit, bottom boot sect)\n"); | |
177 | break; | |
178 | case FLASH_AM320T: | |
179 | printf ("AM29LV320T (32 Mbit, top boot sector)\n"); | |
180 | break; | |
181 | default: | |
182 | printf ("Unknown Chip Type\n"); | |
183 | break; | |
affae2bf WD |
184 | } |
185 | ||
bf9e3b38 WD |
186 | printf (" Size: %ld MB in %d Sectors\n", info->size >> 20, |
187 | info->sector_count); | |
affae2bf WD |
188 | |
189 | printf (" Sector Start Addresses:"); | |
190 | ||
bf9e3b38 WD |
191 | for (i = 0; i < info->sector_count; ++i) { |
192 | if ((i % 5) == 0) { | |
affae2bf WD |
193 | printf ("\n "); |
194 | } | |
195 | ||
196 | printf (" %08lX%s", | |
bf9e3b38 | 197 | info->start[i], info->protect[i] ? " (RO)" : " "); |
affae2bf WD |
198 | } |
199 | ||
200 | printf ("\n"); | |
affae2bf WD |
201 | } |
202 | ||
203 | /*----------------------------------------------------------------------- | |
99edcfb2 | 204 | * The following code can not run from flash! |
affae2bf | 205 | */ |
bf9e3b38 | 206 | static ulong flash_get_size (vu_long * addr, flash_info_t * info) |
affae2bf WD |
207 | { |
208 | short i; | |
bf9e3b38 | 209 | |
affae2bf | 210 | /* Write auto select command: read Manufacturer ID */ |
affae2bf WD |
211 | addr[0x0555] = 0xAAAAAAAA; |
212 | addr[0x02AA] = 0x55555555; | |
213 | addr[0x0555] = 0x90909090; | |
affae2bf | 214 | |
99edcfb2 WD |
215 | switch (addr[0]) { |
216 | case QUAD_ID(AMD_MANUFACT): | |
bf9e3b38 WD |
217 | info->flash_id = FLASH_MAN_AMD; |
218 | break; | |
affae2bf | 219 | |
99edcfb2 | 220 | case QUAD_ID(FUJ_MANUFACT): |
bf9e3b38 WD |
221 | info->flash_id = FLASH_MAN_FUJ; |
222 | break; | |
affae2bf | 223 | |
bf9e3b38 WD |
224 | default: |
225 | info->flash_id = FLASH_UNKNOWN; | |
226 | info->sector_count = 0; | |
227 | info->size = 0; | |
228 | break; | |
229 | } | |
230 | ||
99edcfb2 WD |
231 | switch (addr[1]) { /* device ID */ |
232 | case QUAD_ID(AMD_ID_F040B): | |
233 | case QUAD_ID(AMD_ID_LV040B): | |
bf9e3b38 WD |
234 | info->flash_id += FLASH_AM040; |
235 | info->sector_count = 8; | |
236 | info->size = 0x00200000; | |
237 | break; /* => 2 MB */ | |
238 | ||
99edcfb2 | 239 | case QUAD_ID(AMD_ID_F080B): |
bf9e3b38 WD |
240 | info->flash_id += FLASH_AM080; |
241 | info->sector_count = 16; | |
242 | info->size = 0x00400000; | |
243 | break; /* => 4 MB */ | |
99edcfb2 | 244 | #if 0 |
bf9e3b38 WD |
245 | case AMD_ID_LV400T: |
246 | info->flash_id += FLASH_AM400T; | |
247 | info->sector_count = 11; | |
248 | info->size = 0x00100000; | |
249 | break; /* => 1 MB */ | |
250 | ||
251 | case AMD_ID_LV400B: | |
252 | info->flash_id += FLASH_AM400B; | |
253 | info->sector_count = 11; | |
254 | info->size = 0x00100000; | |
255 | break; /* => 1 MB */ | |
256 | ||
257 | case AMD_ID_LV800T: | |
258 | info->flash_id += FLASH_AM800T; | |
259 | info->sector_count = 19; | |
260 | info->size = 0x00200000; | |
261 | break; /* => 2 MB */ | |
262 | ||
263 | case AMD_ID_LV800B: | |
264 | info->flash_id += FLASH_AM800B; | |
265 | info->sector_count = 19; | |
266 | info->size = 0x00200000; | |
267 | break; /* => 2 MB */ | |
268 | ||
269 | case AMD_ID_LV160T: | |
270 | info->flash_id += FLASH_AM160T; | |
271 | info->sector_count = 35; | |
272 | info->size = 0x00400000; | |
273 | break; /* => 4 MB */ | |
274 | ||
275 | case AMD_ID_LV160B: | |
276 | info->flash_id += FLASH_AM160B; | |
277 | info->sector_count = 35; | |
278 | info->size = 0x00400000; | |
279 | break; /* => 4 MB */ | |
99edcfb2 | 280 | |
bf9e3b38 WD |
281 | case AMD_ID_LV320T: |
282 | info->flash_id += FLASH_AM320T; | |
283 | info->sector_count = 67; | |
284 | info->size = 0x00800000; | |
285 | break; /* => 8 MB */ | |
286 | ||
287 | case AMD_ID_LV320B: | |
288 | info->flash_id += FLASH_AM320B; | |
289 | info->sector_count = 67; | |
290 | info->size = 0x00800000; | |
291 | break; /* => 8 MB */ | |
99edcfb2 | 292 | #endif /* 0 */ |
bf9e3b38 WD |
293 | default: |
294 | info->flash_id = FLASH_UNKNOWN; | |
295 | return (0); /* => no or unknown flash */ | |
affae2bf WD |
296 | } |
297 | ||
298 | #if 0 | |
299 | /* set up sector start address table */ | |
300 | if (info->flash_id & FLASH_BTYPE) { | |
bf9e3b38 | 301 | /* set sector offsets for bottom boot block type */ |
affae2bf WD |
302 | info->start[0] = base + 0x00000000; |
303 | info->start[1] = base + 0x00008000; | |
304 | info->start[2] = base + 0x0000C000; | |
305 | info->start[3] = base + 0x00010000; | |
306 | for (i = 4; i < info->sector_count; i++) { | |
307 | info->start[i] = base + (i * 0x00020000) - 0x00060000; | |
308 | } | |
309 | } else { | |
bf9e3b38 | 310 | /* set sector offsets for top boot block type */ |
affae2bf WD |
311 | i = info->sector_count - 1; |
312 | info->start[i--] = base + info->size - 0x00008000; | |
313 | info->start[i--] = base + info->size - 0x0000C000; | |
314 | info->start[i--] = base + info->size - 0x00010000; | |
315 | for (; i >= 0; i--) { | |
316 | info->start[i] = base + i * 0x00020000; | |
317 | } | |
318 | } | |
319 | #else | |
99edcfb2 WD |
320 | /* set sector offsets for uniform sector type */ |
321 | for (i = 0; i < info->sector_count; i++) | |
322 | info->start[i] = (ulong)addr + (i * 0x00040000); | |
affae2bf WD |
323 | #endif |
324 | ||
325 | /* check for protected sectors */ | |
bf9e3b38 | 326 | for (i = 0; i < info->sector_count; i++) { |
affae2bf WD |
327 | /* read sector protection at sector address, (A7 .. A0) = 0x02 */ |
328 | /* D0 = 1 if protected */ | |
bf9e3b38 | 329 | addr = (volatile unsigned long *) (info->start[i]); |
affae2bf WD |
330 | info->protect[i] = addr[2] & 1; |
331 | } | |
332 | ||
bf9e3b38 WD |
333 | if (info->flash_id != FLASH_UNKNOWN) { |
334 | addr = (volatile unsigned long *) info->start[0]; | |
affae2bf | 335 | *addr = 0xF0F0F0F0; /* reset bank */ |
affae2bf WD |
336 | } |
337 | ||
338 | return (info->size); | |
339 | } | |
340 | ||
affae2bf WD |
341 | /*----------------------------------------------------------------------- |
342 | */ | |
bf9e3b38 | 343 | int flash_erase (flash_info_t * info, int s_first, int s_last) |
affae2bf | 344 | { |
bf9e3b38 | 345 | vu_long *addr = (vu_long *) (info->start[0]); |
affae2bf WD |
346 | int flag, prot, sect, l_sect; |
347 | ulong start, now, last; | |
348 | ||
349 | if ((s_first < 0) || (s_first > s_last)) { | |
350 | if (info->flash_id == FLASH_UNKNOWN) { | |
351 | printf ("- missing\n"); | |
352 | } else { | |
353 | printf ("- no sectors to erase\n"); | |
354 | } | |
99edcfb2 | 355 | return ERR_INVAL; |
affae2bf WD |
356 | } |
357 | ||
358 | if ((info->flash_id == FLASH_UNKNOWN) || | |
359 | (info->flash_id > FLASH_AMD_COMP)) { | |
360 | printf ("Can't erase unknown flash type - aborted\n"); | |
99edcfb2 | 361 | return ERR_UNKNOWN_FLASH_TYPE; |
affae2bf WD |
362 | } |
363 | ||
364 | prot = 0; | |
bf9e3b38 | 365 | for (sect = s_first; sect <= s_last; ++sect) { |
affae2bf WD |
366 | if (info->protect[sect]) { |
367 | prot++; | |
368 | } | |
369 | } | |
370 | ||
371 | if (prot) { | |
bf9e3b38 | 372 | printf ("- Warning: %d protected sectors will not be erased!\n", prot); |
affae2bf WD |
373 | } else { |
374 | printf ("\n"); | |
375 | } | |
376 | ||
377 | l_sect = -1; | |
378 | ||
379 | /* Disable interrupts which might cause a timeout here */ | |
bf9e3b38 | 380 | flag = disable_interrupts (); |
affae2bf | 381 | |
affae2bf WD |
382 | addr[0x0555] = 0xAAAAAAAA; |
383 | addr[0x02AA] = 0x55555555; | |
384 | addr[0x0555] = 0x80808080; | |
385 | addr[0x0555] = 0xAAAAAAAA; | |
386 | addr[0x02AA] = 0x55555555; | |
affae2bf WD |
387 | |
388 | /* Start erase on unprotected sectors */ | |
bf9e3b38 | 389 | for (sect = s_first; sect <= s_last; sect++) { |
affae2bf | 390 | if (info->protect[sect] == 0) { /* not protected */ |
bf9e3b38 | 391 | addr = (vu_long *) (info->start[sect]); |
affae2bf | 392 | addr[0] = 0x30303030; |
affae2bf WD |
393 | l_sect = sect; |
394 | } | |
395 | } | |
396 | ||
397 | /* re-enable interrupts if necessary */ | |
398 | if (flag) | |
bf9e3b38 | 399 | enable_interrupts (); |
affae2bf WD |
400 | |
401 | /* wait at least 80us - let's wait 1 ms */ | |
402 | udelay (1000); | |
403 | ||
404 | /* | |
405 | * We wait for the last triggered sector | |
406 | */ | |
407 | if (l_sect < 0) | |
408 | goto DONE; | |
409 | ||
410 | start = get_timer (0); | |
bf9e3b38 WD |
411 | last = start; |
412 | addr = (vu_long *) (info->start[l_sect]); | |
affae2bf | 413 | while ((addr[0] & 0xFFFFFFFF) != 0xFFFFFFFF) |
affae2bf | 414 | { |
6d0f6bcf | 415 | if ((now = get_timer (start)) > CONFIG_SYS_FLASH_ERASE_TOUT) { |
affae2bf | 416 | printf ("Timeout\n"); |
99edcfb2 | 417 | return ERR_TIMOUT; |
affae2bf WD |
418 | } |
419 | /* show that we're waiting */ | |
420 | if ((now - last) > 1000) { /* every second */ | |
421 | putc ('.'); | |
422 | last = now; | |
423 | } | |
424 | } | |
425 | ||
bf9e3b38 | 426 | DONE: |
affae2bf | 427 | /* reset to read mode */ |
bf9e3b38 | 428 | addr = (volatile unsigned long *) info->start[0]; |
affae2bf | 429 | addr[0] = 0xF0F0F0F0; /* reset bank */ |
affae2bf WD |
430 | |
431 | printf (" done\n"); | |
99edcfb2 | 432 | |
affae2bf WD |
433 | return 0; |
434 | } | |
435 | ||
436 | /*----------------------------------------------------------------------- | |
437 | * Copy memory to flash, returns: | |
438 | * 0 - OK | |
439 | * 1 - write timeout | |
440 | * 2 - Flash not erased | |
441 | */ | |
bf9e3b38 | 442 | int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt) |
affae2bf WD |
443 | { |
444 | ulong cp, wp, data; | |
445 | int i, l, rc; | |
446 | ||
447 | wp = (addr & ~3); /* get lower word aligned address */ | |
448 | ||
449 | /* | |
450 | * handle unaligned start bytes | |
451 | */ | |
452 | if ((l = addr - wp) != 0) { | |
453 | data = 0; | |
bf9e3b38 WD |
454 | for (i = 0, cp = wp; i < l; ++i, ++cp) { |
455 | data = (data << 8) | (*(uchar *) cp); | |
affae2bf | 456 | } |
bf9e3b38 | 457 | for (; i < 4 && cnt > 0; ++i) { |
affae2bf WD |
458 | data = (data << 8) | *src++; |
459 | --cnt; | |
460 | ++cp; | |
461 | } | |
bf9e3b38 WD |
462 | for (; cnt == 0 && i < 4; ++i, ++cp) { |
463 | data = (data << 8) | (*(uchar *) cp); | |
affae2bf WD |
464 | } |
465 | ||
bf9e3b38 | 466 | if ((rc = write_word (info, wp, data)) != 0) { |
affae2bf WD |
467 | return (rc); |
468 | } | |
469 | wp += 4; | |
470 | } | |
471 | ||
472 | /* | |
473 | * handle word aligned part | |
474 | */ | |
475 | while (cnt >= 4) { | |
476 | data = 0; | |
bf9e3b38 | 477 | for (i = 0; i < 4; ++i) { |
affae2bf WD |
478 | data = (data << 8) | *src++; |
479 | } | |
bf9e3b38 | 480 | if ((rc = write_word (info, wp, data)) != 0) { |
affae2bf WD |
481 | return (rc); |
482 | } | |
bf9e3b38 | 483 | wp += 4; |
affae2bf WD |
484 | cnt -= 4; |
485 | } | |
486 | ||
487 | if (cnt == 0) { | |
488 | return (0); | |
489 | } | |
490 | ||
491 | /* | |
492 | * handle unaligned tail bytes | |
493 | */ | |
494 | data = 0; | |
bf9e3b38 | 495 | for (i = 0, cp = wp; i < 4 && cnt > 0; ++i, ++cp) { |
affae2bf WD |
496 | data = (data << 8) | *src++; |
497 | --cnt; | |
498 | } | |
bf9e3b38 WD |
499 | for (; i < 4; ++i, ++cp) { |
500 | data = (data << 8) | (*(uchar *) cp); | |
affae2bf WD |
501 | } |
502 | ||
bf9e3b38 | 503 | return (write_word (info, wp, data)); |
affae2bf WD |
504 | } |
505 | ||
506 | /*----------------------------------------------------------------------- | |
507 | * Write a word to Flash, returns: | |
508 | * 0 - OK | |
509 | * 1 - write timeout | |
510 | * 2 - Flash not erased | |
511 | */ | |
bf9e3b38 | 512 | static int write_word (flash_info_t * info, ulong dest, ulong data) |
affae2bf | 513 | { |
bf9e3b38 | 514 | vu_long *addr = (vu_long *) (info->start[0]); |
affae2bf WD |
515 | ulong start; |
516 | int flag; | |
517 | ||
518 | /* Check if Flash is (sufficiently) erased */ | |
bf9e3b38 | 519 | if ((*((vu_long *) dest) & data) != data) { |
99edcfb2 | 520 | return ERR_NOT_ERASED; |
affae2bf WD |
521 | } |
522 | /* Disable interrupts which might cause a timeout here */ | |
bf9e3b38 | 523 | flag = disable_interrupts (); |
affae2bf | 524 | |
affae2bf WD |
525 | addr[0x0555] = 0xAAAAAAAA; |
526 | addr[0x02AA] = 0x55555555; | |
527 | addr[0x0555] = 0xA0A0A0A0; | |
affae2bf | 528 | |
bf9e3b38 | 529 | *((vu_long *) dest) = data; |
affae2bf WD |
530 | |
531 | /* re-enable interrupts if necessary */ | |
532 | if (flag) | |
bf9e3b38 | 533 | enable_interrupts (); |
affae2bf WD |
534 | |
535 | /* data polling for D7 */ | |
536 | start = get_timer (0); | |
bf9e3b38 | 537 | while ((*((vu_long *) dest) & 0x80808080) != (data & 0x80808080)) |
affae2bf | 538 | { |
6d0f6bcf | 539 | if (get_timer (start) > CONFIG_SYS_FLASH_WRITE_TOUT) { |
99edcfb2 | 540 | return ERR_TIMOUT; |
affae2bf WD |
541 | } |
542 | } | |
543 | return (0); | |
544 | } |