]>
Commit | Line | Data |
---|---|---|
83d290c5 | 1 | // SPDX-License-Identifier: GPL-2.0+ |
3ad2737e YZ |
2 | /* |
3 | * Copyright 2014 Freescale Semiconductor, Inc. | |
c0eeb730 | 4 | * Copyright 2020-21 NXP |
b5ee48c0 | 5 | * Copyright 2020 Stephen Carlson <stcarlso@linux.microsoft.com> |
3ad2737e YZ |
6 | */ |
7 | ||
d678a59d | 8 | #include <common.h> |
3ad2737e | 9 | #include <command.h> |
7b51b576 | 10 | #include <env.h> |
3ad2737e | 11 | #include <i2c.h> |
36bf446b | 12 | #include <irq_func.h> |
f7ae49fc | 13 | #include <log.h> |
02b5d2ed | 14 | #include <asm/io.h> |
126fe70d | 15 | #ifdef CONFIG_FSL_LSCH2 |
02b5d2ed | 16 | #include <asm/arch/immap_lsch2.h> |
ed2530d0 RH |
17 | #elif defined(CONFIG_FSL_LSCH3) |
18 | #include <asm/arch/immap_lsch3.h> | |
02b5d2ed | 19 | #else |
3ad2737e | 20 | #include <asm/immap_85xx.h> |
02b5d2ed | 21 | #endif |
c05ed00a | 22 | #include <linux/delay.h> |
15347d2d | 23 | #include "i2c_common.h" |
3ad2737e YZ |
24 | #include "vid.h" |
25 | ||
15347d2d SC |
26 | #ifndef I2C_VOL_MONITOR_BUS |
27 | #define I2C_VOL_MONITOR_BUS 0 | |
28 | #endif | |
29 | ||
b5ee48c0 SC |
30 | /* Voltages are generally handled in mV to keep them as integers */ |
31 | #define MV_PER_V 1000 | |
32 | ||
33 | /* | |
34 | * Select the channel on the I2C mux (on some NXP boards) that contains | |
35 | * the voltage regulator to use for VID. Return 0 for success or nonzero | |
36 | * for failure. | |
37 | */ | |
3ad2737e YZ |
38 | int __weak i2c_multiplexer_select_vid_channel(u8 channel) |
39 | { | |
40 | return 0; | |
41 | } | |
42 | ||
43 | /* | |
b5ee48c0 SC |
44 | * Compensate for a board specific voltage drop between regulator and SoC. |
45 | * Returns the voltage offset in mV. | |
3ad2737e YZ |
46 | */ |
47 | int __weak board_vdd_drop_compensation(void) | |
48 | { | |
49 | return 0; | |
50 | } | |
51 | ||
3607570b | 52 | /* |
b5ee48c0 SC |
53 | * Performs any board specific adjustments after the VID voltage has been |
54 | * set. Return 0 for success or nonzero for failure. | |
3607570b RB |
55 | */ |
56 | int __weak board_adjust_vdd(int vdd) | |
57 | { | |
58 | return 0; | |
59 | } | |
60 | ||
b5ee48c0 SC |
61 | /* |
62 | * Processor specific method of converting the fuse value read from VID | |
63 | * registers into the core voltage to supply. Return the voltage in mV. | |
64 | */ | |
65 | u16 __weak soc_get_fuse_vid(int vid_index) | |
66 | { | |
67 | /* Default VDD for Layerscape Chassis 1 devices */ | |
68 | static const u16 vdd[32] = { | |
69 | 0, /* unused */ | |
70 | 9875, /* 0.9875V */ | |
71 | 9750, | |
72 | 9625, | |
73 | 9500, | |
74 | 9375, | |
75 | 9250, | |
76 | 9125, | |
77 | 9000, | |
78 | 8875, | |
79 | 8750, | |
80 | 8625, | |
81 | 8500, | |
82 | 8375, | |
83 | 8250, | |
84 | 8125, | |
85 | 10000, /* 1.0000V */ | |
86 | 10125, | |
87 | 10250, | |
88 | 10375, | |
89 | 10500, | |
90 | 10625, | |
91 | 10750, | |
92 | 10875, | |
93 | 11000, | |
94 | 0, /* reserved */ | |
95 | }; | |
96 | return vdd[vid_index]; | |
97 | } | |
98 | ||
99 | #ifndef I2C_VOL_MONITOR_ADDR | |
100 | #define I2C_VOL_MONITOR_ADDR 0 | |
101 | #endif | |
102 | ||
9458316a RB |
103 | #if defined(CONFIG_VOL_MONITOR_IR36021_SET) || \ |
104 | defined(CONFIG_VOL_MONITOR_IR36021_READ) | |
3ad2737e YZ |
105 | /* |
106 | * Get the i2c address configuration for the IR regulator chip | |
107 | * | |
108 | * There are some variance in the RDB HW regarding the I2C address configuration | |
109 | * for the IR regulator chip, which is likely a problem of external resistor | |
110 | * accuracy. So we just check each address in a hopefully non-intrusive mode | |
111 | * and use the first one that seems to work | |
112 | * | |
113 | * The IR chip can show up under the following addresses: | |
114 | * 0x08 (Verified on T1040RDB-PA,T4240RDB-PB,X-T4240RDB-16GPA) | |
115 | * 0x09 (Verified on T1040RDB-PA) | |
2f66a828 | 116 | * 0x38 (Verified on T2080QDS, T2081QDS, T4240RDB) |
3ad2737e YZ |
117 | */ |
118 | static int find_ir_chip_on_i2c(void) | |
119 | { | |
b5ee48c0 SC |
120 | int i2caddress, ret, i; |
121 | u8 mfrID; | |
3ad2737e | 122 | const int ir_i2c_addr[] = {0x38, 0x08, 0x09}; |
b5ee48c0 | 123 | DEVICE_HANDLE_T dev; |
3ad2737e YZ |
124 | |
125 | /* Check all the address */ | |
126 | for (i = 0; i < (sizeof(ir_i2c_addr)/sizeof(ir_i2c_addr[0])); i++) { | |
127 | i2caddress = ir_i2c_addr[i]; | |
15347d2d | 128 | ret = fsl_i2c_get_device(i2caddress, I2C_VOL_MONITOR_BUS, &dev); |
b5ee48c0 SC |
129 | if (!ret) { |
130 | ret = I2C_READ(dev, IR36021_MFR_ID_OFFSET, | |
131 | (void *)&mfrID, sizeof(mfrID)); | |
132 | /* If manufacturer ID matches the IR36021 */ | |
133 | if (!ret && mfrID == IR36021_MFR_ID) | |
134 | return i2caddress; | |
135 | } | |
3ad2737e YZ |
136 | } |
137 | return -1; | |
138 | } | |
9458316a | 139 | #endif |
3ad2737e YZ |
140 | |
141 | /* Maximum loop count waiting for new voltage to take effect */ | |
142 | #define MAX_LOOP_WAIT_NEW_VOL 100 | |
143 | /* Maximum loop count waiting for the voltage to be stable */ | |
144 | #define MAX_LOOP_WAIT_VOL_STABLE 100 | |
145 | /* | |
146 | * read_voltage from sensor on I2C bus | |
147 | * We use average of 4 readings, waiting for WAIT_FOR_ADC before | |
148 | * another reading | |
149 | */ | |
150 | #define NUM_READINGS 4 /* prefer to be power of 2 for efficiency */ | |
151 | ||
152 | /* If an INA220 chip is available, we can use it to read back the voltage | |
153 | * as it may have a higher accuracy than the IR chip for the same purpose | |
154 | */ | |
155 | #ifdef CONFIG_VOL_MONITOR_INA220 | |
156 | #define WAIT_FOR_ADC 532 /* wait for 532 microseconds for ADC */ | |
157 | #define ADC_MIN_ACCURACY 4 | |
158 | #else | |
159 | #define WAIT_FOR_ADC 138 /* wait for 138 microseconds for ADC */ | |
160 | #define ADC_MIN_ACCURACY 4 | |
161 | #endif | |
162 | ||
163 | #ifdef CONFIG_VOL_MONITOR_INA220 | |
164 | static int read_voltage_from_INA220(int i2caddress) | |
165 | { | |
166 | int i, ret, voltage_read = 0; | |
167 | u16 vol_mon; | |
168 | u8 buf[2]; | |
b5ee48c0 SC |
169 | DEVICE_HANDLE_T dev; |
170 | ||
171 | /* Open device handle */ | |
15347d2d | 172 | ret = fsl_i2c_get_device(i2caddress, I2C_VOL_MONITOR_BUS, &dev); |
b5ee48c0 SC |
173 | if (ret) |
174 | return ret; | |
3ad2737e YZ |
175 | |
176 | for (i = 0; i < NUM_READINGS; i++) { | |
b5ee48c0 SC |
177 | ret = I2C_READ(dev, I2C_VOL_MONITOR_BUS_V_OFFSET, |
178 | (void *)&buf[0], sizeof(buf)); | |
3ad2737e YZ |
179 | if (ret) { |
180 | printf("VID: failed to read core voltage\n"); | |
181 | return ret; | |
182 | } | |
b5ee48c0 | 183 | |
3ad2737e YZ |
184 | vol_mon = (buf[0] << 8) | buf[1]; |
185 | if (vol_mon & I2C_VOL_MONITOR_BUS_V_OVF) { | |
186 | printf("VID: Core voltage sensor error\n"); | |
187 | return -1; | |
188 | } | |
b5ee48c0 | 189 | |
3ad2737e YZ |
190 | debug("VID: bus voltage reads 0x%04x\n", vol_mon); |
191 | /* LSB = 4mv */ | |
192 | voltage_read += (vol_mon >> I2C_VOL_MONITOR_BUS_V_SHIFT) * 4; | |
193 | udelay(WAIT_FOR_ADC); | |
194 | } | |
b5ee48c0 | 195 | |
3ad2737e YZ |
196 | /* calculate the average */ |
197 | voltage_read /= NUM_READINGS; | |
198 | ||
199 | return voltage_read; | |
200 | } | |
201 | #endif | |
202 | ||
3ad2737e | 203 | #ifdef CONFIG_VOL_MONITOR_IR36021_READ |
b5ee48c0 | 204 | /* read voltage from IR */ |
3ad2737e YZ |
205 | static int read_voltage_from_IR(int i2caddress) |
206 | { | |
207 | int i, ret, voltage_read = 0; | |
208 | u16 vol_mon; | |
209 | u8 buf; | |
b5ee48c0 SC |
210 | DEVICE_HANDLE_T dev; |
211 | ||
212 | /* Open device handle */ | |
15347d2d | 213 | ret = fsl_i2c_get_device(i2caddress, I2C_VOL_MONITOR_BUS, &dev); |
b5ee48c0 SC |
214 | if (ret) |
215 | return ret; | |
3ad2737e YZ |
216 | |
217 | for (i = 0; i < NUM_READINGS; i++) { | |
b5ee48c0 SC |
218 | ret = I2C_READ(dev, IR36021_LOOP1_VOUT_OFFSET, (void *)&buf, |
219 | sizeof(buf)); | |
3ad2737e | 220 | if (ret) { |
b5ee48c0 | 221 | printf("VID: failed to read core voltage\n"); |
3ad2737e YZ |
222 | return ret; |
223 | } | |
224 | vol_mon = buf; | |
225 | if (!vol_mon) { | |
226 | printf("VID: Core voltage sensor error\n"); | |
227 | return -1; | |
228 | } | |
229 | debug("VID: bus voltage reads 0x%02x\n", vol_mon); | |
230 | /* Resolution is 1/128V. We scale up here to get 1/128mV | |
231 | * and divide at the end | |
232 | */ | |
b5ee48c0 | 233 | voltage_read += vol_mon * MV_PER_V; |
3ad2737e YZ |
234 | udelay(WAIT_FOR_ADC); |
235 | } | |
236 | /* Scale down to the real mV as IR resolution is 1/128V, rounding up */ | |
237 | voltage_read = DIV_ROUND_UP(voltage_read, 128); | |
238 | ||
239 | /* calculate the average */ | |
240 | voltage_read /= NUM_READINGS; | |
241 | ||
242 | /* Compensate for a board specific voltage drop between regulator and | |
243 | * SoC before converting into an IR VID value | |
244 | */ | |
245 | voltage_read -= board_vdd_drop_compensation(); | |
246 | ||
247 | return voltage_read; | |
248 | } | |
249 | #endif | |
250 | ||
b5ee48c0 SC |
251 | #if defined(CONFIG_VOL_MONITOR_ISL68233_READ) || \ |
252 | defined(CONFIG_VOL_MONITOR_LTC3882_READ) || \ | |
253 | defined(CONFIG_VOL_MONITOR_ISL68233_SET) || \ | |
254 | defined(CONFIG_VOL_MONITOR_LTC3882_SET) | |
23a12cb3 | 255 | |
b5ee48c0 SC |
256 | /* |
257 | * The message displayed if the VOUT exponent causes a resolution | |
258 | * worse than 1.0 V (if exponent is >= 0). | |
259 | */ | |
260 | #define VOUT_WARNING "VID: VOUT_MODE exponent has resolution worse than 1 V!\n" | |
0eba65d2 | 261 | |
b5ee48c0 SC |
262 | /* Checks the PMBus voltage monitor for the format used for voltage values */ |
263 | static int get_pmbus_multiplier(DEVICE_HANDLE_T dev) | |
264 | { | |
265 | u8 mode; | |
266 | int exponent, multiplier, ret; | |
267 | ||
268 | ret = I2C_READ(dev, PMBUS_CMD_VOUT_MODE, &mode, sizeof(mode)); | |
23a12cb3 | 269 | if (ret) { |
b5ee48c0 SC |
270 | printf("VID: unable to determine voltage multiplier\n"); |
271 | return 1; | |
272 | } | |
273 | ||
274 | /* Upper 3 bits is mode, lower 5 bits is exponent */ | |
275 | exponent = (int)mode & 0x1F; | |
276 | mode >>= 5; | |
277 | switch (mode) { | |
278 | case 0: | |
279 | /* Linear, 5 bit twos component exponent */ | |
280 | if (exponent & 0x10) { | |
281 | multiplier = 1 << (16 - (exponent & 0xF)); | |
282 | } else { | |
283 | /* If exponent is >= 0, then resolution is 1 V! */ | |
284 | printf(VOUT_WARNING); | |
285 | multiplier = 1; | |
286 | } | |
287 | break; | |
288 | case 1: | |
289 | /* VID code identifier */ | |
290 | printf("VID: custom VID codes are not supported\n"); | |
291 | multiplier = MV_PER_V; | |
292 | break; | |
293 | default: | |
294 | /* Direct, in mV */ | |
295 | multiplier = MV_PER_V; | |
296 | break; | |
297 | } | |
298 | ||
299 | debug("VID: calculated multiplier is %d\n", multiplier); | |
300 | return multiplier; | |
301 | } | |
302 | #endif | |
303 | ||
304 | #if defined(CONFIG_VOL_MONITOR_ISL68233_READ) || \ | |
305 | defined(CONFIG_VOL_MONITOR_LTC3882_READ) | |
306 | static int read_voltage_from_pmbus(int i2caddress) | |
307 | { | |
308 | int ret, multiplier, vout; | |
309 | u8 channel = PWM_CHANNEL0; | |
310 | u16 vcode; | |
311 | DEVICE_HANDLE_T dev; | |
312 | ||
313 | /* Open device handle */ | |
15347d2d | 314 | ret = fsl_i2c_get_device(i2caddress, I2C_VOL_MONITOR_BUS, &dev); |
b5ee48c0 | 315 | if (ret) |
23a12cb3 | 316 | return ret; |
23a12cb3 | 317 | |
b5ee48c0 SC |
318 | /* Select the right page */ |
319 | ret = I2C_WRITE(dev, PMBUS_CMD_PAGE, &channel, sizeof(channel)); | |
0eba65d2 | 320 | if (ret) { |
b5ee48c0 | 321 | printf("VID: failed to select VDD page %d\n", channel); |
0eba65d2 CH |
322 | return ret; |
323 | } | |
b5ee48c0 SC |
324 | |
325 | /* VOUT is little endian */ | |
326 | ret = I2C_READ(dev, PMBUS_CMD_READ_VOUT, (void *)&vcode, sizeof(vcode)); | |
23a12cb3 | 327 | if (ret) { |
b5ee48c0 | 328 | printf("VID: failed to read core voltage\n"); |
23a12cb3 RB |
329 | return ret; |
330 | } | |
331 | ||
b5ee48c0 SC |
332 | /* Scale down to the real mV */ |
333 | multiplier = get_pmbus_multiplier(dev); | |
334 | vout = (int)vcode; | |
335 | /* Multiplier 1000 (direct mode) requires no change to convert */ | |
336 | if (multiplier != MV_PER_V) | |
337 | vout = DIV_ROUND_UP(vout * MV_PER_V, multiplier); | |
338 | return vout - board_vdd_drop_compensation(); | |
23a12cb3 RB |
339 | } |
340 | #endif | |
341 | ||
3ad2737e YZ |
342 | static int read_voltage(int i2caddress) |
343 | { | |
344 | int voltage_read; | |
345 | #ifdef CONFIG_VOL_MONITOR_INA220 | |
b5ee48c0 | 346 | voltage_read = read_voltage_from_INA220(I2C_VOL_MONITOR_ADDR); |
3ad2737e YZ |
347 | #elif defined CONFIG_VOL_MONITOR_IR36021_READ |
348 | voltage_read = read_voltage_from_IR(i2caddress); | |
b5ee48c0 SC |
349 | #elif defined(CONFIG_VOL_MONITOR_ISL68233_READ) || \ |
350 | defined(CONFIG_VOL_MONITOR_LTC3882_READ) | |
351 | voltage_read = read_voltage_from_pmbus(i2caddress); | |
3ad2737e | 352 | #else |
b5ee48c0 | 353 | voltage_read = -1; |
3ad2737e YZ |
354 | #endif |
355 | return voltage_read; | |
356 | } | |
357 | ||
9458316a | 358 | #ifdef CONFIG_VOL_MONITOR_IR36021_SET |
3ad2737e YZ |
359 | /* |
360 | * We need to calculate how long before the voltage stops to drop | |
361 | * or increase. It returns with the loop count. Each loop takes | |
362 | * several readings (WAIT_FOR_ADC) | |
363 | */ | |
364 | static int wait_for_new_voltage(int vdd, int i2caddress) | |
365 | { | |
366 | int timeout, vdd_current; | |
367 | ||
368 | vdd_current = read_voltage(i2caddress); | |
369 | /* wait until voltage starts to reach the target. Voltage slew | |
370 | * rates by typical regulators will always lead to stable readings | |
371 | * within each fairly long ADC interval in comparison to the | |
372 | * intended voltage delta change until the target voltage is | |
373 | * reached. The fairly small voltage delta change to any target | |
374 | * VID voltage also means that this function will always complete | |
375 | * within few iterations. If the timeout was ever reached, it would | |
376 | * point to a serious failure in the regulator system. | |
377 | */ | |
378 | for (timeout = 0; | |
379 | abs(vdd - vdd_current) > (IR_VDD_STEP_UP + IR_VDD_STEP_DOWN) && | |
380 | timeout < MAX_LOOP_WAIT_NEW_VOL; timeout++) { | |
381 | vdd_current = read_voltage(i2caddress); | |
382 | } | |
383 | if (timeout >= MAX_LOOP_WAIT_NEW_VOL) { | |
384 | printf("VID: Voltage adjustment timeout\n"); | |
385 | return -1; | |
386 | } | |
387 | return timeout; | |
388 | } | |
389 | ||
390 | /* | |
b5ee48c0 | 391 | * Blocks and reads the VID voltage until it stabilizes, or the |
3ad2737e YZ |
392 | * timeout expires |
393 | */ | |
394 | static int wait_for_voltage_stable(int i2caddress) | |
395 | { | |
396 | int timeout, vdd_current, vdd; | |
397 | ||
398 | vdd = read_voltage(i2caddress); | |
399 | udelay(NUM_READINGS * WAIT_FOR_ADC); | |
400 | ||
3ad2737e | 401 | vdd_current = read_voltage(i2caddress); |
b5ee48c0 SC |
402 | /* |
403 | * The maximum timeout is | |
3ad2737e YZ |
404 | * MAX_LOOP_WAIT_VOL_STABLE * NUM_READINGS * WAIT_FOR_ADC |
405 | */ | |
406 | for (timeout = MAX_LOOP_WAIT_VOL_STABLE; | |
407 | abs(vdd - vdd_current) > ADC_MIN_ACCURACY && | |
408 | timeout > 0; timeout--) { | |
409 | vdd = vdd_current; | |
410 | udelay(NUM_READINGS * WAIT_FOR_ADC); | |
411 | vdd_current = read_voltage(i2caddress); | |
412 | } | |
413 | if (timeout == 0) | |
414 | return -1; | |
415 | return vdd_current; | |
416 | } | |
417 | ||
b5ee48c0 | 418 | /* Sets the VID voltage using the IR36021 */ |
3ad2737e YZ |
419 | static int set_voltage_to_IR(int i2caddress, int vdd) |
420 | { | |
421 | int wait, vdd_last; | |
422 | int ret; | |
423 | u8 vid; | |
b5ee48c0 SC |
424 | DEVICE_HANDLE_T dev; |
425 | ||
426 | /* Open device handle */ | |
15347d2d | 427 | ret = fsl_i2c_get_device(i2caddress, I2C_VOL_MONITOR_BUS, &dev); |
b5ee48c0 SC |
428 | if (ret) |
429 | return ret; | |
3ad2737e YZ |
430 | |
431 | /* Compensate for a board specific voltage drop between regulator and | |
432 | * SoC before converting into an IR VID value | |
433 | */ | |
434 | vdd += board_vdd_drop_compensation(); | |
126fe70d | 435 | #ifdef CONFIG_FSL_LSCH2 |
02b5d2ed SX |
436 | vid = DIV_ROUND_UP(vdd - 265, 5); |
437 | #else | |
3ad2737e | 438 | vid = DIV_ROUND_UP(vdd - 245, 5); |
02b5d2ed | 439 | #endif |
3ad2737e | 440 | |
b5ee48c0 SC |
441 | ret = I2C_WRITE(dev, IR36021_LOOP1_MANUAL_ID_OFFSET, (void *)&vid, |
442 | sizeof(vid)); | |
3ad2737e | 443 | if (ret) { |
b5ee48c0 | 444 | printf("VID: failed to write new voltage\n"); |
3ad2737e YZ |
445 | return -1; |
446 | } | |
447 | wait = wait_for_new_voltage(vdd, i2caddress); | |
448 | if (wait < 0) | |
449 | return -1; | |
450 | debug("VID: Waited %d us\n", wait * NUM_READINGS * WAIT_FOR_ADC); | |
451 | ||
452 | vdd_last = wait_for_voltage_stable(i2caddress); | |
453 | if (vdd_last < 0) | |
454 | return -1; | |
455 | debug("VID: Current voltage is %d mV\n", vdd_last); | |
456 | return vdd_last; | |
457 | } | |
23a12cb3 RB |
458 | #endif |
459 | ||
b5ee48c0 SC |
460 | #if defined(CONFIG_VOL_MONITOR_ISL68233_SET) || \ |
461 | defined(CONFIG_VOL_MONITOR_LTC3882_SET) | |
462 | static int set_voltage_to_pmbus(int i2caddress, int vdd) | |
23a12cb3 RB |
463 | { |
464 | int ret, vdd_last, vdd_target = vdd; | |
b5ee48c0 | 465 | int count = MAX_LOOP_WAIT_NEW_VOL, temp = 0, multiplier; |
02670317 | 466 | unsigned char value; |
23a12cb3 | 467 | |
b5ee48c0 SC |
468 | /* The data to be sent with the PMBus command PAGE_PLUS_WRITE */ |
469 | u8 buffer[5] = { 0x04, PWM_CHANNEL0, PMBUS_CMD_VOUT_COMMAND, 0, 0 }; | |
470 | DEVICE_HANDLE_T dev; | |
23a12cb3 | 471 | |
b5ee48c0 | 472 | /* Open device handle */ |
15347d2d | 473 | ret = fsl_i2c_get_device(i2caddress, I2C_VOL_MONITOR_BUS, &dev); |
b5ee48c0 SC |
474 | if (ret) |
475 | return ret; | |
476 | ||
477 | /* Scale up to the proper value for the VOUT command, little endian */ | |
478 | multiplier = get_pmbus_multiplier(dev); | |
479 | vdd += board_vdd_drop_compensation(); | |
480 | if (multiplier != MV_PER_V) | |
481 | vdd = DIV_ROUND_UP(vdd * multiplier, MV_PER_V); | |
482 | buffer[3] = vdd & 0xFF; | |
483 | buffer[4] = (vdd & 0xFF00) >> 8; | |
23a12cb3 | 484 | |
02670317 | 485 | /* Check write protect state */ |
b5ee48c0 SC |
486 | ret = I2C_READ(dev, PMBUS_CMD_WRITE_PROTECT, (void *)&value, |
487 | sizeof(value)); | |
02670317 BL |
488 | if (ret) |
489 | goto exit; | |
490 | ||
491 | if (value != EN_WRITE_ALL_CMD) { | |
492 | value = EN_WRITE_ALL_CMD; | |
b5ee48c0 | 493 | ret = I2C_WRITE(dev, PMBUS_CMD_WRITE_PROTECT, |
02670317 BL |
494 | (void *)&value, sizeof(value)); |
495 | if (ret) | |
496 | goto exit; | |
497 | } | |
498 | ||
b5ee48c0 SC |
499 | /* Write the desired voltage code to the regulator */ |
500 | ret = I2C_WRITE(dev, PMBUS_CMD_PAGE_PLUS_WRITE, (void *)&buffer[0], | |
501 | sizeof(buffer)); | |
23a12cb3 | 502 | if (ret) { |
b5ee48c0 | 503 | printf("VID: I2C failed to write to the voltage regulator\n"); |
23a12cb3 RB |
504 | return -1; |
505 | } | |
506 | ||
b5ee48c0 SC |
507 | exit: |
508 | /* Wait for the voltage to get to the desired value */ | |
23a12cb3 | 509 | do { |
b5ee48c0 | 510 | vdd_last = read_voltage_from_pmbus(i2caddress); |
23a12cb3 RB |
511 | if (vdd_last < 0) { |
512 | printf("VID: Couldn't read sensor abort VID adjust\n"); | |
513 | return -1; | |
514 | } | |
df182a42 PJ |
515 | count--; |
516 | temp = vdd_last - vdd_target; | |
517 | } while ((abs(temp) > 2) && (count > 0)); | |
23a12cb3 RB |
518 | |
519 | return vdd_last; | |
520 | } | |
3ad2737e YZ |
521 | #endif |
522 | ||
523 | static int set_voltage(int i2caddress, int vdd) | |
524 | { | |
525 | int vdd_last = -1; | |
526 | ||
527 | #ifdef CONFIG_VOL_MONITOR_IR36021_SET | |
528 | vdd_last = set_voltage_to_IR(i2caddress, vdd); | |
b5ee48c0 SC |
529 | #elif defined(CONFIG_VOL_MONITOR_ISL68233_SET) || \ |
530 | defined(CONFIG_VOL_MONITOR_LTC3882_SET) | |
531 | vdd_last = set_voltage_to_pmbus(i2caddress, vdd); | |
3ad2737e YZ |
532 | #else |
533 | #error Specific voltage monitor must be defined | |
534 | #endif | |
535 | return vdd_last; | |
536 | } | |
537 | ||
538 | int adjust_vdd(ulong vdd_override) | |
539 | { | |
540 | int re_enable = disable_interrupts(); | |
b5ee48c0 | 541 | #if defined(CONFIG_FSL_LSCH2) || defined(CONFIG_FSL_LSCH3) |
6cc04547 | 542 | struct ccsr_gur *gur = (void *)(CFG_SYS_FSL_GUTS_ADDR); |
9458316a | 543 | #else |
b5ee48c0 | 544 | ccsr_gur_t __iomem *gur = |
5155207a | 545 | (void __iomem *)(CFG_SYS_MPC85xx_GUTS_ADDR); |
9458316a | 546 | #endif |
b5ee48c0 SC |
547 | u8 vid; |
548 | u32 fusesr; | |
549 | int vdd_current, vdd_last, vdd_target; | |
550 | int ret, i2caddress = I2C_VOL_MONITOR_ADDR; | |
29ca713c PJ |
551 | unsigned long vdd_string_override; |
552 | char *vdd_string; | |
c535ad4e | 553 | |
9458316a RB |
554 | #if defined(CONFIG_VOL_MONITOR_IR36021_SET) || \ |
555 | defined(CONFIG_VOL_MONITOR_IR36021_READ) | |
b5ee48c0 SC |
556 | u8 buf; |
557 | DEVICE_HANDLE_T dev; | |
9458316a | 558 | #endif |
29ca713c | 559 | |
b5ee48c0 SC |
560 | /* |
561 | * VID is used according to the table below | |
562 | * --------------------------------------- | |
563 | * | DA_V | | |
564 | * |-------------------------------------| | |
565 | * | 5b00000 | 5b00001-5b11110 | 5b11111 | | |
566 | * ---------------+---------+-----------------+---------| | |
567 | * | D | 5b00000 | NO VID | VID = DA_V | NO VID | | |
568 | * | A |----------+---------+-----------------+---------| | |
569 | * | _ | 5b00001 |VID = | VID = |VID = | | |
570 | * | V | ~ | DA_V_ALT| DA_V_ALT | DA_A_VLT| | |
571 | * | _ | 5b11110 | | | | | |
572 | * | A |----------+---------+-----------------+---------| | |
573 | * | L | 5b11111 | No VID | VID = DA_V | NO VID | | |
574 | * | T | | | | | | |
575 | * ------------------------------------------------------ | |
576 | */ | |
577 | #if defined(CONFIG_FSL_LSCH3) | |
29ca713c PJ |
578 | fusesr = in_le32(&gur->dcfg_fusesr); |
579 | vid = (fusesr >> FSL_CHASSIS3_DCFG_FUSESR_ALTVID_SHIFT) & | |
b5ee48c0 SC |
580 | FSL_CHASSIS3_DCFG_FUSESR_ALTVID_MASK; |
581 | if (vid == 0 || vid == FSL_CHASSIS3_DCFG_FUSESR_ALTVID_MASK) { | |
29ca713c | 582 | vid = (fusesr >> FSL_CHASSIS3_DCFG_FUSESR_VID_SHIFT) & |
b5ee48c0 | 583 | FSL_CHASSIS3_DCFG_FUSESR_VID_MASK; |
29ca713c | 584 | } |
b5ee48c0 SC |
585 | #elif defined(CONFIG_FSL_LSCH2) |
586 | fusesr = in_be32(&gur->dcfg_fusesr); | |
587 | vid = (fusesr >> FSL_CHASSIS2_DCFG_FUSESR_ALTVID_SHIFT) & | |
588 | FSL_CHASSIS2_DCFG_FUSESR_ALTVID_MASK; | |
589 | if (vid == 0 || vid == FSL_CHASSIS2_DCFG_FUSESR_ALTVID_MASK) { | |
590 | vid = (fusesr >> FSL_CHASSIS2_DCFG_FUSESR_VID_SHIFT) & | |
591 | FSL_CHASSIS2_DCFG_FUSESR_VID_MASK; | |
29ca713c | 592 | } |
23a12cb3 | 593 | #else |
b5ee48c0 SC |
594 | fusesr = in_be32(&gur->dcfg_fusesr); |
595 | vid = (fusesr >> FSL_CORENET_DCFG_FUSESR_ALTVID_SHIFT) & | |
596 | FSL_CORENET_DCFG_FUSESR_ALTVID_MASK; | |
597 | if (vid == 0 || vid == FSL_CORENET_DCFG_FUSESR_ALTVID_MASK) { | |
598 | vid = (fusesr >> FSL_CORENET_DCFG_FUSESR_VID_SHIFT) & | |
599 | FSL_CORENET_DCFG_FUSESR_VID_MASK; | |
29ca713c | 600 | } |
23a12cb3 | 601 | #endif |
b5ee48c0 | 602 | vdd_target = soc_get_fuse_vid((int)vid); |
3ad2737e YZ |
603 | |
604 | ret = i2c_multiplexer_select_vid_channel(I2C_MUX_CH_VOL_MONITOR); | |
605 | if (ret) { | |
606 | debug("VID: I2C failed to switch channel\n"); | |
607 | ret = -1; | |
608 | goto exit; | |
609 | } | |
b5ee48c0 | 610 | |
9458316a RB |
611 | #if defined(CONFIG_VOL_MONITOR_IR36021_SET) || \ |
612 | defined(CONFIG_VOL_MONITOR_IR36021_READ) | |
3ad2737e YZ |
613 | ret = find_ir_chip_on_i2c(); |
614 | if (ret < 0) { | |
615 | printf("VID: Could not find voltage regulator on I2C.\n"); | |
616 | ret = -1; | |
617 | goto exit; | |
618 | } else { | |
619 | i2caddress = ret; | |
620 | debug("VID: IR Chip found on I2C address 0x%02x\n", i2caddress); | |
621 | } | |
622 | ||
15347d2d | 623 | ret = fsl_i2c_get_device(i2caddress, I2C_VOL_MONITOR_BUS, &dev); |
b5ee48c0 SC |
624 | if (ret) |
625 | return ret; | |
0eba65d2 | 626 | |
b5ee48c0 SC |
627 | /* check IR chip work on Intel mode */ |
628 | ret = I2C_READ(dev, IR36021_INTEL_MODE_OFFSET, (void *)&buf, | |
629 | sizeof(buf)); | |
cabe4d2f YZ |
630 | if (ret) { |
631 | printf("VID: failed to read IR chip mode.\n"); | |
632 | ret = -1; | |
633 | goto exit; | |
634 | } | |
635 | if ((buf & IR36021_MODE_MASK) != IR36021_INTEL_MODE) { | |
636 | printf("VID: IR Chip is not used in Intel mode.\n"); | |
637 | ret = -1; | |
638 | goto exit; | |
639 | } | |
9458316a | 640 | #endif |
cabe4d2f | 641 | |
3ad2737e | 642 | /* check override variable for overriding VDD */ |
00caae6d | 643 | vdd_string = env_get(CONFIG_VID_FLS_ENV); |
b5ee48c0 SC |
644 | debug("VID: Initial VDD value is %d mV\n", |
645 | DIV_ROUND_UP(vdd_target, 10)); | |
3ad2737e YZ |
646 | if (vdd_override == 0 && vdd_string && |
647 | !strict_strtoul(vdd_string, 10, &vdd_string_override)) | |
648 | vdd_override = vdd_string_override; | |
649 | if (vdd_override >= VDD_MV_MIN && vdd_override <= VDD_MV_MAX) { | |
650 | vdd_target = vdd_override * 10; /* convert to 1/10 mV */ | |
b5ee48c0 | 651 | debug("VID: VDD override is %lu\n", vdd_override); |
3ad2737e | 652 | } else if (vdd_override != 0) { |
b5ee48c0 | 653 | printf("VID: Invalid VDD value.\n"); |
3ad2737e YZ |
654 | } |
655 | if (vdd_target == 0) { | |
656 | debug("VID: VID not used\n"); | |
657 | ret = 0; | |
658 | goto exit; | |
659 | } else { | |
660 | /* divide and round up by 10 to get a value in mV */ | |
661 | vdd_target = DIV_ROUND_UP(vdd_target, 10); | |
662 | debug("VID: vid = %d mV\n", vdd_target); | |
663 | } | |
664 | ||
665 | /* | |
666 | * Read voltage monitor to check real voltage. | |
667 | */ | |
668 | vdd_last = read_voltage(i2caddress); | |
669 | if (vdd_last < 0) { | |
670 | printf("VID: Couldn't read sensor abort VID adjustment\n"); | |
671 | ret = -1; | |
672 | goto exit; | |
673 | } | |
674 | vdd_current = vdd_last; | |
675 | debug("VID: Core voltage is currently at %d mV\n", vdd_last); | |
b5ee48c0 SC |
676 | |
677 | #if defined(CONFIG_VOL_MONITOR_LTC3882_SET) || \ | |
678 | defined(CONFIG_VOL_MONITOR_ISL68233_SET) | |
679 | /* Set the target voltage */ | |
680 | vdd_current = set_voltage(i2caddress, vdd_target); | |
681 | vdd_last = vdd_current; | |
682 | #else | |
3ad2737e YZ |
683 | /* |
684 | * Adjust voltage to at or one step above target. | |
685 | * As measurements are less precise than setting the values | |
686 | * we may run through dummy steps that cancel each other | |
687 | * when stepping up and then down. | |
688 | */ | |
689 | while (vdd_last > 0 && | |
690 | vdd_last < vdd_target) { | |
691 | vdd_current += IR_VDD_STEP_UP; | |
692 | vdd_last = set_voltage(i2caddress, vdd_current); | |
693 | } | |
694 | while (vdd_last > 0 && | |
695 | vdd_last > vdd_target + (IR_VDD_STEP_DOWN - 1)) { | |
696 | vdd_current -= IR_VDD_STEP_DOWN; | |
697 | vdd_last = set_voltage(i2caddress, vdd_current); | |
698 | } | |
b5ee48c0 SC |
699 | #endif |
700 | ||
701 | /* Board specific adjustments */ | |
702 | if (board_adjust_vdd(vdd_target) < 0) { | |
703 | ret = -1; | |
704 | goto exit; | |
705 | } | |
3ad2737e YZ |
706 | |
707 | if (vdd_last > 0) | |
708 | printf("VID: Core voltage after adjustment is at %d mV\n", | |
709 | vdd_last); | |
710 | else | |
711 | ret = -1; | |
712 | exit: | |
713 | if (re_enable) | |
714 | enable_interrupts(); | |
1be8d10b WS |
715 | |
716 | i2c_multiplexer_select_vid_channel(I2C_MUX_CH_DEFAULT); | |
717 | ||
3ad2737e YZ |
718 | return ret; |
719 | } | |
720 | ||
721 | static int print_vdd(void) | |
722 | { | |
b5ee48c0 | 723 | int vdd_last, ret, i2caddress = I2C_VOL_MONITOR_ADDR; |
3ad2737e YZ |
724 | |
725 | ret = i2c_multiplexer_select_vid_channel(I2C_MUX_CH_VOL_MONITOR); | |
726 | if (ret) { | |
727 | debug("VID : I2c failed to switch channel\n"); | |
728 | return -1; | |
729 | } | |
9458316a RB |
730 | #if defined(CONFIG_VOL_MONITOR_IR36021_SET) || \ |
731 | defined(CONFIG_VOL_MONITOR_IR36021_READ) | |
3ad2737e YZ |
732 | ret = find_ir_chip_on_i2c(); |
733 | if (ret < 0) { | |
734 | printf("VID: Could not find voltage regulator on I2C.\n"); | |
1be8d10b | 735 | goto exit; |
3ad2737e YZ |
736 | } else { |
737 | i2caddress = ret; | |
738 | debug("VID: IR Chip found on I2C address 0x%02x\n", i2caddress); | |
739 | } | |
9458316a | 740 | #endif |
3ad2737e YZ |
741 | |
742 | /* | |
743 | * Read voltage monitor to check real voltage. | |
744 | */ | |
745 | vdd_last = read_voltage(i2caddress); | |
746 | if (vdd_last < 0) { | |
747 | printf("VID: Couldn't read sensor abort VID adjustment\n"); | |
1be8d10b | 748 | goto exit; |
3ad2737e YZ |
749 | } |
750 | printf("VID: Core voltage is at %d mV\n", vdd_last); | |
1be8d10b WS |
751 | exit: |
752 | i2c_multiplexer_select_vid_channel(I2C_MUX_CH_DEFAULT); | |
753 | ||
754 | return ret < 0 ? -1 : 0; | |
3ad2737e YZ |
755 | } |
756 | ||
09140113 | 757 | static int do_vdd_override(struct cmd_tbl *cmdtp, |
3ad2737e | 758 | int flag, int argc, |
09140113 | 759 | char *const argv[]) |
3ad2737e YZ |
760 | { |
761 | ulong override; | |
c0eeb730 | 762 | int ret = 0; |
3ad2737e YZ |
763 | |
764 | if (argc < 2) | |
765 | return CMD_RET_USAGE; | |
766 | ||
c0eeb730 PS |
767 | if (!strict_strtoul(argv[1], 10, &override)) { |
768 | ret = adjust_vdd(override); | |
769 | if (ret < 0) | |
770 | return CMD_RET_FAILURE; | |
771 | } else | |
3ad2737e YZ |
772 | return CMD_RET_USAGE; |
773 | return 0; | |
774 | } | |
775 | ||
09140113 SG |
776 | static int do_vdd_read(struct cmd_tbl *cmdtp, int flag, int argc, |
777 | char *const argv[]) | |
3ad2737e YZ |
778 | { |
779 | if (argc < 1) | |
780 | return CMD_RET_USAGE; | |
781 | print_vdd(); | |
782 | ||
783 | return 0; | |
784 | } | |
785 | ||
786 | U_BOOT_CMD( | |
787 | vdd_override, 2, 0, do_vdd_override, | |
788 | "override VDD", | |
789 | " - override with the voltage specified in mV, eg. 1050" | |
790 | ); | |
791 | ||
792 | U_BOOT_CMD( | |
793 | vdd_read, 1, 0, do_vdd_read, | |
794 | "read VDD", | |
795 | " - Read the voltage specified in mV" | |
10c398d6 | 796 | ); |