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86902b8e KG |
1 | /* |
2 | * See file CREDITS for list of people who contributed to this | |
3 | * project. | |
4 | * | |
5 | * This program is free software; you can redistribute it and/or | |
6 | * modify it under the terms of the GNU General Public License as | |
7 | * published by the Free Software Foundation; either version 2 of | |
8 | * the License, or (at your option) any later version. | |
9 | * | |
10 | * This program is distributed in the hope that it will be useful, | |
11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
13 | * GNU General Public License for more details. | |
14 | * | |
15 | * You should have received a copy of the GNU General Public License | |
16 | * along with this program; if not, write to the Free Software | |
17 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, | |
18 | * MA 02111-1307 USA | |
19 | * | |
20 | */ | |
21 | ||
22 | #include <asm/mmu.h> | |
162338e1 | 23 | #include <asm/io.h> |
86902b8e | 24 | #include <common.h> |
162338e1 | 25 | #include <mpc83xx.h> |
86902b8e | 26 | #include <pci.h> |
86902b8e | 27 | #include <i2c.h> |
162338e1 | 28 | #include <asm/fsl_i2c.h> |
86902b8e | 29 | |
d87080b7 WD |
30 | DECLARE_GLOBAL_DATA_PTR; |
31 | ||
86902b8e KG |
32 | #ifdef CONFIG_PCI |
33 | ||
162338e1 IS |
34 | static struct pci_region pci1_regions[] = { |
35 | { | |
6d0f6bcf JCPV |
36 | bus_start: CONFIG_SYS_PCI1_MEM_BASE, |
37 | phys_start: CONFIG_SYS_PCI1_MEM_PHYS, | |
38 | size: CONFIG_SYS_PCI1_MEM_SIZE, | |
162338e1 IS |
39 | flags: PCI_REGION_MEM | PCI_REGION_PREFETCH |
40 | }, | |
41 | { | |
6d0f6bcf JCPV |
42 | bus_start: CONFIG_SYS_PCI1_IO_BASE, |
43 | phys_start: CONFIG_SYS_PCI1_IO_PHYS, | |
44 | size: CONFIG_SYS_PCI1_IO_SIZE, | |
162338e1 IS |
45 | flags: PCI_REGION_IO |
46 | }, | |
47 | { | |
6d0f6bcf JCPV |
48 | bus_start: CONFIG_SYS_PCI1_MMIO_BASE, |
49 | phys_start: CONFIG_SYS_PCI1_MMIO_PHYS, | |
50 | size: CONFIG_SYS_PCI1_MMIO_SIZE, | |
162338e1 | 51 | flags: PCI_REGION_MEM |
86902b8e | 52 | }, |
86902b8e | 53 | }; |
86902b8e | 54 | |
162338e1 IS |
55 | #ifdef CONFIG_MPC83XX_PCI2 |
56 | static struct pci_region pci2_regions[] = { | |
57 | { | |
6d0f6bcf JCPV |
58 | bus_start: CONFIG_SYS_PCI2_MEM_BASE, |
59 | phys_start: CONFIG_SYS_PCI2_MEM_PHYS, | |
60 | size: CONFIG_SYS_PCI2_MEM_SIZE, | |
162338e1 IS |
61 | flags: PCI_REGION_MEM | PCI_REGION_PREFETCH |
62 | }, | |
63 | { | |
6d0f6bcf JCPV |
64 | bus_start: CONFIG_SYS_PCI2_IO_BASE, |
65 | phys_start: CONFIG_SYS_PCI2_IO_PHYS, | |
66 | size: CONFIG_SYS_PCI2_IO_SIZE, | |
162338e1 IS |
67 | flags: PCI_REGION_IO |
68 | }, | |
69 | { | |
6d0f6bcf JCPV |
70 | bus_start: CONFIG_SYS_PCI2_MMIO_BASE, |
71 | phys_start: CONFIG_SYS_PCI2_MMIO_PHYS, | |
72 | size: CONFIG_SYS_PCI2_MMIO_SIZE, | |
162338e1 IS |
73 | flags: PCI_REGION_MEM |
74 | }, | |
86902b8e | 75 | }; |
162338e1 | 76 | #endif |
86902b8e | 77 | |
447ad576 | 78 | #ifndef CONFIG_PCISLAVE |
162338e1 | 79 | void pib_init(void) |
86902b8e | 80 | { |
183da6d9 | 81 | u8 val8, orig_i2c_bus; |
86902b8e KG |
82 | /* |
83 | * Assign PIB PMC slot to desired PCI bus | |
84 | */ | |
183da6d9 BW |
85 | /* Switch temporarily to I2C bus #2 */ |
86 | orig_i2c_bus = i2c_get_bus_num(); | |
dd520bf3 | 87 | i2c_set_bus_num(1); |
86902b8e KG |
88 | |
89 | val8 = 0; | |
90 | i2c_write(0x23, 0x6, 1, &val8, 1); | |
91 | i2c_write(0x23, 0x7, 1, &val8, 1); | |
92 | val8 = 0xff; | |
93 | i2c_write(0x23, 0x2, 1, &val8, 1); | |
94 | i2c_write(0x23, 0x3, 1, &val8, 1); | |
95 | ||
96 | val8 = 0; | |
97 | i2c_write(0x26, 0x6, 1, &val8, 1); | |
98 | val8 = 0x34; | |
99 | i2c_write(0x26, 0x7, 1, &val8, 1); | |
100 | #if defined(PCI_64BIT) | |
101 | val8 = 0xf4; /* PMC2:PCI1/64-bit */ | |
102 | #elif defined(PCI_ALL_PCI1) | |
103 | val8 = 0xf3; /* PMC1:PCI1 PMC2:PCI1 PMC3:PCI1 */ | |
104 | #elif defined(PCI_ONE_PCI1) | |
105 | val8 = 0xf9; /* PMC1:PCI1 PMC2:PCI2 PMC3:PCI2 */ | |
106 | #else | |
107 | val8 = 0xf5; /* PMC1:PCI1 PMC2:PCI1 PMC3:PCI2 */ | |
108 | #endif | |
109 | i2c_write(0x26, 0x2, 1, &val8, 1); | |
110 | val8 = 0xff; | |
111 | i2c_write(0x26, 0x3, 1, &val8, 1); | |
112 | val8 = 0; | |
113 | i2c_write(0x27, 0x6, 1, &val8, 1); | |
114 | i2c_write(0x27, 0x7, 1, &val8, 1); | |
115 | val8 = 0xff; | |
116 | i2c_write(0x27, 0x2, 1, &val8, 1); | |
117 | val8 = 0xef; | |
118 | i2c_write(0x27, 0x3, 1, &val8, 1); | |
119 | asm("eieio"); | |
120 | ||
121 | #if defined(PCI_64BIT) | |
122 | printf("PCI1: 64-bit on PMC2\n"); | |
123 | #elif defined(PCI_ALL_PCI1) | |
124 | printf("PCI1: 32-bit on PMC1, PMC2, PMC3\n"); | |
125 | #elif defined(PCI_ONE_PCI1) | |
126 | printf("PCI1: 32-bit on PMC1\n"); | |
127 | printf("PCI2: 32-bit on PMC2, PMC3\n"); | |
128 | #else | |
129 | printf("PCI1: 32-bit on PMC1, PMC2\n"); | |
130 | printf("PCI2: 32-bit on PMC3\n"); | |
131 | #endif | |
183da6d9 | 132 | /* Reset to original I2C bus */ |
be5e6181 | 133 | i2c_set_bus_num(orig_i2c_bus); |
86902b8e KG |
134 | } |
135 | ||
162338e1 | 136 | void pci_init_board(void) |
86902b8e | 137 | { |
6d0f6bcf | 138 | volatile immap_t *immr = (volatile immap_t *)CONFIG_SYS_IMMR; |
162338e1 IS |
139 | volatile clk83xx_t *clk = (volatile clk83xx_t *)&immr->clk; |
140 | volatile law83xx_t *pci_law = immr->sysconf.pcilaw; | |
141 | #ifndef CONFIG_MPC83XX_PCI2 | |
142 | struct pci_region *reg[] = { pci1_regions }; | |
143 | #else | |
144 | struct pci_region *reg[] = { pci1_regions, pci2_regions }; | |
145 | #endif | |
86902b8e | 146 | |
162338e1 | 147 | /* initialize the PCA9555PW IO expander on the PIB board */ |
86902b8e KG |
148 | pib_init(); |
149 | ||
162338e1 | 150 | /* Enable all 8 PCI_CLK_OUTPUTS */ |
86902b8e KG |
151 | clk->occr = 0xff000000; |
152 | udelay(2000); | |
153 | ||
162338e1 | 154 | /* Configure PCI Local Access Windows */ |
6d0f6bcf | 155 | pci_law[0].bar = CONFIG_SYS_PCI1_MEM_PHYS & LAWBAR_BAR; |
86902b8e KG |
156 | pci_law[0].ar = LAWAR_EN | LAWAR_SIZE_1G; |
157 | ||
6d0f6bcf | 158 | pci_law[1].bar = CONFIG_SYS_PCI1_IO_PHYS & LAWBAR_BAR; |
8fe9bf61 | 159 | pci_law[1].ar = LAWAR_EN | LAWAR_SIZE_4M; |
86902b8e | 160 | |
162338e1 | 161 | udelay(2000); |
86902b8e | 162 | |
162338e1 IS |
163 | #ifndef CONFIG_MPC83XX_PCI2 |
164 | mpc83xx_pci_init(1, reg, 0); | |
165 | #else | |
166 | mpc83xx_pci_init(2, reg, 0); | |
86902b8e | 167 | #endif |
86902b8e | 168 | } |
8fe9bf61 | 169 | |
447ad576 IS |
170 | #else |
171 | void pci_init_board(void) | |
172 | { | |
6d0f6bcf | 173 | volatile immap_t *immr = (volatile immap_t *)CONFIG_SYS_IMMR; |
447ad576 IS |
174 | volatile clk83xx_t *clk = (volatile clk83xx_t *)&immr->clk; |
175 | volatile law83xx_t *pci_law = immr->sysconf.pcilaw; | |
176 | volatile pcictrl83xx_t *pci_ctrl = &immr->pci_ctrl[0]; | |
177 | struct pci_region *reg[] = { pci1_regions }; | |
178 | ||
179 | /* Enable all 8 PCI_CLK_OUTPUTS */ | |
180 | clk->occr = 0xff000000; | |
181 | udelay(2000); | |
182 | ||
183 | /* Configure PCI Local Access Windows */ | |
6d0f6bcf | 184 | pci_law[0].bar = CONFIG_SYS_PCI1_MEM_PHYS & LAWBAR_BAR; |
447ad576 IS |
185 | pci_law[0].ar = LAWAR_EN | LAWAR_SIZE_1G; |
186 | ||
6d0f6bcf | 187 | pci_law[1].bar = CONFIG_SYS_PCI1_IO_PHYS & LAWBAR_BAR; |
447ad576 IS |
188 | pci_law[1].ar = LAWAR_EN | LAWAR_SIZE_4M; |
189 | ||
190 | udelay(2000); | |
191 | ||
192 | mpc83xx_pci_init(1, reg, 0); | |
193 | ||
194 | /* Configure PCI Inbound Translation Windows (3 1MB windows) */ | |
195 | pci_ctrl->pitar0 = 0x0; | |
196 | pci_ctrl->pibar0 = 0x0; | |
197 | pci_ctrl->piwar0 = PIWAR_EN | PIWAR_PF | PIWAR_RTT_SNOOP | | |
198 | PIWAR_WTT_SNOOP | PIWAR_IWS_1M; | |
199 | ||
200 | pci_ctrl->pitar1 = 0x0; | |
201 | pci_ctrl->pibar1 = 0x0; | |
202 | pci_ctrl->piebar1 = 0x0; | |
203 | pci_ctrl->piwar1 = PIWAR_EN | PIWAR_PF | PIWAR_RTT_SNOOP | | |
204 | PIWAR_WTT_SNOOP | PIWAR_IWS_1M; | |
205 | ||
206 | pci_ctrl->pitar2 = 0x0; | |
207 | pci_ctrl->pibar2 = 0x0; | |
208 | pci_ctrl->piebar2 = 0x0; | |
209 | pci_ctrl->piwar2 = PIWAR_EN | PIWAR_PF | PIWAR_RTT_SNOOP | | |
210 | PIWAR_WTT_SNOOP | PIWAR_IWS_1M; | |
211 | ||
212 | /* Unlock the configuration bit */ | |
213 | mpc83xx_pcislave_unlock(0); | |
214 | printf("PCI: Agent mode enabled\n"); | |
215 | } | |
216 | #endif /* CONFIG_PCISLAVE */ | |
217 | ||
86902b8e | 218 | #endif /* CONFIG_PCI */ |