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rename CFG_ macros to CONFIG_SYS
[people/ms/u-boot.git] / board / incaip / incaip.c
CommitLineData
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WD
1/*
2 * (C) Copyright 2003
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24#include <common.h>
25#include <command.h>
8218bd2a 26#include <netdev.h>
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27#include <asm/addrspace.h>
28#include <asm/inca-ip.h>
5c15010e 29#include <asm/io.h>
b0c66af5 30#include <asm/reboot.h>
c021880a 31
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32extern uint incaip_get_cpuclk(void);
33
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34void _machine_restart(void)
35{
36 *INCA_IP_WDT_RST_REQ = 0x3f;
37}
38
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39static ulong max_sdram_size(void)
40{
41 /* The only supported SDRAM data width is 16bit.
42 */
6d0f6bcf 43#define CONFIG_SYS_DW 2
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44
45 /* The only supported number of SDRAM banks is 4.
46 */
6d0f6bcf 47#define CONFIG_SYS_NB 4
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48
49 ulong cfgpb0 = *INCA_IP_SDRAM_MC_CFGPB0;
50 int cols = cfgpb0 & 0xF;
51 int rows = (cfgpb0 & 0xF0) >> 4;
6d0f6bcf 52 ulong size = (1 << (rows + cols)) * CONFIG_SYS_DW * CONFIG_SYS_NB;
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53
54 return size;
55}
56
9973e3c6 57phys_size_t initdram(int board_type)
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58{
59 int rows, cols, best_val = *INCA_IP_SDRAM_MC_CFGPB0;
60 ulong size, max_size = 0;
61 ulong our_address;
62
63 asm volatile ("move %0, $25" : "=r" (our_address) :);
64
65 /* Can't probe for RAM size unless we are running from Flash.
66 */
7daf2ebe 67 if (CPHYSADDR(our_address) < CPHYSADDR(PHYS_FLASH_1))
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68 {
69 return max_sdram_size();
70 }
71
72 for (cols = 0x8; cols <= 0xC; cols++)
73 {
74 for (rows = 0xB; rows <= 0xD; rows++)
75 {
76 *INCA_IP_SDRAM_MC_CFGPB0 = (0x14 << 8) |
77 (rows << 4) | cols;
6d0f6bcf 78 size = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE,
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79 max_sdram_size());
80
81 if (size > max_size)
82 {
83 best_val = *INCA_IP_SDRAM_MC_CFGPB0;
84 max_size = size;
85 }
86 }
87 }
88
89 *INCA_IP_SDRAM_MC_CFGPB0 = best_val;
90 return max_size;
91}
92
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93int checkboard (void)
94{
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95 unsigned long chipid = *INCA_IP_WDT_CHIPID;
96 int part_num;
97
98 puts ("Board: INCA-IP ");
99 part_num = (chipid >> 12) & 0xffff;
100 switch (part_num) {
101 case 0xc0:
102 printf ("Standard Version, ");
103 break;
104 case 0xc1:
105 printf ("Basic Version, ");
106 break;
107 default:
108 printf ("Unknown Part Number 0x%x ", part_num);
109 break;
110 }
111
112 printf ("Chip V1.%ld, ", (chipid >> 28));
113
114 printf("CPU Speed %d MHz\n", incaip_get_cpuclk()/1000000);
115
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116 set_io_port_base(0);
117
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118 return 0;
119}
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120
121#if defined(CONFIG_INCA_IP_SWITCH)
122int board_eth_init(bd_t *bis)
123{
124 return inca_switch_initialize(bis);
125}
126#endif