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rename CFG_ macros to CONFIG_SYS
[people/ms/u-boot.git] / board / integratorcp / flash.c
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3d3befa7 1/*
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2 * (C) Copyright 2004
3 * Xiaogeng (Shawn) Jin, Agilent Technologies, xiaogeng_jin@agilent.com
4 *
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5 * (C) Copyright 2001
6 * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net
7 *
8 * (C) Copyright 2001-2004
9 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
10 *
11 * (C) Copyright 2003
12 * Texas Instruments, <www.ti.com>
13 * Kshitij Gupta <Kshitij@ti.com>
14 *
15 * See file CREDITS for list of people who contributed to this
16 * project.
17 *
18 * This program is free software; you can redistribute it and/or
19 * modify it under the terms of the GNU General Public License as
20 * published by the Free Software Foundation; either version 2 of
21 * the License, or (at your option) any later version.
22 *
23 * This program is distributed in the hope that it will be useful,
24 * but WITHOUT ANY WARRANTY; without even the implied warranty of
25 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
26 * GNU General Public License for more details.
27 *
28 * You should have received a copy of the GNU General Public License
29 * along with this program; if not, write to the Free Software
30 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
31 * MA 02111-1307 USA
32 */
33
34#include <common.h>
35#include <linux/byteorder/swab.h>
36
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37#define DEBUG
38
39#define PHYS_FLASH_SECT_SIZE 0x00040000 /* 256 KB sectors (x2) */
6d0f6bcf 40flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH chips */
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41
42/* Board support for 1 or 2 flash devices */
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43#define FLASH_PORT_WIDTH32
44#undef FLASH_PORT_WIDTH16
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45
46#ifdef FLASH_PORT_WIDTH16
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47#define FLASH_PORT_WIDTH ushort
48#define FLASH_PORT_WIDTHV vu_short
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49#define SWAP(x) __swab16(x)
50#else
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51#define FLASH_PORT_WIDTH ulong
52#define FLASH_PORT_WIDTHV vu_long
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53#define SWAP(x) __swab32(x)
54#endif
55
56#define FPW FLASH_PORT_WIDTH
57#define FPWV FLASH_PORT_WIDTHV
58
59#define mb() __asm__ __volatile__ ("" : : : "memory")
60
61
62/* Flash Organization Structure */
63typedef struct OrgDef {
64 unsigned int sector_number;
65 unsigned int sector_size;
66} OrgDef;
67
68
69/* Flash Organizations */
70OrgDef OrgIntel_28F256L18T[] = {
71 {4, 32 * 1024}, /* 4 * 32kBytes sectors */
72 {255, 128 * 1024}, /* 255 * 128kBytes sectors */
73};
74
5a95f6fb 75/* CP control register base address */
53677ef1 76#define CPCR_BASE 0xCB000000
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77#define CPCR_EXTRABANK 0x8
78#define CPCR_FLASHSIZE 0x4
79#define CPCR_FLWREN 0x2
80#define CPCR_FLVPPEN 0x1
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81
82/*-----------------------------------------------------------------------
83 * Functions
84 */
85unsigned long flash_init (void);
86static ulong flash_get_size (FPW * addr, flash_info_t * info);
87static int write_data (flash_info_t * info, ulong dest, FPW data);
88static void flash_get_offsets (ulong base, flash_info_t * info);
89void inline spin_wheel (void);
90void flash_print_info (flash_info_t * info);
91void flash_unprotect_sectors (FPWV * addr);
92int flash_erase (flash_info_t * info, int s_first, int s_last);
93int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt);
94
95/*-----------------------------------------------------------------------
96 */
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97unsigned long flash_init (void)
98{
5a95f6fb 99 int i, nbanks;
3d3befa7 100 ulong size = 0;
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101 vu_long *cpcr = (vu_long *)CPCR_BASE;
102
103 /* Check if there is an extra bank of flash */
104 if (cpcr[1] & CPCR_EXTRABANK)
105 nbanks = 2;
106 else
107 nbanks = 1;
108
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109 if (nbanks > CONFIG_SYS_MAX_FLASH_BANKS)
110 nbanks = CONFIG_SYS_MAX_FLASH_BANKS;
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111
112 /* Enable flash write */
113 cpcr[1] |= 3;
114
115 for (i = 0; i < nbanks; i++) {
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116 flash_get_size ((FPW *)(CONFIG_SYS_FLASH_BASE + size), &flash_info[i]);
117 flash_get_offsets (CONFIG_SYS_FLASH_BASE + size, &flash_info[i]);
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118 size += flash_info[i].size;
119 }
120
6d0f6bcf 121#if CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE
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122 /* monitor protection */
123 flash_protect (FLAG_PROTECT_SET,
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124 CONFIG_SYS_MONITOR_BASE,
125 CONFIG_SYS_MONITOR_BASE + monitor_flash_len - 1, &flash_info[0]);
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126#endif
127
5a1aceb0 128#ifdef CONFIG_ENV_IS_IN_FLASH
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129 /* ENV protection ON */
130 flash_protect(FLAG_PROTECT_SET,
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131 CONFIG_ENV_ADDR,
132 CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE - 1,
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133 &flash_info[0]);
134#endif
135
136 /* Protect SIB (0x24800000) and bootMonitor (0x24c00000) */
3d3befa7 137 flash_protect (FLAG_PROTECT_SET,
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138 flash_info[0].start[62],
139 flash_info[0].start[63] + PHYS_FLASH_SECT_SIZE - 1,
140 &flash_info[0]);
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141
142 return size;
143}
144
145/*-----------------------------------------------------------------------
146 */
147static void flash_get_offsets (ulong base, flash_info_t * info)
148{
149 int i;
3d3befa7 150
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151 if (info->flash_id == FLASH_UNKNOWN) {
152 return;
153 }
154
155 if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL) {
156 for (i = 0; i < info->sector_count; i++) {
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157 info->start[i] = base + (i * PHYS_FLASH_SECT_SIZE);
158 info->protect[i] = 0;
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159 }
160 }
161}
162
163/*-----------------------------------------------------------------------
164 */
165void flash_print_info (flash_info_t * info)
166{
167 int i;
168
169 if (info->flash_id == FLASH_UNKNOWN) {
170 printf ("missing or unknown FLASH type\n");
171 return;
172 }
173
174 switch (info->flash_id & FLASH_VENDMASK) {
175 case FLASH_MAN_INTEL:
176 printf ("INTEL ");
177 break;
178 default:
179 printf ("Unknown Vendor ");
180 break;
181 }
182
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183 /* Integrator CP board uses 28F640J3C or 28F128J3C parts,
184 * which have the same device id numbers as 28F640J3A or
185 * 28F128J3A
186 */
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187 switch (info->flash_id & FLASH_TYPEMASK) {
188 case FLASH_28F256L18T:
189 printf ("FLASH 28F256L18T\n");
190 break;
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191 case FLASH_28F640J3A:
192 printf ("FLASH 28F640J3C\n");
193 break;
194 case FLASH_28F128J3A:
195 printf ("FLASH 28F128J3C\n");
196 break;
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197 default:
198 printf ("Unknown Chip Type\n");
199 break;
200 }
201
202 printf (" Size: %ld MB in %d Sectors\n",
203 info->size >> 20, info->sector_count);
204
205 printf (" Sector Start Addresses:");
206 for (i = 0; i < info->sector_count; ++i) {
207 if ((i % 5) == 0)
208 printf ("\n ");
209 printf (" %08lX%s",
210 info->start[i], info->protect[i] ? " (RO)" : " ");
211 }
212 printf ("\n");
213 return;
214}
215
216/*
217 * The following code cannot be run from FLASH!
218 */
219static ulong flash_get_size (FPW * addr, flash_info_t * info)
220{
221 volatile FPW value;
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222 vu_long *cpcr = (vu_long *)CPCR_BASE;
223 int nsects;
224
225 /* Check the flash size */
226 if (cpcr[1] & CPCR_FLASHSIZE)
227 nsects = 128;
228 else
229 nsects = 64;
230
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231 if (nsects > CONFIG_SYS_MAX_FLASH_SECT)
232 nsects = CONFIG_SYS_MAX_FLASH_SECT;
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233
234 /* Write auto select command: read Manufacturer ID */
235 addr[0x5555] = (FPW) 0x00AA00AA;
236 addr[0x2AAA] = (FPW) 0x00550055;
237 addr[0x5555] = (FPW) 0x00900090;
238
239 mb ();
240 value = addr[0];
241
242 switch (value) {
243
244 case (FPW) INTEL_MANUFACT:
245 info->flash_id = FLASH_MAN_INTEL;
246 break;
247
248 default:
249 info->flash_id = FLASH_UNKNOWN;
250 info->sector_count = 0;
251 info->size = 0;
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252 addr[0] = (FPW) 0x00FF00FF; /* restore read mode */
253 return (0); /* no or unknown flash */
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254 }
255
256 mb ();
5a95f6fb 257 value = addr[1]; /* device ID */
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258 switch (value) {
259
260 case (FPW) (INTEL_ID_28F256L18T):
261 info->flash_id += FLASH_28F256L18T;
262 info->sector_count = 259;
263 info->size = 0x02000000;
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264 break; /* => 32 MB */
265
266 case (FPW) (INTEL_ID_28F640J3A):
267 info->flash_id += FLASH_28F640J3A;
268 info->sector_count = nsects;
269 info->size = nsects * PHYS_FLASH_SECT_SIZE;
270 break;
271
272 case (FPW) (INTEL_ID_28F128J3A):
273 info->flash_id += FLASH_28F128J3A;
274 info->sector_count = nsects;
275 info->size = nsects * PHYS_FLASH_SECT_SIZE;
276 break;
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277
278 default:
279 info->flash_id = FLASH_UNKNOWN;
280 break;
281 }
282
6d0f6bcf 283 if (info->sector_count > CONFIG_SYS_MAX_FLASH_SECT) {
3d3befa7 284 printf ("** ERROR: sector count %d > max (%d) **\n",
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285 info->sector_count, CONFIG_SYS_MAX_FLASH_SECT);
286 info->sector_count = CONFIG_SYS_MAX_FLASH_SECT;
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287 }
288
289 addr[0] = (FPW) 0x00FF00FF; /* restore read mode */
290
291 return (info->size);
292}
293
294
295/* unprotects a sector for write and erase
296 * on some intel parts, this unprotects the entire chip, but it
297 * wont hurt to call this additional times per sector...
298 */
299void flash_unprotect_sectors (FPWV * addr)
300{
5a95f6fb 301 FPW status;
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302
303 *addr = (FPW) 0x00500050; /* clear status register */
304
305 /* this sends the clear lock bit command */
306 *addr = (FPW) 0x00600060;
307 *addr = (FPW) 0x00D000D0;
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308
309 reset_timer_masked();
310 while (((status = *addr) & (FPW)0x00800080) != 0x00800080) {
6d0f6bcf 311 if (get_timer_masked() > CONFIG_SYS_FLASH_ERASE_TOUT) {
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312 printf("Timeout");
313 break;
314 }
315 }
316
317 *addr = (FPW) 0x00FF00FF;
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318}
319
320
321/*-----------------------------------------------------------------------
322 */
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323int flash_erase (flash_info_t * info, int s_first, int s_last)
324{
325 int flag, prot, sect;
5a95f6fb 326 ulong type;
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327 int rcode = 0;
328
329 if ((s_first < 0) || (s_first > s_last)) {
330 if (info->flash_id == FLASH_UNKNOWN) {
331 printf ("- missing\n");
332 } else {
333 printf ("- no sectors to erase\n");
334 }
335 return 1;
336 }
337
338 type = (info->flash_id & FLASH_VENDMASK);
339 if ((type != FLASH_MAN_INTEL)) {
340 printf ("Can't erase unknown flash type %08lx - aborted\n",
341 info->flash_id);
342 return 1;
343 }
344
345 prot = 0;
346 for (sect = s_first; sect <= s_last; ++sect) {
347 if (info->protect[sect]) {
348 prot++;
349 }
350 }
351
352 if (prot) {
353 printf ("- Warning: %d protected sectors will not be erased!\n",
354 prot);
355 } else {
356 printf ("\n");
357 }
358
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359 /* Start erase on unprotected sectors */
360 for (sect = s_first; sect <= s_last; sect++) {
361 if (info->protect[sect] == 0) { /* not protected */
362 FPWV *addr = (FPWV *) (info->start[sect]);
363 FPW status;
364
365 printf ("Erasing sector %2d ... ", sect);
366
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367 /* Disable interrupts which might cause a timeout here */
368 flag = disable_interrupts ();
369
370 /* flash_unprotect_sectors (addr); */
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371
372 /* arm simple, non interrupt dependent timer */
373 reset_timer_masked ();
374
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375 *addr = (FPW) 0x00500050; /* clear status register */
376 *addr = (FPW) 0x00200020; /* erase setup */
377 *addr = (FPW) 0x00D000D0; /* erase confirm */
378 mb();
379
380 udelay(1000); /* Let's wait 1 ms */
381
382 /* re-enable interrupts if necessary */
383 if (flag)
384 enable_interrupts();
385
386 while (((status = *addr) & (FPW) 0x00800080) != (FPW) 0x00800080) {
6d0f6bcf 387 if (get_timer_masked () > CONFIG_SYS_FLASH_ERASE_TOUT) {
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388 *addr = (FPW)0x00700070;
389 status = *addr;
390 if ((status & (FPW) 0x00400040) == (FPW) 0x00400040) {
391 /* erase suspended? Resume it */
392 reset_timer_masked();
393 *addr = (FPW) 0x00D000D0;
394 } else {
395#ifdef DEBUG
0a5676be 396 printf ("Timeout,0x%08lx\n", status);
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397#else
398 printf("Timeout\n");
399#endif
400
401 *addr = (FPW) 0x00500050;
402 *addr = (FPW) 0x00FF00FF; /* reset to read mode */
403 rcode = 1;
404 break;
405 }
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406 }
407 }
408
5a95f6fb 409 *addr = (FPW) 0x00FF00FF; /* resest to read mode */
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410 printf (" done\n");
411 }
412 }
5a95f6fb 413
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414 return rcode;
415}
416
417/*-----------------------------------------------------------------------
418 * Copy memory to flash, returns:
419 * 0 - OK
420 * 1 - write timeout
421 * 2 - Flash not erased
422 * 4 - Flash not identified
423 */
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424int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
425{
426 ulong cp, wp;
427 FPW data;
428 int count, i, l, rc, port_width;
429
430 if (info->flash_id == FLASH_UNKNOWN) {
431 return 4;
432 }
433/* get lower word aligned address */
434#ifdef FLASH_PORT_WIDTH16
435 wp = (addr & ~1);
436 port_width = 2;
437#else
438 wp = (addr & ~3);
439 port_width = 4;
440#endif
441
442 /*
443 * handle unaligned start bytes
444 */
445 if ((l = addr - wp) != 0) {
446 data = 0;
447 for (i = 0, cp = wp; i < l; ++i, ++cp) {
448 data = (data << 8) | (*(uchar *) cp);
449 }
450 for (; i < port_width && cnt > 0; ++i) {
451 data = (data << 8) | *src++;
452 --cnt;
453 ++cp;
454 }
455 for (; cnt == 0 && i < port_width; ++i, ++cp) {
456 data = (data << 8) | (*(uchar *) cp);
457 }
458
459 if ((rc = write_data (info, wp, SWAP (data))) != 0) {
460 return (rc);
461 }
462 wp += port_width;
463 }
464
465 /*
466 * handle word aligned part
467 */
468 count = 0;
469 while (cnt >= port_width) {
470 data = 0;
471 for (i = 0; i < port_width; ++i) {
472 data = (data << 8) | *src++;
473 }
474 if ((rc = write_data (info, wp, SWAP (data))) != 0) {
475 return (rc);
476 }
477 wp += port_width;
478 cnt -= port_width;
479 if (count++ > 0x800) {
480 spin_wheel ();
481 count = 0;
482 }
483 }
484
485 if (cnt == 0) {
486 return (0);
487 }
488
489 /*
490 * handle unaligned tail bytes
491 */
492 data = 0;
493 for (i = 0, cp = wp; i < port_width && cnt > 0; ++i, ++cp) {
494 data = (data << 8) | *src++;
495 --cnt;
496 }
497 for (; i < port_width; ++i, ++cp) {
498 data = (data << 8) | (*(uchar *) cp);
499 }
500
501 return (write_data (info, wp, SWAP (data)));
502}
503
504/*-----------------------------------------------------------------------
505 * Write a word or halfword to Flash, returns:
506 * 0 - OK
507 * 1 - write timeout
508 * 2 - Flash not erased
509 */
510static int write_data (flash_info_t * info, ulong dest, FPW data)
511{
512 FPWV *addr = (FPWV *) dest;
513 ulong status;
514 int flag;
515
516 /* Check if Flash is (sufficiently) erased */
517 if ((*addr & data) != data) {
0a5676be 518 printf ("not erased at %08lx (%lx)\n", (ulong) addr, *addr);
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519 return (2);
520 }
5a95f6fb 521
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522 /* Disable interrupts which might cause a timeout here */
523 flag = disable_interrupts ();
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524
525 /* flash_unprotect_sectors (addr); */
526
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527 *addr = (FPW) 0x00400040; /* write setup */
528 *addr = data;
529
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530 mb();
531
532 /* re-enable interrupts if necessary */
533 if (flag)
534 enable_interrupts();
535
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536 /* arm simple, non interrupt dependent timer */
537 reset_timer_masked ();
538
539 /* wait while polling the status register */
540 while (((status = *addr) & (FPW) 0x00800080) != (FPW) 0x00800080) {
6d0f6bcf 541 if (get_timer_masked () > CONFIG_SYS_FLASH_WRITE_TOUT) {
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542#ifdef DEBUG
543 *addr = (FPW) 0x00700070;
544 status = *addr;
0a5676be 545 printf("## status=0x%08lx, addr=0x%p\n", status, addr);
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546#endif
547 *addr = (FPW) 0x00500050; /* clear status register cmd */
548 *addr = (FPW) 0x00FF00FF; /* restore read mode */
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549 return (1);
550 }
551 }
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552
553 *addr = (FPW) 0x00FF00FF; /* restore read mode */
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554 return (0);
555}
556
557void inline spin_wheel (void)
558{
559 static int p = 0;
560 static char w[] = "\\/-";
561
562 printf ("\010%c", w[p]);
563 (++p == 3) ? (p = 0) : 0;
564}