[people/ms/u-boot.git] / board / integratorcp / flash.c

/*
 * (C) Copyright 2004
 * Xiaogeng (Shawn) Jin, Agilent Technologies, xiaogeng_jin@agilent.com
 *
 * (C) Copyright 2001
 * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net
 *
 * (C) Copyright 2001-2004
 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
 *
 * (C) Copyright 2003
 * Texas Instruments, <www.ti.com>
 * Kshitij Gupta <Kshitij@ti.com>
 *
 * See file CREDITS for list of people who contributed to this
 * project.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation; either version 2 of
 * the License, or (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
 * MA 02111-1307 USA
 */

#include <common.h>
#include <linux/byteorder/swab.h>

#define DEBUG

#define PHYS_FLASH_SECT_SIZE	0x00040000	/* 256 KB sectors (x2) */
flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS];	/* info for FLASH chips */

/* Board support for 1 or 2 flash devices */
#define FLASH_PORT_WIDTH32
#undef FLASH_PORT_WIDTH16

#ifdef FLASH_PORT_WIDTH16
#define FLASH_PORT_WIDTH	ushort
#define FLASH_PORT_WIDTHV	vu_short
#define SWAP(x)			__swab16(x)
#else
#define FLASH_PORT_WIDTH	ulong
#define FLASH_PORT_WIDTHV	vu_long
#define SWAP(x)			__swab32(x)
#endif

#define FPW	FLASH_PORT_WIDTH
#define FPWV	FLASH_PORT_WIDTHV

#define mb() __asm__ __volatile__ ("" : : : "memory")


/* Flash Organization Structure */
typedef struct OrgDef {
	unsigned int sector_number;
	unsigned int sector_size;
} OrgDef;


/* Flash Organizations */
OrgDef OrgIntel_28F256L18T[] = {
	{4, 32 * 1024},				/* 4 * 32kBytes sectors */
	{255, 128 * 1024},			/* 255 * 128kBytes sectors */
};

/* CP control register base address */
#define CPCR_BASE		0xCB000000
#define CPCR_EXTRABANK		0x8
#define CPCR_FLASHSIZE		0x4
#define CPCR_FLWREN		0x2
#define CPCR_FLVPPEN		0x1

/*-----------------------------------------------------------------------
 * Functions
 */
unsigned long flash_init (void);
static ulong flash_get_size (FPW * addr, flash_info_t * info);
static int write_data (flash_info_t * info, ulong dest, FPW data);
static void flash_get_offsets (ulong base, flash_info_t * info);
void inline spin_wheel (void);
void flash_print_info (flash_info_t * info);
void flash_unprotect_sectors (FPWV * addr);
int flash_erase (flash_info_t * info, int s_first, int s_last);
int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt);

/*-----------------------------------------------------------------------
 */
unsigned long flash_init (void)
{
	int i, nbanks;
	ulong size = 0;
	vu_long *cpcr = (vu_long *)CPCR_BASE;

	/* Check if there is an extra bank of flash */
	if (cpcr[1] & CPCR_EXTRABANK)
		nbanks = 2;
	else
		nbanks = 1;

	if (nbanks > CONFIG_SYS_MAX_FLASH_BANKS)
		nbanks = CONFIG_SYS_MAX_FLASH_BANKS;

	/* Enable flash write */
	cpcr[1] |= 3;

	for (i = 0; i < nbanks; i++) {
		flash_get_size ((FPW *)(CONFIG_SYS_FLASH_BASE + size), &flash_info[i]);
		flash_get_offsets (CONFIG_SYS_FLASH_BASE + size, &flash_info[i]);
		size += flash_info[i].size;
	}

#if CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE
	/* monitor protection */
	flash_protect (FLAG_PROTECT_SET,
		       CONFIG_SYS_MONITOR_BASE,
		       CONFIG_SYS_MONITOR_BASE + monitor_flash_len - 1, &flash_info[0]);
#endif

#ifdef CONFIG_ENV_IS_IN_FLASH
	/* ENV protection ON */
	flash_protect(FLAG_PROTECT_SET,
		      CONFIG_ENV_ADDR,
		      CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE - 1,
		      &flash_info[0]);
#endif

	/* Protect SIB (0x24800000) and bootMonitor (0x24c00000) */
	flash_protect (FLAG_PROTECT_SET,
		       flash_info[0].start[62],
		       flash_info[0].start[63] + PHYS_FLASH_SECT_SIZE - 1,
		       &flash_info[0]);

	return size;
}

/*-----------------------------------------------------------------------
 */
static void flash_get_offsets (ulong base, flash_info_t * info)
{
	int i;

	if (info->flash_id == FLASH_UNKNOWN) {
		return;
	}

	if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL) {
		for (i = 0; i < info->sector_count; i++) {
			info->start[i] = base +	(i * PHYS_FLASH_SECT_SIZE);
			info->protect[i] = 0;
		}
	}
}

/*-----------------------------------------------------------------------
 */
void flash_print_info (flash_info_t * info)
{
	int i;

	if (info->flash_id == FLASH_UNKNOWN) {
		printf ("missing or unknown FLASH type\n");
		return;
	}

	switch (info->flash_id & FLASH_VENDMASK) {
	case FLASH_MAN_INTEL:
		printf ("INTEL ");
		break;
	default:
		printf ("Unknown Vendor ");
		break;
	}

	/* Integrator CP board uses 28F640J3C or 28F128J3C parts,
	 * which have the same device id numbers as 28F640J3A or
	 * 28F128J3A
	 */
	switch (info->flash_id & FLASH_TYPEMASK) {
	case FLASH_28F256L18T:
		printf ("FLASH 28F256L18T\n");
		break;
	case FLASH_28F640J3A:
		printf ("FLASH 28F640J3C\n");
		break;
	case FLASH_28F128J3A:
		printf ("FLASH 28F128J3C\n");
		break;
	default:
		printf ("Unknown Chip Type\n");
		break;
	}

	printf ("  Size: %ld MB in %d Sectors\n",
			info->size >> 20, info->sector_count);

	printf ("  Sector Start Addresses:");
	for (i = 0; i < info->sector_count; ++i) {
		if ((i % 5) == 0)
			printf ("\n   ");
		printf (" %08lX%s",
			info->start[i], info->protect[i] ? " (RO)" : "     ");
	}
	printf ("\n");
	return;
}

/*
 * The following code cannot be run from FLASH!
 */
static ulong flash_get_size (FPW * addr, flash_info_t * info)
{
	volatile FPW value;
	vu_long *cpcr = (vu_long *)CPCR_BASE;
	int nsects;

	/* Check the flash size */
	if (cpcr[1] & CPCR_FLASHSIZE)
		nsects = 128;
	else
		nsects = 64;

	if (nsects > CONFIG_SYS_MAX_FLASH_SECT)
		nsects = CONFIG_SYS_MAX_FLASH_SECT;

	/* Write auto select command: read Manufacturer ID */
	addr[0x5555] = (FPW) 0x00AA00AA;
	addr[0x2AAA] = (FPW) 0x00550055;
	addr[0x5555] = (FPW) 0x00900090;

	mb ();
	value = addr[0];

	switch (value) {

	case (FPW) INTEL_MANUFACT:
		info->flash_id = FLASH_MAN_INTEL;
		break;

	default:
		info->flash_id = FLASH_UNKNOWN;
		info->sector_count = 0;
		info->size = 0;
		addr[0] = (FPW) 0x00FF00FF; /* restore read mode */
		return (0); /* no or unknown flash */
	}

	mb ();
	value = addr[1]; /* device ID */
	switch (value) {

	case (FPW) (INTEL_ID_28F256L18T):
		info->flash_id += FLASH_28F256L18T;
		info->sector_count = 259;
		info->size = 0x02000000;
		break;			/* => 32 MB */

	case (FPW) (INTEL_ID_28F640J3A):
		info->flash_id += FLASH_28F640J3A;
		info->sector_count = nsects;
		info->size = nsects * PHYS_FLASH_SECT_SIZE;
		break;

	case (FPW) (INTEL_ID_28F128J3A):
		info->flash_id += FLASH_28F128J3A;
		info->sector_count = nsects;
		info->size = nsects * PHYS_FLASH_SECT_SIZE;
		break;

	default:
		info->flash_id = FLASH_UNKNOWN;
		break;
	}

	if (info->sector_count > CONFIG_SYS_MAX_FLASH_SECT) {
		printf ("** ERROR: sector count %d > max (%d) **\n",
				info->sector_count, CONFIG_SYS_MAX_FLASH_SECT);
		info->sector_count = CONFIG_SYS_MAX_FLASH_SECT;
	}

	addr[0] = (FPW) 0x00FF00FF;	/* restore read mode */

	return (info->size);
}


/* unprotects a sector for write and erase
 * on some intel parts, this unprotects the entire chip, but it
 * wont hurt to call this additional times per sector...
 */
void flash_unprotect_sectors (FPWV * addr)
{
	FPW status;

	*addr = (FPW) 0x00500050;	/* clear status register */

	/* this sends the clear lock bit command */
	*addr = (FPW) 0x00600060;
	*addr = (FPW) 0x00D000D0;

	reset_timer_masked();
	while (((status = *addr) & (FPW)0x00800080) != 0x00800080) {
		if (get_timer_masked() > CONFIG_SYS_FLASH_ERASE_TOUT) {
			printf("Timeout");
			break;
		}
	}

	*addr = (FPW) 0x00FF00FF;
}


/*-----------------------------------------------------------------------
 */
int flash_erase (flash_info_t * info, int s_first, int s_last)
{
	int flag, prot, sect;
	ulong type;
	int rcode = 0;

	if ((s_first < 0) || (s_first > s_last)) {
		if (info->flash_id == FLASH_UNKNOWN) {
			printf ("- missing\n");
		} else {
			printf ("- no sectors to erase\n");
		}
		return 1;
	}

	type = (info->flash_id & FLASH_VENDMASK);
	if ((type != FLASH_MAN_INTEL)) {
		printf ("Can't erase unknown flash type %08lx - aborted\n",
				info->flash_id);
		return 1;
	}

	prot = 0;
	for (sect = s_first; sect <= s_last; ++sect) {
		if (info->protect[sect]) {
			prot++;
		}
	}

	if (prot) {
		printf ("- Warning: %d protected sectors will not be erased!\n",
				prot);
	} else {
		printf ("\n");
	}

	/* Start erase on unprotected sectors */
	for (sect = s_first; sect <= s_last; sect++) {
		if (info->protect[sect] == 0) {	/* not protected */
			FPWV *addr = (FPWV *) (info->start[sect]);
			FPW status;

			printf ("Erasing sector %2d ... ", sect);

			/* Disable interrupts which might cause a timeout here */
			flag = disable_interrupts ();

			/* flash_unprotect_sectors (addr); */

			/* arm simple, non interrupt dependent timer */
			reset_timer_masked ();

			*addr = (FPW) 0x00500050; /* clear status register */
			*addr = (FPW) 0x00200020; /* erase setup */
			*addr = (FPW) 0x00D000D0; /* erase confirm */
			mb();

			udelay(1000); /* Let's wait 1 ms */

			/* re-enable interrupts if necessary */
			if (flag)
				enable_interrupts();

			while (((status = *addr) & (FPW) 0x00800080) != (FPW) 0x00800080) {
				if (get_timer_masked () > CONFIG_SYS_FLASH_ERASE_TOUT) {
					*addr = (FPW)0x00700070;
					status = *addr;
					if ((status & (FPW) 0x00400040) == (FPW) 0x00400040) {
						/* erase suspended? Resume it */
						reset_timer_masked();
						*addr = (FPW) 0x00D000D0;
					} else {
#ifdef DEBUG
						printf ("Timeout,0x%08lx\n", status);
#else
						printf("Timeout\n");
#endif

						*addr = (FPW) 0x00500050;
						*addr = (FPW) 0x00FF00FF; /* reset to read mode */
						rcode = 1;
						break;
					}
				}
			}

			*addr = (FPW) 0x00FF00FF; /* resest to read mode */
			printf (" done\n");
		}
	}

	return rcode;
}

/*-----------------------------------------------------------------------
 * Copy memory to flash, returns:
 * 0 - OK
 * 1 - write timeout
 * 2 - Flash not erased
 * 4 - Flash not identified
 */
int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
{
	ulong cp, wp;
	FPW data;
	int count, i, l, rc, port_width;

	if (info->flash_id == FLASH_UNKNOWN) {
		return 4;
	}
/* get lower word aligned address */
#ifdef FLASH_PORT_WIDTH16
	wp = (addr & ~1);
	port_width = 2;
#else
	wp = (addr & ~3);
	port_width = 4;
#endif

	/*
	 * handle unaligned start bytes
	 */
	if ((l = addr - wp) != 0) {
		data = 0;
		for (i = 0, cp = wp; i < l; ++i, ++cp) {
			data = (data << 8) | (*(uchar *) cp);
		}
		for (; i < port_width && cnt > 0; ++i) {
			data = (data << 8) | *src++;
			--cnt;
			++cp;
		}
		for (; cnt == 0 && i < port_width; ++i, ++cp) {
			data = (data << 8) | (*(uchar *) cp);
		}

		if ((rc = write_data (info, wp, SWAP (data))) != 0) {
			return (rc);
		}
		wp += port_width;
	}

	/*
	 * handle word aligned part
	 */
	count = 0;
	while (cnt >= port_width) {
		data = 0;
		for (i = 0; i < port_width; ++i) {
			data = (data << 8) | *src++;
		}
		if ((rc = write_data (info, wp, SWAP (data))) != 0) {
			return (rc);
		}
		wp += port_width;
		cnt -= port_width;
		if (count++ > 0x800) {
			spin_wheel ();
			count = 0;
		}
	}

	if (cnt == 0) {
		return (0);
	}

	/*
	 * handle unaligned tail bytes
	 */
	data = 0;
	for (i = 0, cp = wp; i < port_width && cnt > 0; ++i, ++cp) {
		data = (data << 8) | *src++;
		--cnt;
	}
	for (; i < port_width; ++i, ++cp) {
		data = (data << 8) | (*(uchar *) cp);
	}

	return (write_data (info, wp, SWAP (data)));
}

/*-----------------------------------------------------------------------
 * Write a word or halfword to Flash, returns:
 * 0 - OK
 * 1 - write timeout
 * 2 - Flash not erased
 */
static int write_data (flash_info_t * info, ulong dest, FPW data)
{
	FPWV *addr = (FPWV *) dest;
	ulong status;
	int flag;

	/* Check if Flash is (sufficiently) erased */
	if ((*addr & data) != data) {
		printf ("not erased at %08lx (%lx)\n", (ulong) addr, *addr);
		return (2);
	}

	/* Disable interrupts which might cause a timeout here */
	flag = disable_interrupts ();

	/* flash_unprotect_sectors (addr); */

	*addr = (FPW) 0x00400040;	/* write setup */
	*addr = data;

	mb();

	/* re-enable interrupts if necessary */
	if (flag)
		enable_interrupts();

	/* arm simple, non interrupt dependent timer */
	reset_timer_masked ();

	/* wait while polling the status register */
	while (((status = *addr) & (FPW) 0x00800080) != (FPW) 0x00800080) {
		if (get_timer_masked () > CONFIG_SYS_FLASH_WRITE_TOUT) {
#ifdef DEBUG
			*addr = (FPW) 0x00700070;
			status = *addr;
			printf("## status=0x%08lx, addr=0x%p\n", status, addr);
#endif
			*addr = (FPW) 0x00500050; /* clear status register cmd */
			*addr = (FPW) 0x00FF00FF; /* restore read mode */
			return (1);
		}
	}

	*addr = (FPW) 0x00FF00FF; /* restore read mode */
	return (0);
}

void inline spin_wheel (void)
{
	static int p = 0;
	static char w[] = "\\/-";

	printf ("\010%c", w[p]);
	(++p == 3) ? (p = 0) : 0;
}
Commit	Line	Data
3d3befa7	1	/*
5a95f6fb WD	2	* (C) Copyright 2004
	3	* Xiaogeng (Shawn) Jin, Agilent Technologies, xiaogeng_jin@agilent.com
	4	*
3d3befa7 WD	5	* (C) Copyright 2001
	6	* Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net
	7	*
	8	* (C) Copyright 2001-2004
	9	* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
	10	*
	11	* (C) Copyright 2003
	12	* Texas Instruments, <www.ti.com>
	13	* Kshitij Gupta <Kshitij@ti.com>
	14	*
	15	* See file CREDITS for list of people who contributed to this
	16	* project.
	17	*
	18	* This program is free software; you can redistribute it and/or
	19	* modify it under the terms of the GNU General Public License as
	20	* published by the Free Software Foundation; either version 2 of
	21	* the License, or (at your option) any later version.
	22	*
	23	* This program is distributed in the hope that it will be useful,
	24	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	25	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	26	* GNU General Public License for more details.
	27	*
	28	* You should have received a copy of the GNU General Public License
	29	* along with this program; if not, write to the Free Software
	30	* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
	31	* MA 02111-1307 USA
	32	*/
	33
	34	#include <common.h>
	35	#include <linux/byteorder/swab.h>
	36
5a95f6fb WD	37	#define DEBUG
	38
	39	#define PHYS_FLASH_SECT_SIZE 0x00040000 /* 256 KB sectors (x2) */
6d0f6bcf	40	flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH chips */
3d3befa7 WD	41
3d3befa7 WD	42	/* Board support for 1 or 2 flash devices */
5a95f6fb WD	43	#define FLASH_PORT_WIDTH32
5a95f6fb WD	44	#undef FLASH_PORT_WIDTH16
3d3befa7 WD	45
3d3befa7 WD	46	#ifdef FLASH_PORT_WIDTH16
5a95f6fb WD	47	#define FLASH_PORT_WIDTH ushort
5a95f6fb WD	48	#define FLASH_PORT_WIDTHV vu_short
3d3befa7 WD	49	#define SWAP(x) __swab16(x)
3d3befa7 WD	50	#else
5a95f6fb WD	51	#define FLASH_PORT_WIDTH ulong
5a95f6fb WD	52	#define FLASH_PORT_WIDTHV vu_long
3d3befa7 WD	53	#define SWAP(x) __swab32(x)
	54	#endif
	55
	56	#define FPW FLASH_PORT_WIDTH
	57	#define FPWV FLASH_PORT_WIDTHV
	58
	59	#define mb() __asm__ __volatile__ ("" : : : "memory")
	60
	61
	62	/* Flash Organization Structure */
	63	typedef struct OrgDef {
	64	unsigned int sector_number;
	65	unsigned int sector_size;
	66	} OrgDef;
	67
	68
	69	/* Flash Organizations */
	70	OrgDef OrgIntel_28F256L18T[] = {
	71	{4, 32 * 1024}, /* 4 * 32kBytes sectors */
	72	{255, 128 * 1024}, /* 255 * 128kBytes sectors */
	73	};
	74
5a95f6fb	75	/* CP control register base address */
53677ef1	76	#define CPCR_BASE 0xCB000000
5a95f6fb WD	77	#define CPCR_EXTRABANK 0x8
	78	#define CPCR_FLASHSIZE 0x4
	79	#define CPCR_FLWREN 0x2
	80	#define CPCR_FLVPPEN 0x1
3d3befa7 WD	81
	82	/*-----------------------------------------------------------------------
	83	* Functions
	84	*/
	85	unsigned long flash_init (void);
	86	static ulong flash_get_size (FPW * addr, flash_info_t * info);
	87	static int write_data (flash_info_t * info, ulong dest, FPW data);
	88	static void flash_get_offsets (ulong base, flash_info_t * info);
	89	void inline spin_wheel (void);
	90	void flash_print_info (flash_info_t * info);
	91	void flash_unprotect_sectors (FPWV * addr);
	92	int flash_erase (flash_info_t * info, int s_first, int s_last);
	93	int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt);
	94
	95	/*-----------------------------------------------------------------------
	96	*/
3d3befa7 WD	97	unsigned long flash_init (void)
3d3befa7 WD	98	{
5a95f6fb	99	int i, nbanks;
3d3befa7	100	ulong size = 0;
5a95f6fb WD	101	vu_long cpcr = (vu_long )CPCR_BASE;
	102
	103	/* Check if there is an extra bank of flash */
	104	if (cpcr[1] & CPCR_EXTRABANK)
	105	nbanks = 2;
	106	else
	107	nbanks = 1;
	108
6d0f6bcf JCPV	109	if (nbanks > CONFIG_SYS_MAX_FLASH_BANKS)
6d0f6bcf JCPV	110	nbanks = CONFIG_SYS_MAX_FLASH_BANKS;
5a95f6fb WD	111
	112	/* Enable flash write */
	113	cpcr[1] \|= 3;
	114
	115	for (i = 0; i < nbanks; i++) {
6d0f6bcf JCPV	116	flash_get_size ((FPW *)(CONFIG_SYS_FLASH_BASE + size), &flash_info[i]);
6d0f6bcf JCPV	117	flash_get_offsets (CONFIG_SYS_FLASH_BASE + size, &flash_info[i]);
3d3befa7 WD	118	size += flash_info[i].size;
	119	}
	120
6d0f6bcf	121	#if CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE
5a95f6fb WD	122	/* monitor protection */
5a95f6fb WD	123	flash_protect (FLAG_PROTECT_SET,
6d0f6bcf JCPV	124	CONFIG_SYS_MONITOR_BASE,
6d0f6bcf JCPV	125	CONFIG_SYS_MONITOR_BASE + monitor_flash_len - 1, &flash_info[0]);
5a95f6fb WD	126	#endif
5a95f6fb WD	127
5a1aceb0	128	#ifdef CONFIG_ENV_IS_IN_FLASH
5a95f6fb WD	129	/* ENV protection ON */
5a95f6fb WD	130	flash_protect(FLAG_PROTECT_SET,
0e8d1586 JCPV	131	CONFIG_ENV_ADDR,
0e8d1586 JCPV	132	CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE - 1,
5a95f6fb WD	133	&flash_info[0]);
	134	#endif
	135
	136	/* Protect SIB (0x24800000) and bootMonitor (0x24c00000) */
3d3befa7	137	flash_protect (FLAG_PROTECT_SET,
5a95f6fb WD	138	flash_info[0].start[62],
	139	flash_info[0].start[63] + PHYS_FLASH_SECT_SIZE - 1,
	140	&flash_info[0]);
3d3befa7 WD	141
	142	return size;
	143	}
	144
	145	/*-----------------------------------------------------------------------
	146	*/
	147	static void flash_get_offsets (ulong base, flash_info_t * info)
	148	{
	149	int i;
3d3befa7	150
3d3befa7 WD	151	if (info->flash_id == FLASH_UNKNOWN) {
	152	return;
	153	}
	154
	155	if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL) {
	156	for (i = 0; i < info->sector_count; i++) {
5a95f6fb WD	157	info->start[i] = base + (i * PHYS_FLASH_SECT_SIZE);
5a95f6fb WD	158	info->protect[i] = 0;
3d3befa7 WD	159	}
	160	}
	161	}
	162
	163	/*-----------------------------------------------------------------------
	164	*/
	165	void flash_print_info (flash_info_t * info)
	166	{
	167	int i;
	168
	169	if (info->flash_id == FLASH_UNKNOWN) {
	170	printf ("missing or unknown FLASH type\n");
	171	return;
	172	}
	173
	174	switch (info->flash_id & FLASH_VENDMASK) {
	175	case FLASH_MAN_INTEL:
	176	printf ("INTEL ");
	177	break;
	178	default:
	179	printf ("Unknown Vendor ");
	180	break;
	181	}
	182
5a95f6fb WD	183	/* Integrator CP board uses 28F640J3C or 28F128J3C parts,
	184	* which have the same device id numbers as 28F640J3A or
	185	* 28F128J3A
	186	*/
3d3befa7 WD	187	switch (info->flash_id & FLASH_TYPEMASK) {
	188	case FLASH_28F256L18T:
	189	printf ("FLASH 28F256L18T\n");
	190	break;
5a95f6fb WD	191	case FLASH_28F640J3A:
	192	printf ("FLASH 28F640J3C\n");
	193	break;
	194	case FLASH_28F128J3A:
	195	printf ("FLASH 28F128J3C\n");
	196	break;
3d3befa7 WD	197	default:
	198	printf ("Unknown Chip Type\n");
	199	break;
	200	}
	201
	202	printf (" Size: %ld MB in %d Sectors\n",
	203	info->size >> 20, info->sector_count);
	204
	205	printf (" Sector Start Addresses:");
	206	for (i = 0; i < info->sector_count; ++i) {
	207	if ((i % 5) == 0)
	208	printf ("\n ");
	209	printf (" %08lX%s",
	210	info->start[i], info->protect[i] ? " (RO)" : " ");
	211	}
	212	printf ("\n");
	213	return;
	214	}
	215
	216	/*
	217	* The following code cannot be run from FLASH!
	218	*/
	219	static ulong flash_get_size (FPW * addr, flash_info_t * info)
	220	{
	221	volatile FPW value;
5a95f6fb WD	222	vu_long cpcr = (vu_long )CPCR_BASE;
	223	int nsects;
	224
	225	/* Check the flash size */
	226	if (cpcr[1] & CPCR_FLASHSIZE)
	227	nsects = 128;
	228	else
	229	nsects = 64;
	230
6d0f6bcf JCPV	231	if (nsects > CONFIG_SYS_MAX_FLASH_SECT)
6d0f6bcf JCPV	232	nsects = CONFIG_SYS_MAX_FLASH_SECT;
3d3befa7 WD	233
	234	/* Write auto select command: read Manufacturer ID */
	235	addr[0x5555] = (FPW) 0x00AA00AA;
	236	addr[0x2AAA] = (FPW) 0x00550055;
	237	addr[0x5555] = (FPW) 0x00900090;
	238
	239	mb ();
	240	value = addr[0];
	241
	242	switch (value) {
	243
	244	case (FPW) INTEL_MANUFACT:
	245	info->flash_id = FLASH_MAN_INTEL;
	246	break;
	247
	248	default:
	249	info->flash_id = FLASH_UNKNOWN;
	250	info->sector_count = 0;
	251	info->size = 0;
5a95f6fb WD	252	addr[0] = (FPW) 0x00FF00FF; /* restore read mode */
5a95f6fb WD	253	return (0); /* no or unknown flash */
3d3befa7 WD	254	}
	255
	256	mb ();
5a95f6fb	257	value = addr[1]; /* device ID */
3d3befa7 WD	258	switch (value) {
	259
	260	case (FPW) (INTEL_ID_28F256L18T):
	261	info->flash_id += FLASH_28F256L18T;
	262	info->sector_count = 259;
	263	info->size = 0x02000000;
5a95f6fb WD	264	break; /* => 32 MB */
	265
	266	case (FPW) (INTEL_ID_28F640J3A):
	267	info->flash_id += FLASH_28F640J3A;
	268	info->sector_count = nsects;
	269	info->size = nsects * PHYS_FLASH_SECT_SIZE;
	270	break;
	271
	272	case (FPW) (INTEL_ID_28F128J3A):
	273	info->flash_id += FLASH_28F128J3A;
	274	info->sector_count = nsects;
	275	info->size = nsects * PHYS_FLASH_SECT_SIZE;
	276	break;
3d3befa7 WD	277
	278	default:
	279	info->flash_id = FLASH_UNKNOWN;
	280	break;
	281	}
	282
6d0f6bcf	283	if (info->sector_count > CONFIG_SYS_MAX_FLASH_SECT) {
3d3befa7	284	printf (" ERROR: sector count %d > max (%d) \n",
6d0f6bcf JCPV	285	info->sector_count, CONFIG_SYS_MAX_FLASH_SECT);
6d0f6bcf JCPV	286	info->sector_count = CONFIG_SYS_MAX_FLASH_SECT;
3d3befa7 WD	287	}
	288
	289	addr[0] = (FPW) 0x00FF00FF; /* restore read mode */
	290
	291	return (info->size);
	292	}
	293
	294
	295	/* unprotects a sector for write and erase
	296	* on some intel parts, this unprotects the entire chip, but it
	297	* wont hurt to call this additional times per sector...
	298	*/
	299	void flash_unprotect_sectors (FPWV * addr)
	300	{
5a95f6fb	301	FPW status;
3d3befa7 WD	302
	303	addr = (FPW) 0x00500050; / clear status register */
	304
	305	/* this sends the clear lock bit command */
	306	*addr = (FPW) 0x00600060;
	307	*addr = (FPW) 0x00D000D0;
5a95f6fb WD	308
	309	reset_timer_masked();
	310	while (((status = *addr) & (FPW)0x00800080) != 0x00800080) {
6d0f6bcf	311	if (get_timer_masked() > CONFIG_SYS_FLASH_ERASE_TOUT) {
5a95f6fb WD	312	printf("Timeout");
	313	break;
	314	}
	315	}
	316
	317	*addr = (FPW) 0x00FF00FF;
3d3befa7 WD	318	}
	319
	320
	321	/*-----------------------------------------------------------------------
	322	*/
3d3befa7 WD	323	int flash_erase (flash_info_t * info, int s_first, int s_last)
	324	{
	325	int flag, prot, sect;
5a95f6fb	326	ulong type;
3d3befa7 WD	327	int rcode = 0;
	328
	329	if ((s_first < 0) \|\| (s_first > s_last)) {
	330	if (info->flash_id == FLASH_UNKNOWN) {
	331	printf ("- missing\n");
	332	} else {
	333	printf ("- no sectors to erase\n");
	334	}
	335	return 1;
	336	}
	337
	338	type = (info->flash_id & FLASH_VENDMASK);
	339	if ((type != FLASH_MAN_INTEL)) {
	340	printf ("Can't erase unknown flash type %08lx - aborted\n",
	341	info->flash_id);
	342	return 1;
	343	}
	344
	345	prot = 0;
	346	for (sect = s_first; sect <= s_last; ++sect) {
	347	if (info->protect[sect]) {
	348	prot++;
	349	}
	350	}
	351
	352	if (prot) {
	353	printf ("- Warning: %d protected sectors will not be erased!\n",
	354	prot);
	355	} else {
	356	printf ("\n");
	357	}
	358
3d3befa7 WD	359	/* Start erase on unprotected sectors */
	360	for (sect = s_first; sect <= s_last; sect++) {
	361	if (info->protect[sect] == 0) { /* not protected */
	362	FPWV addr = (FPWV ) (info->start[sect]);
	363	FPW status;
	364
	365	printf ("Erasing sector %2d ... ", sect);
	366
5a95f6fb WD	367	/* Disable interrupts which might cause a timeout here */
	368	flag = disable_interrupts ();
	369
	370	/* flash_unprotect_sectors (addr); */
3d3befa7 WD	371
	372	/* arm simple, non interrupt dependent timer */
	373	reset_timer_masked ();
	374
5a95f6fb WD	375	addr = (FPW) 0x00500050; / clear status register */
	376	addr = (FPW) 0x00200020; / erase setup */
	377	addr = (FPW) 0x00D000D0; / erase confirm */
	378	mb();
	379
	380	udelay(1000); /* Let's wait 1 ms */
	381
	382	/* re-enable interrupts if necessary */
	383	if (flag)
	384	enable_interrupts();
	385
	386	while (((status = *addr) & (FPW) 0x00800080) != (FPW) 0x00800080) {
6d0f6bcf	387	if (get_timer_masked () > CONFIG_SYS_FLASH_ERASE_TOUT) {
5a95f6fb WD	388	*addr = (FPW)0x00700070;
	389	status = *addr;
	390	if ((status & (FPW) 0x00400040) == (FPW) 0x00400040) {
	391	/* erase suspended? Resume it */
	392	reset_timer_masked();
	393	*addr = (FPW) 0x00D000D0;
	394	} else {
	395	#ifdef DEBUG
0a5676be	396	printf ("Timeout,0x%08lx\n", status);
5a95f6fb WD	397	#else
	398	printf("Timeout\n");
	399	#endif
	400
	401	*addr = (FPW) 0x00500050;
	402	addr = (FPW) 0x00FF00FF; / reset to read mode */
	403	rcode = 1;
	404	break;
	405	}
3d3befa7 WD	406	}
	407	}
	408
5a95f6fb	409	addr = (FPW) 0x00FF00FF; / resest to read mode */
3d3befa7 WD	410	printf (" done\n");
	411	}
	412	}
5a95f6fb	413
3d3befa7 WD	414	return rcode;
	415	}
	416
	417	/*-----------------------------------------------------------------------
	418	* Copy memory to flash, returns:
	419	* 0 - OK
	420	* 1 - write timeout
	421	* 2 - Flash not erased
	422	* 4 - Flash not identified
	423	*/
3d3befa7 WD	424	int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
	425	{
	426	ulong cp, wp;
	427	FPW data;
	428	int count, i, l, rc, port_width;
	429
	430	if (info->flash_id == FLASH_UNKNOWN) {
	431	return 4;
	432	}
	433	/* get lower word aligned address */
	434	#ifdef FLASH_PORT_WIDTH16
	435	wp = (addr & ~1);
	436	port_width = 2;
	437	#else
	438	wp = (addr & ~3);
	439	port_width = 4;
	440	#endif
	441
	442	/*
	443	* handle unaligned start bytes
	444	*/
	445	if ((l = addr - wp) != 0) {
	446	data = 0;
	447	for (i = 0, cp = wp; i < l; ++i, ++cp) {
	448	data = (data << 8) \| ((uchar ) cp);
	449	}
	450	for (; i < port_width && cnt > 0; ++i) {
	451	data = (data << 8) \| *src++;
	452	--cnt;
	453	++cp;
	454	}
	455	for (; cnt == 0 && i < port_width; ++i, ++cp) {
	456	data = (data << 8) \| ((uchar ) cp);
	457	}
	458
	459	if ((rc = write_data (info, wp, SWAP (data))) != 0) {
	460	return (rc);
	461	}
	462	wp += port_width;
	463	}
	464
	465	/*
	466	* handle word aligned part
	467	*/
	468	count = 0;
	469	while (cnt >= port_width) {
	470	data = 0;
	471	for (i = 0; i < port_width; ++i) {
	472	data = (data << 8) \| *src++;
	473	}
	474	if ((rc = write_data (info, wp, SWAP (data))) != 0) {
	475	return (rc);
	476	}
	477	wp += port_width;
	478	cnt -= port_width;
	479	if (count++ > 0x800) {
	480	spin_wheel ();
	481	count = 0;
	482	}
	483	}
	484
	485	if (cnt == 0) {
	486	return (0);
	487	}
488
489	/*
490	* handle unaligned tail bytes
491	*/
492	data = 0;
493	for (i = 0, cp = wp; i < port_width && cnt > 0; ++i, ++cp) {
494	data = (data << 8) \| *src++;
495	--cnt;
496	}
497	for (; i < port_width; ++i, ++cp) {
498	data = (data << 8) \| ((uchar ) cp);
499	}
500
501	return (write_data (info, wp, SWAP (data)));
502	}
503
504	/*-----------------------------------------------------------------------
505	* Write a word or halfword to Flash, returns:
506	* 0 - OK
507	* 1 - write timeout
508	* 2 - Flash not erased
509	*/
510	static int write_data (flash_info_t * info, ulong dest, FPW data)
511	{
512	FPWV addr = (FPWV ) dest;
513	ulong status;
514	int flag;
515
516	/* Check if Flash is (sufficiently) erased */
517	if ((*addr & data) != data) {
0a5676be	518	printf ("not erased at %08lx (%lx)\n", (ulong) addr, *addr);
3d3befa7 WD	519	return (2);
3d3befa7 WD	520	}
5a95f6fb	521
3d3befa7 WD	522	/* Disable interrupts which might cause a timeout here */
3d3befa7 WD	523	flag = disable_interrupts ();
5a95f6fb WD	524
	525	/* flash_unprotect_sectors (addr); */
	526
3d3befa7 WD	527	addr = (FPW) 0x00400040; / write setup */
	528	*addr = data;
	529
5a95f6fb WD	530	mb();
	531
	532	/* re-enable interrupts if necessary */
	533	if (flag)
	534	enable_interrupts();
	535
3d3befa7 WD	536	/* arm simple, non interrupt dependent timer */
	537	reset_timer_masked ();
	538
	539	/* wait while polling the status register */
	540	while (((status = *addr) & (FPW) 0x00800080) != (FPW) 0x00800080) {
6d0f6bcf	541	if (get_timer_masked () > CONFIG_SYS_FLASH_WRITE_TOUT) {
5a95f6fb WD	542	#ifdef DEBUG
	543	*addr = (FPW) 0x00700070;
	544	status = *addr;
0a5676be	545	printf("## status=0x%08lx, addr=0x%p\n", status, addr);
5a95f6fb WD	546	#endif
	547	addr = (FPW) 0x00500050; / clear status register cmd */
	548	addr = (FPW) 0x00FF00FF; / restore read mode */
3d3befa7 WD	549	return (1);
	550	}
	551	}
5a95f6fb WD	552
5a95f6fb WD	553	addr = (FPW) 0x00FF00FF; / restore read mode */
3d3befa7 WD	554	return (0);
	555	}
	556
	557	void inline spin_wheel (void)
	558	{
	559	static int p = 0;
	560	static char w[] = "\\/-";
	561
	562	printf ("\010%c", w[p]);
	563	(++p == 3) ? (p = 0) : 0;
	564	}