]>
Commit | Line | Data |
---|---|---|
6bd2447e GJ |
1 | /* |
2 | * (C) Copyright 2006 Embedded Artists AB <www.embeddedartists.com> | |
3 | * | |
4 | * This program is free software; you can redistribute it and/or | |
5 | * modify it under the terms of the GNU General Public License as | |
6 | * published by the Free Software Foundation; either version 2 of | |
7 | * the License, or (at your option) any later version. | |
8 | * | |
9 | * This program is distributed in the hope that it will be useful, | |
10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
12 | * GNU General Public License for more details. | |
13 | * | |
14 | * You should have received a copy of the GNU General Public License | |
15 | * along with this program; if not, write to the Free Software | |
16 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, | |
17 | * MA 02111-1307 USA | |
18 | */ | |
19 | ||
20 | #include <config.h> | |
21 | #include <version.h> | |
22 | #include <asm/arch/hardware.h> | |
23 | ||
24 | /* some parameters for the board */ | |
25 | /* setting up the memory */ | |
53677ef1 WD |
26 | #define SRAM_START 0x40000000 |
27 | #define SRAM_SIZE 0x00004000 | |
28 | #define BCFG0_VALUE 0x1000ffef | |
29 | #define BCFG1_VALUE 0x10001C61 | |
f8db84f1 | 30 | |
6bd2447e GJ |
31 | _TEXT_BASE: |
32 | .word TEXT_BASE | |
f8db84f1 | 33 | MEMMAP_ADR: |
6bd2447e GJ |
34 | .word MEMMAP |
35 | BCFG0_ADR: | |
53677ef1 | 36 | .word BCFG0 |
6bd2447e | 37 | _BCFG0_VALUE: |
53677ef1 | 38 | .word BCFG0_VALUE |
6bd2447e GJ |
39 | BCFG1_ADR: |
40 | .word BCFG1 | |
41 | _BCFG1_VALUE: | |
42 | .word BCFG1_VALUE | |
43 | PINSEL2_ADR: | |
44 | .word PINSEL2 | |
45 | PINSEL2_MASK: | |
46 | .word 0x00000000 | |
47 | PINSEL2_VALUE: | |
48 | .word 0x0F800914 | |
49 | ||
50 | .extern _start | |
51 | ||
52 | .globl lowlevel_init | |
53 | lowlevel_init: | |
54 | /* set up memory control register for bank 0 */ | |
55 | ldr r0, _BCFG0_VALUE | |
56 | ldr r1, BCFG0_ADR | |
57 | str r0, [r1] | |
58 | ||
59 | /* set up memory control register for bank 1 */ | |
60 | ldr r0, _BCFG1_VALUE | |
61 | ldr r1, BCFG1_ADR | |
62 | str r0, [r1] | |
63 | ||
64 | /* set up PINSEL2 for bus-pins */ | |
65 | ldr r0, PINSEL2_ADR | |
66 | ldr r1, [r0] | |
67 | ldr r2, PINSEL2_MASK | |
68 | ldr r3, PINSEL2_VALUE | |
69 | and r1, r1, r2 | |
70 | orr r1, r1, r3 | |
71 | str r1, [r0] | |
f8db84f1 | 72 | |
6bd2447e | 73 | /* move vectors to beginning of SRAM */ |
f8db84f1 | 74 | mov r2, #SRAM_START |
6bd2447e | 75 | mov r0, #0 /*_start*/ |
f8db84f1 WD |
76 | ldmneia r0!, {r3-r10} |
77 | stmneia r2!, {r3-r10} | |
6bd2447e GJ |
78 | ldmneia r0, {r3-r9} |
79 | stmneia r2, {r3-r9} | |
80 | ||
f8db84f1 | 81 | /* Set-up MEMMAP register, so vectors are taken from SRAM */ |
6bd2447e GJ |
82 | ldr r0, MEMMAP_ADR |
83 | mov r1, #0x02 /* vectors re-mapped to static RAM */ | |
84 | str r1, [r0] | |
f8db84f1 | 85 | |
6bd2447e GJ |
86 | /* everything is fine now */ |
87 | mov pc, lr |