projects / people / ms / u-boot.git / blame
| Commit | Line | Data |
|---|---|---|
| 2ad6b513 TT |
1 | /* |
| 2 | * Copyright (C) Freescale Semiconductor, Inc. 2006. All rights reserved. | |
| 3 | * | |
| 4 | * See file CREDITS for list of people who contributed to this | |
| 5 | * project. | |
| 6 | * | |
| 7 | * This program is free software; you can redistribute it and/or | |
| 8 | * modify it under the terms of the GNU General Public License as | |
| 9 | * published by the Free Software Foundation; either version 2 of | |
| 10 | * the License, or (at your option) any later version. | |
| 11 | * | |
| 12 | * This program is distributed in the hope that it will be useful, | |
| 13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| 14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| 15 | * GNU General Public License for more details. | |
| 16 | * | |
| 17 | * You should have received a copy of the GNU General Public License | |
| 18 | * along with this program; if not, write to the Free Software | |
| 19 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, | |
| 20 | * MA 02111-1307 USA | |
| 21 | */ | |
| 22 | ||
| 23 | OUTPUT_ARCH(powerpc) | |
| 24 | SECTIONS | |
| 25 | { | |
| 26 | /* Read-only sections, merged into text segment: */ | |
| 27 | . = + SIZEOF_HEADERS; | |
| 28 | .interp : { *(.interp) } | |
| 29 | .hash : { *(.hash) } | |
| 30 | .dynsym : { *(.dynsym) } | |
| 31 | .dynstr : { *(.dynstr) } | |
| 32 | .rel.text : { *(.rel.text) } | |
| 33 | .rela.text : { *(.rela.text) } | |
| 34 | .rel.data : { *(.rel.data) } | |
| 35 | .rela.data : { *(.rela.data) } | |
| 36 | .rel.rodata : { *(.rel.rodata) } | |
| 37 | .rela.rodata : { *(.rela.rodata) } | |
| 38 | .rel.got : { *(.rel.got) } | |
| 39 | .rela.got : { *(.rela.got) } | |
| 40 | .rel.ctors : { *(.rel.ctors) } | |
| 41 | .rela.ctors : { *(.rela.ctors) } | |
| 42 | .rel.dtors : { *(.rel.dtors) } | |
| 43 | .rela.dtors : { *(.rela.dtors) } | |
| 44 | .rel.bss : { *(.rel.bss) } | |
| 45 | .rela.bss : { *(.rela.bss) } | |
| 46 | .rel.plt : { *(.rel.plt) } | |
| 47 | .rela.plt : { *(.rela.plt) } | |
| 48 | .init : { *(.init) } | |
| 49 | .plt : { *(.plt) } | |
| 50 | .text : | |
| 51 | { | |
| 52 | cpu/mpc83xx/start.o (.text) | |
| 53 | *(.text) | |
| 54 | *(.fixup) | |
| 55 | *(.got1) | |
| 56 | . = ALIGN(16); | |
| 57 | *(.rodata) | |
| 58 | *(.rodata1) | |
| 59 | *(.rodata.str1.4) | |
| 60 | } | |
| 61 | .fini : { *(.fini) } =0 | |
| 62 | .ctors : { *(.ctors) } | |
| 63 | .dtors : { *(.dtors) } | |
| 64 | ||
| 65 | /* Read-write section, merged into data segment: */ | |
| 66 | . = (. + 0x0FFF) & 0xFFFFF000; | |
| 67 | _erotext = .; | |
| 68 | PROVIDE (erotext = .); | |
| 69 | .reloc : | |
| 70 | { | |
| 71 | *(.got) | |
| 72 | _GOT2_TABLE_ = .; | |
| 73 | *(.got2) | |
| 74 | _FIXUP_TABLE_ = .; | |
| 75 | *(.fixup) | |
| 76 | } | |
| 77 | __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2; | |
| 78 | __fixup_entries = (. - _FIXUP_TABLE_) >> 2; | |
| 79 | ||
| 80 | .data : | |
| 81 | { | |
| 82 | *(.data) | |
| 83 | *(.data1) | |
| 84 | *(.sdata) | |
| 85 | *(.sdata2) | |
| 86 | *(.dynamic) | |
| 87 | CONSTRUCTORS | |
| 88 | } | |
| 89 | _edata = .; | |
| 90 | PROVIDE (edata = .); | |
| 91 | ||
| 92 | . = .; | |
| 93 | __u_boot_cmd_start = .; | |
| 94 | .u_boot_cmd : { *(.u_boot_cmd) } | |
| 95 | __u_boot_cmd_end = .; | |
| 96 | ||
| 97 | . = .; | |
| 98 | __start___ex_table = .; | |
| 99 | __ex_table : { *(__ex_table) } | |
| 100 | __stop___ex_table = .; | |
| 101 | ||
| 102 | . = ALIGN(4096); | |
| 103 | __init_begin = .; | |
| 104 | .text.init : { *(.text.init) } | |
| 105 | .data.init : { *(.data.init) } | |
| 106 | . = ALIGN(4096); | |
| 107 | __init_end = .; | |
| 108 | ||
| 109 | __bss_start = .; | |
| 110 | .bss : | |
| 111 | { | |
| 112 | *(.sbss) *(.scommon) | |
| 113 | *(.dynbss) | |
| 114 | *(.bss) | |
| 115 | *(COMMON) | |
| 116 | } | |
| 117 | _end = . ; | |
| 118 | PROVIDE (end = .); | |
| 119 | } | |
| 120 | ENTRY(_start) |