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217d383e NG |
1 | /* |
2 | *(C) Copyright 2005-2008 Netstal Maschinen AG | |
3 | * Niklaus Giger (Niklaus.Giger@netstal.com) | |
4 | * | |
5 | * This source code is free software; you can redistribute it | |
6 | * and/or modify it in source code form under the terms of the GNU | |
7 | * General Public License as published by the Free Software | |
8 | * Foundation; either version 2 of the License, or (at your option) | |
9 | * any later version. | |
10 | * | |
11 | * This program is distributed in the hope that it will be useful, | |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | * GNU General Public License for more details. | |
15 | * | |
16 | * You should have received a copy of the GNU General Public License | |
17 | * along with this program; if not, write to the Free Software | |
18 | * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA | |
19 | */ | |
20 | ||
21 | #include <common.h> | |
22 | #include <ppc4xx.h> | |
23 | #include <asm/processor.h> | |
24 | #include <asm/io.h> | |
25 | #include <asm-ppc/u-boot.h> | |
26 | #include "../common/nm.h" | |
27 | ||
28 | DECLARE_GLOBAL_DATA_PTR; | |
29 | ||
30 | #define MCU25_SLOT_ADDRESS (0x7A000000 + 0x0A) | |
31 | #define MCU25_DIGITAL_IO_REGISTER (0x7A000000 + 0xc0) | |
32 | ||
33 | #define MCU25_LED_REGISTER_ADDRESS (0x7C000000 + 0x10) | |
34 | #define MCU25_VERSIONS_REGISTER (0x7C000000 + 0x0C) | |
35 | #define MCU25_IO_CONFIGURATION (0x7C000000 + 0x0e) | |
36 | #define MCU_SW_INSTALL_REQUESTED 0x08 | |
37 | ||
38 | #define SDRAM_LEN (32 << 20) /* 32 MB - RAM */ | |
39 | ||
40 | /* | |
41 | * This function is run very early, out of flash, and before devices are | |
42 | * initialized. It is called by lib_ppc/board.c:board_init_f by virtue | |
43 | * of being in the init_sequence array. | |
44 | * | |
45 | * The SDRAM has been initialized already -- start.S:start called | |
46 | * init.S:init_sdram early on -- but it is not yet being used for | |
47 | * anything, not even stack. So be careful. | |
48 | */ | |
49 | ||
50 | /* Attention: If you want 1 microsecs times from the external oscillator | |
51 | * 0x00004051 is okay for u-boot/linux, but different from old vxworks values | |
52 | * 0x00804051 causes problems with u-boot and linux! | |
53 | */ | |
54 | #define CPC0_CR0_VALUE 0x0007F03C | |
55 | #define CPC0_CR1_VALUE 0x00004051 | |
56 | ||
57 | int board_early_init_f (void) | |
58 | { | |
59 | /* Documented in A-1171 | |
60 | * | |
61 | * Interrupt controller setup for the MCU25 board. | |
62 | * Note: IRQ 0-15 405GP internally generated; high; level sensitive | |
63 | * IRQ 16 405GP internally generated; low; level sensitive | |
64 | * IRQ 17-24 RESERVED/UNUSED | |
65 | * IRQ 31 (EXT IRQ 6) (unused) | |
66 | */ | |
67 | mtdcr(uicsr, 0xFFFFFFFF); /* clear all ints */ | |
68 | mtdcr(uicer, 0x00000000); /* disable all ints */ | |
69 | mtdcr(uiccr, 0x00000000); /* set all to be non-critical */ | |
70 | mtdcr(uicpr, 0xFFFFE000); /* set int polarities */ | |
71 | mtdcr(uictr, 0x00000000); /* set int trigger levels */ | |
72 | mtdcr(uicsr, 0xFFFFFFFF); /* clear all ints */ | |
73 | ||
74 | mtdcr(cntrl1, CPC0_CR1_VALUE); | |
75 | mtdcr(ecr, 0x60606000); | |
76 | mtdcr(CPC0_EIRR, 0x7C000000); | |
6d0f6bcf JCPV |
77 | out32(GPIO0_OR, CONFIG_SYS_GPIO0_OR ); |
78 | out32(GPIO0_TCR, CONFIG_SYS_GPIO0_TCR); | |
79 | out32(GPIO0_ODR, CONFIG_SYS_GPIO0_ODR); | |
217d383e NG |
80 | mtspr(ccr0, 0x00700000); |
81 | ||
82 | return 0; | |
83 | } | |
84 | ||
85 | #ifdef CONFIG_BOARD_PRE_INIT | |
86 | int board_pre_init (void) | |
87 | { | |
88 | return board_early_init_f (); | |
89 | } | |
90 | #endif | |
91 | ||
92 | int sys_install_requested(void) | |
93 | { | |
94 | u16 ioValue = in_be16((u16 *)MCU25_DIGITAL_IO_REGISTER); | |
95 | return (ioValue & MCU_SW_INSTALL_REQUESTED) != 0; | |
96 | } | |
97 | ||
98 | int checkboard (void) | |
99 | { | |
100 | u16 boardVersReg = in_be16((u16 *)MCU25_VERSIONS_REGISTER); | |
101 | u16 hwConfig = in_be16((u16 *)MCU25_IO_CONFIGURATION); | |
102 | u16 generation = boardVersReg & 0x0f; | |
103 | u16 index = boardVersReg & 0xf0; | |
104 | ||
105 | /* Cannot be done in board_early_init */ | |
106 | mtdcr(cntrl0, CPC0_CR0_VALUE); | |
107 | ||
108 | /* Force /RTS to active. The board it not wired quite | |
109 | * correctly to use cts/rtc flow control, so just force the | |
110 | * /RST active and forget about it. | |
111 | */ | |
112 | writeb (readb (0xef600404) | 0x03, 0xef600404); | |
113 | nm_show_print(generation, index, hwConfig); | |
114 | return 0; | |
115 | } | |
116 | ||
117 | u32 hcu_led_get(void) | |
118 | { | |
119 | return in_be16((u16 *)MCU25_LED_REGISTER_ADDRESS) & 0x3ff; | |
120 | } | |
121 | ||
122 | /* | |
123 | * hcu_led_set value to be placed into the LEDs (max 6 bit) | |
124 | */ | |
125 | void hcu_led_set(u32 value) | |
126 | { | |
127 | out_be16((u16 *)MCU25_LED_REGISTER_ADDRESS, value); | |
128 | } | |
129 | ||
217d383e NG |
130 | /* |
131 | * hcu_get_slot | |
132 | */ | |
133 | u32 hcu_get_slot(void) | |
134 | { | |
135 | u16 slot = in_be16((u16 *)MCU25_SLOT_ADDRESS); | |
136 | return slot & 0x7f; | |
137 | } | |
138 | ||
139 | /* | |
140 | * get_serial_number | |
141 | */ | |
142 | u32 get_serial_number(void) | |
143 | { | |
6d0f6bcf | 144 | u32 serial = in_be32((u32 *)CONFIG_SYS_FLASH_BASE); |
217d383e NG |
145 | |
146 | if (serial == 0xffffffff) | |
147 | return 0; | |
148 | ||
149 | return serial; | |
150 | } | |
151 | ||
152 | ||
153 | /* | |
154 | * misc_init_r. | |
155 | */ | |
156 | ||
157 | int misc_init_r(void) | |
158 | { | |
159 | common_misc_init_r(); | |
160 | set_params_for_sw_install( sys_install_requested(), "mcu25" ); | |
161 | return 0; | |
162 | } | |
163 | ||
9973e3c6 | 164 | phys_size_t initdram(int board_type) |
217d383e NG |
165 | { |
166 | unsigned int dram_size = 64*1024*1024; | |
167 | init_ppc405_sdram(dram_size); | |
168 | ||
169 | #ifdef DEBUG | |
170 | show_sdram_registers(); | |
171 | #endif | |
172 | ||
173 | return dram_size; | |
174 | } | |
175 | ||
176 | #if defined(CONFIG_POST) | |
177 | /* | |
178 | * Returns 1 if keys pressed to start the power-on long-running tests | |
179 | * Called from board_init_f(). | |
180 | */ | |
181 | int post_hotkeys_pressed(void) | |
182 | { | |
183 | return 0; /* No hotkeys supported */ | |
184 | } | |
185 | #endif /* CONFIG_POST */ | |
186 | ||
187 | #if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) | |
188 | void ft_board_setup(void *blob, bd_t *bd) | |
189 | { | |
190 | ft_cpu_setup(blob, bd); | |
191 | ||
192 | } | |
193 | #endif /* defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) */ | |
194 | ||
195 | /* | |
196 | * Hardcoded flash setup: | |
197 | * Flash 0 is a non-CFI AMD AM29F040 flash, 8 bit flash / 8 bit bus. | |
198 | */ | |
199 | ulong board_flash_get_legacy (ulong base, int banknum, flash_info_t * info) | |
200 | { | |
201 | if (banknum == 0) { /* non-CFI boot flash */ | |
202 | info->portwidth = 1; | |
203 | info->chipwidth = 1; | |
204 | info->interface = FLASH_CFI_X8; | |
205 | return 1; | |
206 | } else | |
207 | return 0; | |
208 | } |