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80885a9d WD |
1 | /* |
2 | * (C) Copyright 2002 | |
3 | * Sysgo Real-Time Solutions, GmbH <www.elinos.com> | |
4 | * Marius Groeger <mgroeger@sysgo.de> | |
5 | * | |
6 | * (C) Copyright 2002 | |
7 | * David Mueller, ELSOFT AG, <d.mueller@elsoft.ch> | |
8 | * | |
9 | * (C) Copyright 2003 | |
10 | * Texas Instruments, <www.ti.com> | |
11 | * Kshitij Gupta <Kshitij@ti.com> | |
12 | * | |
13 | * Copyright (C) 2004 by FS Forth-Systeme GmbH. | |
14 | * All rights reserved. | |
15 | * Markus Pietrek <mpietrek@fsforth.de> | |
16 | * derived from omap1610innovator.c | |
17 | * @References: [1] NS9750 Hardware Reference/December 2003 | |
18 | * | |
19 | * See file CREDITS for list of people who contributed to this | |
20 | * project. | |
21 | * | |
22 | * This program is free software; you can redistribute it and/or | |
23 | * modify it under the terms of the GNU General Public License as | |
24 | * published by the Free Software Foundation; either version 2 of | |
25 | * the License, or (at your option) any later version. | |
26 | * | |
27 | * This program is distributed in the hope that it will be useful, | |
28 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
29 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
30 | * GNU General Public License for more details. | |
31 | * | |
32 | * You should have received a copy of the GNU General Public License | |
33 | * along with this program; if not, write to the Free Software | |
34 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, | |
35 | * MA 02111-1307 USA | |
36 | */ | |
37 | ||
38 | #include <common.h> | |
39 | #if defined(CONFIG_NS9750DEV) | |
40 | # include <./configs/ns9750dev.h> | |
41 | # include <./ns9750_bbus.h> | |
42 | #endif | |
43 | ||
d87080b7 WD |
44 | DECLARE_GLOBAL_DATA_PTR; |
45 | ||
80885a9d WD |
46 | void flash__init( void ); |
47 | void ether__init( void ); | |
48 | ||
49 | static inline void delay( unsigned long loops ) | |
50 | { | |
51 | __asm__ volatile ("1:\n" | |
52 | "subs %0, %1, #1\n" | |
53 | "bne 1b":"=r" (loops):"0" (loops)); | |
54 | } | |
55 | ||
56 | ||
57 | /*********************************************************************** | |
58 | * @Function: board_init | |
59 | * @Return: 0 | |
60 | * @Descr: Enables BBUS modules and other devices | |
61 | ***********************************************************************/ | |
62 | ||
63 | int board_init( void ) | |
64 | { | |
80885a9d WD |
65 | /* Active BBUS modules */ |
66 | *get_bbus_reg_addr( NS9750_BBUS_MASTER_RESET ) = 0; | |
67 | ||
731215eb | 68 | #warning Please register your machine at http://www.arm.linux.org.uk/developer/machines/?action=new |
80885a9d WD |
69 | /* arch number of OMAP 1510-Board */ |
70 | /* to be changed for OMAP 1610 Board */ | |
71 | gd->bd->bi_arch_number = 234; | |
72 | ||
73 | /* adress of boot parameters */ | |
74 | gd->bd->bi_boot_params = 0x10000100; | |
75 | ||
76 | ||
77 | /* this speeds up your boot a quite a bit. However to make it | |
78 | * work, you need make sure your kernel startup flush bug is fixed. | |
79 | * ... rkw ... | |
80 | */ | |
81 | icache_enable(); | |
82 | ||
83 | flash__init(); | |
84 | ether__init(); | |
85 | return 0; | |
86 | } | |
87 | ||
88 | ||
89 | int misc_init_r (void) | |
90 | { | |
91 | /* currently empty */ | |
92 | return (0); | |
93 | } | |
94 | ||
95 | /****************************** | |
96 | Routine: | |
97 | Description: | |
98 | ******************************/ | |
99 | void flash__init (void) | |
100 | { | |
101 | } | |
102 | /************************************************************* | |
103 | Routine:ether__init | |
104 | Description: take the Ethernet controller out of reset and wait | |
53677ef1 | 105 | for the EEPROM load to complete. |
80885a9d WD |
106 | *************************************************************/ |
107 | void ether__init (void) | |
108 | { | |
109 | } | |
110 | ||
111 | /****************************** | |
112 | Routine: | |
113 | Description: | |
114 | ******************************/ | |
115 | int dram_init (void) | |
116 | { | |
80885a9d WD |
117 | gd->bd->bi_dram[0].start = PHYS_SDRAM_1; |
118 | gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; | |
119 | ||
120 | #if CONFIG_NR_DRAM_BANKS > 1 | |
121 | gd->bd->bi_dram[1].start = PHYS_SDRAM_2; | |
122 | gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE; | |
123 | #endif | |
124 | return 0; | |
125 | } |