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tegra: i2c: Enable new CONFIG_SYS_I2C framework
[people/ms/u-boot.git] / board / nvidia / common / board.c
CommitLineData
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1/*
2 * (C) Copyright 2010,2011
3 * NVIDIA Corporation <www.nvidia.com>
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24#include <common.h>
25#include <ns16550.h>
c5b34a29 26#include <linux/compiler.h>
3f82b1d3 27#include <asm/io.h>
b4ba2be8 28#include <asm/arch/clock.h>
6d6c0bae 29#ifdef CONFIG_LCD
1b24a50b 30#include <asm/arch/display.h>
6d6c0bae 31#endif
c0720afb 32#include <asm/arch/funcmux.h>
3f82b1d3 33#include <asm/arch/pinmux.h>
8723626d 34#include <asm/arch/pmu.h>
6d6c0bae 35#ifdef CONFIG_PWM_TEGRA
e1ae0d1f 36#include <asm/arch/pwm.h>
6d6c0bae 37#endif
150c2493 38#include <asm/arch/tegra.h>
150c2493
TW
39#include <asm/arch-tegra/board.h>
40#include <asm/arch-tegra/clk_rst.h>
41#include <asm/arch-tegra/pmc.h>
42#include <asm/arch-tegra/sys_proto.h>
43#include <asm/arch-tegra/uart.h>
44#include <asm/arch-tegra/warmboot.h>
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45#ifdef CONFIG_TEGRA_CLOCK_SCALING
46#include <asm/arch/emc.h>
47#endif
48#ifdef CONFIG_USB_EHCI_TEGRA
7ae18f37 49#include <asm/arch-tegra/usb.h>
7e44d932 50#include <asm/arch/usb.h>
6d6c0bae 51#endif
c9aa831e 52#ifdef CONFIG_TEGRA_MMC
190be1f9 53#include <asm/arch-tegra/tegra_mmc.h>
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54#include <asm/arch-tegra/mmc.h>
55#endif
cb445fb4 56#include <i2c.h>
6d6c0bae 57#include <spi.h>
c5b34a29 58#include "emc.h"
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59
60DECLARE_GLOBAL_DATA_PTR;
61
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62const struct tegra_sysinfo sysinfo = {
63 CONFIG_TEGRA_BOARD_STRING
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64};
65
45ec5b25 66#ifndef CONFIG_SPL_BUILD
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67/*
68 * Routine: timer_init
69 * Description: init the timestamp and lastinc value
70 */
71int timer_init(void)
72{
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73 return 0;
74}
45ec5b25 75#endif
3f82b1d3 76
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77void __pin_mux_usb(void)
78{
79}
80
81void pin_mux_usb(void) __attribute__((weak, alias("__pin_mux_usb")));
82
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83void __pin_mux_spi(void)
84{
85}
86
87void pin_mux_spi(void) __attribute__((weak, alias("__pin_mux_spi")));
88
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89void __gpio_early_init_uart(void)
90{
91}
92
93void gpio_early_init_uart(void)
94__attribute__((weak, alias("__gpio_early_init_uart")));
95
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LS
96void __pin_mux_nand(void)
97{
98 funcmux_select(PERIPH_ID_NDFLASH, FUNCMUX_DEFAULT);
99}
100
101void pin_mux_nand(void) __attribute__((weak, alias("__pin_mux_nand")));
102
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MD
103void __pin_mux_display(void)
104{
105}
106
107void pin_mux_display(void) __attribute__((weak, alias("__pin_mux_display")));
108
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109/*
110 * Routine: power_det_init
111 * Description: turn off power detects
112 */
113static void power_det_init(void)
114{
00a2749d 115#if defined(CONFIG_TEGRA20)
29f3e3f2 116 struct pmc_ctlr *const pmc = (struct pmc_ctlr *)NV_PA_PMC_BASE;
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117
118 /* turn off power detects */
119 writel(0, &pmc->pmc_pwr_det_latch);
120 writel(0, &pmc->pmc_pwr_det);
121#endif
122}
123
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124/*
125 * Routine: board_init
126 * Description: Early hardware init.
127 */
128int board_init(void)
129{
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130 __maybe_unused int err;
131
a04eba99 132 /* Do clocks and UART first so that printf() works */
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133 clock_init();
134 clock_verify();
135
78f47b73 136#ifdef CONFIG_FDT_SPI
e0284948 137 pin_mux_spi();
9112ef8d 138 spi_init();
e1ae0d1f 139#endif
b19f5749 140
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141#ifdef CONFIG_PWM_TEGRA
142 if (pwm_init(gd->fdt_blob))
143 debug("%s: Failed to init pwm\n", __func__);
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144#endif
145#ifdef CONFIG_LCD
716d9439 146 pin_mux_display();
1b24a50b 147 tegra_lcd_check_next_stage(gd->fdt_blob, 0);
9112ef8d 148#endif
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149 /* boot param addr */
150 gd->bd->bi_boot_params = (NV_PA_SDRAM_BASE + 0x100);
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151
152 power_det_init();
153
1f2ba722 154#ifdef CONFIG_SYS_I2C_TEGRA
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155#ifndef CONFIG_SYS_I2C_INIT_BOARD
156#error "You must define CONFIG_SYS_I2C_INIT_BOARD to use i2c on Nvidia boards"
157#endif
158 i2c_init_board();
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159# ifdef CONFIG_TEGRA_PMU
160 if (pmu_set_nominal())
161 debug("Failed to select nominal voltages\n");
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162# ifdef CONFIG_TEGRA_CLOCK_SCALING
163 err = board_emc_init();
164 if (err)
165 debug("Memory controller init failed: %d\n", err);
166# endif
167# endif /* CONFIG_TEGRA_PMU */
1f2ba722 168#endif /* CONFIG_SYS_I2C_TEGRA */
3f82b1d3 169
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170#ifdef CONFIG_USB_EHCI_TEGRA
171 pin_mux_usb();
172 board_usb_init(gd->fdt_blob);
173#endif
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174#ifdef CONFIG_LCD
175 tegra_lcd_check_next_stage(gd->fdt_blob, 0);
176#endif
f10393e5 177
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178#ifdef CONFIG_TEGRA_NAND
179 pin_mux_nand();
180#endif
181
29f3e3f2 182#ifdef CONFIG_TEGRA_LP0
a49716aa
AM
183 /* save Sdram params to PMC 2, 4, and 24 for WB0 */
184 warmboot_save_sdram_params();
185
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SG
186 /* prepare the WB code to LP0 location */
187 warmboot_prepare_code(TEGRA_LP0_ADDR, TEGRA_LP0_SIZE);
188#endif
189
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190 return 0;
191}
21ef6a10 192
3e00dbdf 193#ifdef CONFIG_BOARD_EARLY_INIT_F
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194static void __gpio_early_init(void)
195{
196}
197
198void gpio_early_init(void) __attribute__((weak, alias("__gpio_early_init")));
199
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200int board_early_init_f(void)
201{
94829195 202#if !defined(CONFIG_TEGRA20)
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203 pinmux_init();
204#endif
f46a9456 205 board_init_uart_f();
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206
207 /* Initialize periph GPIOs */
cb7a1cf3 208 gpio_early_init();
a04eba99 209 gpio_early_init_uart();
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210#ifdef CONFIG_LCD
211 tegra_lcd_early_init(gd->fdt_blob);
212#endif
0cd10c7a 213
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214 return 0;
215}
216#endif /* EARLY_INIT */
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217
218int board_late_init(void)
219{
220#ifdef CONFIG_LCD
221 /* Make sure we finish initing the LCD */
222 tegra_lcd_check_next_stage(gd->fdt_blob, 1);
223#endif
224 return 0;
225}
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226
227#if defined(CONFIG_TEGRA_MMC)
228void __pin_mux_mmc(void)
229{
230}
231
232void pin_mux_mmc(void) __attribute__((weak, alias("__pin_mux_mmc")));
233
234/* this is a weak define that we are overriding */
235int board_mmc_init(bd_t *bd)
236{
237 debug("%s called\n", __func__);
238
239 /* Enable muxes, etc. for SDMMC controllers */
240 pin_mux_mmc();
241
242 debug("%s: init MMC\n", __func__);
243 tegra_mmc_init();
244
245 return 0;
246}
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TW
247
248void pad_init_mmc(struct mmc_host *host)
249{
250#if defined(CONFIG_TEGRA30)
251 enum periph_id id = host->mmc_id;
252 u32 val;
253
254 debug("%s: sdmmc address = %08x, id = %d\n", __func__,
255 (unsigned int)host->reg, id);
256
257 /* Set the pad drive strength for SDMMC1 or 3 only */
258 if (id != PERIPH_ID_SDMMC1 && id != PERIPH_ID_SDMMC3) {
259 debug("%s: settings are only valid for SDMMC1/SDMMC3!\n",
260 __func__);
261 return;
262 }
263
264 val = readl(&host->reg->sdmemcmppadctl);
265 val &= 0xFFFFFFF0;
266 val |= MEMCOMP_PADCTRL_VREF;
267 writel(val, &host->reg->sdmemcmppadctl);
268
269 val = readl(&host->reg->autocalcfg);
270 val &= 0xFFFF0000;
271 val |= AUTO_CAL_PU_OFFSET | AUTO_CAL_PD_OFFSET | AUTO_CAL_ENABLED;
272 writel(val, &host->reg->autocalcfg);
273#endif /* T30 */
274}
275#endif /* MMC */