projects / thirdparty / u-boot.git / blame
| Commit | Line | Data |
|---|---|---|
| 83d290c5 | 1 | // SPDX-License-Identifier: GPL-2.0+ |
| f4ef6668 TW |
2 | /* |
| 3 | * (C) Copyright 2010,2011 | |
| 4 | * NVIDIA Corporation <www.nvidia.com> | |
| f4ef6668 TW |
5 | */ |
| 6 | ||
| d678a59d | 7 | #include <common.h> |
| f4ef6668 | 8 | #include <asm/io.h> |
| c62db35d | 9 | #include <asm/mach-types.h> |
| 150c2493 | 10 | #include <asm/arch/tegra.h> |
| 19d7bf3d | 11 | #include <asm/arch-tegra/board.h> |
| ca28090d SG |
12 | #include <asm/arch/clock.h> |
| 13 | #include <asm/arch/funcmux.h> | |
| a2ab6b7d | 14 | #include <asm/arch/gpio.h> |
| ae03661f | 15 | #include <asm/arch/pinmux.h> |
| ccf7988b | 16 | #include <asm/gpio.h> |
| f4ef6668 | 17 | |
| a04eba99 | 18 | /* TODO: Remove this code when the SPI switch is working */ |
| 5f588f83 | 19 | #ifndef CONFIG_TARGET_VENTANA |
| a2ab6b7d | 20 | void gpio_early_init_uart(void) |
| f4ef6668 | 21 | { |
| f4ef6668 | 22 | /* Enable UART via GPIO_PI3 (port 8, bit 3) so serial console works */ |
| 01a97a11 SW |
23 | gpio_request(TEGRA_GPIO(I, 3), "uart_en"); |
| 24 | gpio_direction_output(TEGRA_GPIO(I, 3), 0); | |
| f4ef6668 | 25 | } |
| a04eba99 | 26 | #endif |
| d5ef19b9 | 27 | |
| 1d2c0506 | 28 | #ifdef CONFIG_MMC_SDHCI_TEGRA |
| ae03661f SW |
29 | /* |
| 30 | * Routine: pin_mux_mmc | |
| 31 | * Description: setup the pin muxes/tristate values for the SDMMC(s) | |
| 32 | */ | |
| c9aa831e | 33 | void pin_mux_mmc(void) |
| ae03661f | 34 | { |
| ca28090d SG |
35 | funcmux_select(PERIPH_ID_SDMMC4, FUNCMUX_SDMMC4_ATB_GMA_GME_8_BIT); |
| 36 | funcmux_select(PERIPH_ID_SDMMC3, FUNCMUX_SDMMC3_SDB_4BIT); | |
| ae03661f SW |
37 | |
| 38 | /* For power GPIO PI6 */ | |
| 70ad375e | 39 | pinmux_tristate_disable(PMUX_PINGRP_ATA); |
| ae03661f | 40 | /* For CD GPIO PI5 */ |
| 70ad375e | 41 | pinmux_tristate_disable(PMUX_PINGRP_ATC); |
| ae03661f | 42 | } |
| ccf7988b | 43 | #endif |
| f10393e5 SG |
44 | |
| 45 | void pin_mux_usb(void) | |
| 46 | { | |
| 6dca554f | 47 | /* For USB0's GPIO PD0. For now, since we have no pinmux in fdt */ |
| 70ad375e | 48 | pinmux_tristate_disable(PMUX_PINGRP_SLXK); |
| 6dca554f SW |
49 | /* For USB1's ULPI signals */ |
| 50 | funcmux_select(PERIPH_ID_USB2, FUNCMUX_USB2_ULPI); | |
| 51 | pinmux_set_func(PMUX_PINGRP_CDEV2, PMUX_FUNC_PLLP_OUT4); | |
| 52 | pinmux_tristate_disable(PMUX_PINGRP_CDEV2); | |
| 53 | /* USB1 PHY reset GPIO */ | |
| 54 | pinmux_tristate_disable(PMUX_PINGRP_UAC); | |
| f10393e5 | 55 | } |