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affae2bf WD |
1 | /* |
2 | * (C) Copyright 2001 | |
3 | * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net | |
4 | * | |
5 | * (C) Copyright 2001 | |
6 | * Wolfgang Denk, DENX Software Engineering, wd@denx.de. | |
7 | * | |
8 | * See file CREDITS for list of people who contributed to this | |
9 | * project. | |
10 | * | |
11 | * This program is free software; you can redistribute it and/or | |
12 | * modify it under the terms of the GNU General Public License as | |
13 | * published by the Free Software Foundation; either version 2 of | |
14 | * the License, or (at your option) any later version. | |
15 | * | |
16 | * This program is distributed in the hope that it will be useful, | |
17 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
18 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
19 | * GNU General Public License for more details. | |
20 | * | |
21 | * You should have received a copy of the GNU General Public License | |
22 | * along with this program; if not, write to the Free Software | |
23 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, | |
24 | * MA 02111-1307 USA | |
25 | */ | |
26 | ||
27 | #include <common.h> | |
28 | #include <mpc8xx.h> | |
29 | ||
6d0f6bcf | 30 | flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH chips */ |
affae2bf WD |
31 | extern u_long *my_sernum; /* from nx823.c */ |
32 | ||
33 | /*----------------------------------------------------------------------- | |
34 | * Protection Flags: | |
35 | */ | |
36 | #define FLAG_PROTECT_SET 0x01 | |
37 | #define FLAG_PROTECT_CLEAR 0x02 | |
38 | ||
39 | /* Board support for 1 or 2 flash devices */ | |
40 | #undef FLASH_PORT_WIDTH32 | |
41 | #define FLASH_PORT_WIDTH16 | |
42 | ||
43 | #ifdef FLASH_PORT_WIDTH16 | |
44 | #define FLASH_PORT_WIDTH ushort | |
45 | #define FLASH_PORT_WIDTHV vu_short | |
46 | #else | |
47 | #define FLASH_PORT_WIDTH ulong | |
48 | #define FLASH_PORT_WIDTHV vu_long | |
49 | #endif | |
50 | ||
51 | #define FPW FLASH_PORT_WIDTH | |
52 | #define FPWV FLASH_PORT_WIDTHV | |
53 | ||
54 | /*----------------------------------------------------------------------- | |
55 | * Functions | |
56 | */ | |
57 | static ulong flash_get_size (FPW *addr, flash_info_t *info); | |
58 | static int write_data (flash_info_t *info, ulong dest, FPW data); | |
59 | static void flash_get_offsets (ulong base, flash_info_t *info); | |
60 | ||
61 | /*----------------------------------------------------------------------- | |
62 | */ | |
63 | ||
64 | unsigned long flash_init (void) | |
65 | { | |
6d0f6bcf | 66 | volatile immap_t *immap = (immap_t *)CONFIG_SYS_IMMR; |
affae2bf WD |
67 | volatile memctl8xx_t *memctl = &immap->im_memctl; |
68 | unsigned long size_b0; | |
69 | int i; | |
70 | ||
71 | /* Init: no FLASHes known */ | |
6d0f6bcf | 72 | for (i=0; i<CONFIG_SYS_MAX_FLASH_BANKS; ++i) { |
affae2bf WD |
73 | flash_info[i].flash_id = FLASH_UNKNOWN; |
74 | } | |
75 | ||
76 | /* Static FLASH Bank configuration here - FIXME XXX */ | |
77 | size_b0 = flash_get_size((FPW *)FLASH_BASE0_PRELIM, &flash_info[0]); | |
78 | ||
79 | if (flash_info[0].flash_id == FLASH_UNKNOWN) { | |
80 | printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n", | |
81 | size_b0, size_b0<<20); | |
82 | } | |
83 | ||
84 | /* Remap FLASH according to real size */ | |
6d0f6bcf JCPV |
85 | memctl->memc_or0 = CONFIG_SYS_OR_TIMING_FLASH | (-size_b0 & 0xFFFF8000); |
86 | memctl->memc_br0 = (CONFIG_SYS_FLASH_BASE & BR_BA_MSK) | BR_PS_16 | BR_MS_GPCM | BR_V; | |
affae2bf WD |
87 | |
88 | /* Re-do sizing to get full correct info */ | |
6d0f6bcf | 89 | size_b0 = flash_get_size((FPW *)CONFIG_SYS_FLASH_BASE, &flash_info[0]); |
affae2bf | 90 | |
6d0f6bcf | 91 | flash_get_offsets (CONFIG_SYS_FLASH_BASE, &flash_info[0]); |
affae2bf WD |
92 | |
93 | /* monitor protection ON by default */ | |
94 | (void)flash_protect(FLAG_PROTECT_SET, | |
6d0f6bcf JCPV |
95 | CONFIG_SYS_FLASH_BASE, |
96 | CONFIG_SYS_FLASH_BASE+monitor_flash_len-1, | |
affae2bf WD |
97 | &flash_info[0]); |
98 | ||
99 | flash_info[0].size = size_b0; | |
100 | ||
101 | return (size_b0); | |
102 | } | |
103 | ||
104 | /*----------------------------------------------------------------------- | |
105 | */ | |
106 | static void flash_get_offsets (ulong base, flash_info_t *info) | |
107 | { | |
108 | int i; | |
109 | ||
110 | if (info->flash_id == FLASH_UNKNOWN) { | |
111 | return; | |
112 | } | |
113 | ||
114 | if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL) { | |
115 | for (i = 0; i < info->sector_count; i++) { | |
116 | info->start[i] = base + (i * 0x00020000); | |
117 | } | |
118 | } | |
119 | } | |
120 | ||
121 | /*----------------------------------------------------------------------- | |
122 | */ | |
123 | void flash_print_info (flash_info_t *info) | |
124 | { | |
125 | int i; | |
126 | ||
127 | if (info->flash_id == FLASH_UNKNOWN) { | |
128 | printf ("missing or unknown FLASH type\n"); | |
129 | return; | |
130 | } | |
131 | ||
132 | switch (info->flash_id & FLASH_VENDMASK) { | |
133 | case FLASH_MAN_INTEL: printf ("INTEL "); break; | |
134 | default: printf ("Unknown Vendor "); break; | |
135 | } | |
136 | ||
137 | switch (info->flash_id & FLASH_TYPEMASK) { | |
138 | case FLASH_28F320J3A: | |
139 | printf ("28F320J3A\n"); break; | |
140 | case FLASH_28F640J3A: | |
141 | printf ("28F640J3A\n"); break; | |
142 | case FLASH_28F128J3A: | |
143 | printf ("28F128J3A\n"); break; | |
144 | default: printf ("Unknown Chip Type\n"); break; | |
145 | } | |
146 | ||
147 | printf (" Size: %ld MB in %d Sectors\n", | |
148 | info->size >> 20, info->sector_count); | |
149 | ||
150 | printf (" Sector Start Addresses:"); | |
151 | for (i=0; i<info->sector_count; ++i) { | |
152 | if ((i % 5) == 0) | |
153 | printf ("\n "); | |
154 | printf (" %08lX%s", | |
155 | info->start[i], | |
156 | info->protect[i] ? " (RO)" : " " | |
157 | ); | |
158 | } | |
159 | printf ("\n"); | |
160 | return; | |
161 | } | |
162 | ||
163 | /*----------------------------------------------------------------------- | |
164 | */ | |
165 | ||
166 | ||
167 | /*----------------------------------------------------------------------- | |
168 | */ | |
169 | ||
170 | /* | |
171 | * The following code cannot be run from FLASH! | |
172 | */ | |
173 | ||
174 | static ulong flash_get_size (FPW *addr, flash_info_t *info) | |
175 | { | |
176 | FPW value; | |
177 | ||
178 | /* Write auto select command: read Manufacturer ID */ | |
179 | addr[0x5555] = (FPW)0x00AA00AA; | |
180 | addr[0x2AAA] = (FPW)0x00550055; | |
181 | addr[0x5555] = (FPW)0x00900090; | |
182 | ||
183 | value = addr[0]; | |
184 | ||
185 | switch (value) { | |
186 | case (FPW)INTEL_MANUFACT: | |
187 | info->flash_id = FLASH_MAN_INTEL; | |
188 | break; | |
189 | default: | |
190 | info->flash_id = FLASH_UNKNOWN; | |
191 | info->sector_count = 0; | |
192 | info->size = 0; | |
193 | addr[0] = (FPW)0x00FF00FF; /* restore read mode */ | |
194 | return (0); /* no or unknown flash */ | |
195 | } | |
196 | ||
197 | value = addr[1]; /* device ID */ | |
198 | ||
199 | switch (value) { | |
200 | case (FPW)INTEL_ID_28F320J3A: | |
201 | info->flash_id += FLASH_28F320J3A; | |
202 | info->sector_count = 32; | |
203 | info->size = 0x00400000; | |
204 | break; /* => 4 MB */ | |
205 | ||
206 | case (FPW)INTEL_ID_28F640J3A: | |
207 | info->flash_id += FLASH_28F640J3A; | |
208 | info->sector_count = 64; | |
209 | info->size = 0x00800000; | |
210 | break; /* => 8 MB */ | |
211 | ||
212 | case (FPW)INTEL_ID_28F128J3A: | |
213 | info->flash_id += FLASH_28F128J3A; | |
214 | info->sector_count = 128; | |
215 | info->size = 0x01000000; | |
216 | break; /* => 16 MB */ | |
217 | ||
218 | default: | |
219 | info->flash_id = FLASH_UNKNOWN; | |
220 | break; | |
221 | } | |
222 | ||
6d0f6bcf | 223 | if (info->sector_count > CONFIG_SYS_MAX_FLASH_SECT) { |
affae2bf | 224 | printf ("** ERROR: sector count %d > max (%d) **\n", |
6d0f6bcf JCPV |
225 | info->sector_count, CONFIG_SYS_MAX_FLASH_SECT); |
226 | info->sector_count = CONFIG_SYS_MAX_FLASH_SECT; | |
affae2bf WD |
227 | } |
228 | ||
229 | addr[0] = (FPW)0x00FF00FF; /* restore read mode */ | |
230 | ||
231 | return (info->size); | |
232 | } | |
233 | ||
234 | ||
235 | /*----------------------------------------------------------------------- | |
236 | */ | |
237 | ||
238 | int flash_erase (flash_info_t *info, int s_first, int s_last) | |
239 | { | |
240 | int flag, prot, sect; | |
241 | ulong type, start, now, last; | |
242 | int rcode = 0; | |
243 | ||
244 | if ((s_first < 0) || (s_first > s_last)) { | |
245 | if (info->flash_id == FLASH_UNKNOWN) { | |
246 | printf ("- missing\n"); | |
247 | } else { | |
248 | printf ("- no sectors to erase\n"); | |
249 | } | |
250 | return 1; | |
251 | } | |
252 | ||
253 | type = (info->flash_id & FLASH_VENDMASK); | |
254 | if ((type != FLASH_MAN_INTEL)) { | |
255 | printf ("Can't erase unknown flash type %08lx - aborted\n", | |
256 | info->flash_id); | |
257 | return 1; | |
258 | } | |
259 | ||
260 | prot = 0; | |
261 | for (sect=s_first; sect<=s_last; ++sect) { | |
262 | if (info->protect[sect]) { | |
263 | prot++; | |
264 | } | |
265 | } | |
266 | ||
267 | if (prot) { | |
268 | printf ("- Warning: %d protected sectors will not be erased!\n", | |
269 | prot); | |
270 | } else { | |
271 | printf ("\n"); | |
272 | } | |
273 | ||
274 | start = get_timer (0); | |
275 | last = start; | |
276 | /* Start erase on unprotected sectors */ | |
277 | for (sect = s_first; sect<=s_last; sect++) { | |
278 | if (info->protect[sect] == 0) { /* not protected */ | |
279 | FPWV *addr = (FPWV *)(info->start[sect]); | |
280 | FPW status; | |
281 | ||
282 | /* Disable interrupts which might cause a timeout here */ | |
283 | flag = disable_interrupts(); | |
284 | ||
285 | *addr = (FPW)0x00500050; /* clear status register */ | |
286 | *addr = (FPW)0x00200020; /* erase setup */ | |
287 | *addr = (FPW)0x00D000D0; /* erase confirm */ | |
288 | ||
289 | /* re-enable interrupts if necessary */ | |
290 | if (flag) | |
291 | enable_interrupts(); | |
292 | ||
293 | /* wait at least 80us - let's wait 1 ms */ | |
294 | udelay (1000); | |
295 | ||
296 | while (((status = *addr) & (FPW)0x00800080) != (FPW)0x00800080) { | |
6d0f6bcf | 297 | if ((now=get_timer(start)) > CONFIG_SYS_FLASH_ERASE_TOUT) { |
affae2bf WD |
298 | printf ("Timeout\n"); |
299 | *addr = (FPW)0x00B000B0; /* suspend erase */ | |
300 | *addr = (FPW)0x00FF00FF; /* reset to read mode */ | |
301 | rcode = 1; | |
302 | break; | |
303 | } | |
304 | ||
305 | /* show that we're waiting */ | |
306 | if ((now - last) > 1000) { /* every second */ | |
307 | putc ('.'); | |
308 | last = now; | |
309 | } | |
310 | } | |
311 | ||
312 | *addr = (FPW)0x00FF00FF; /* reset to read mode */ | |
313 | printf (" done\n"); | |
314 | } | |
315 | } | |
316 | return rcode; | |
317 | } | |
318 | ||
319 | /*----------------------------------------------------------------------- | |
320 | * Copy memory to flash, returns: | |
321 | * 0 - OK | |
322 | * 1 - write timeout | |
323 | * 2 - Flash not erased | |
324 | * 4 - Flash not identified | |
325 | */ | |
326 | ||
327 | int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt) | |
328 | { | |
329 | ulong cp, wp; | |
330 | FPW data; | |
331 | int count, i, l, rc, port_width; | |
332 | ||
333 | if (info->flash_id == FLASH_UNKNOWN) { | |
334 | return 4; | |
335 | } | |
336 | /* get lower word aligned address */ | |
337 | #ifdef FLASH_PORT_WIDTH16 | |
338 | wp = (addr & ~1); | |
339 | port_width = 2; | |
340 | #else | |
341 | wp = (addr & ~3); | |
342 | port_width = 4; | |
343 | #endif | |
344 | ||
345 | /* save sernum if needed */ | |
6d0f6bcf | 346 | if (addr >= CONFIG_SYS_FLASH_SN_SECTOR && addr < CONFIG_SYS_FLASH_SN_BASE) |
affae2bf | 347 | { |
6d0f6bcf | 348 | u_long dest = CONFIG_SYS_FLASH_SN_BASE; |
affae2bf WD |
349 | u_short *sn = (u_short *)my_sernum; |
350 | ||
351 | printf("(saving sernum)"); | |
352 | for (i=0; i<4; i++) | |
353 | { | |
354 | if ((rc = write_data(info, dest, sn[i])) != 0) { | |
355 | return (rc); | |
356 | } | |
357 | dest += port_width; | |
358 | } | |
359 | } | |
360 | ||
361 | /* | |
362 | * handle unaligned start bytes | |
363 | */ | |
364 | if ((l = addr - wp) != 0) { | |
365 | data = 0; | |
366 | for (i=0, cp=wp; i<l; ++i, ++cp) { | |
367 | data = (data << 8) | (*(uchar *)cp); | |
368 | } | |
369 | for (; i<port_width && cnt>0; ++i) { | |
370 | data = (data << 8) | *src++; | |
371 | --cnt; | |
372 | ++cp; | |
373 | } | |
374 | for (; cnt==0 && i<port_width; ++i, ++cp) { | |
375 | data = (data << 8) | (*(uchar *)cp); | |
376 | } | |
377 | ||
378 | if ((rc = write_data(info, wp, data)) != 0) { | |
379 | return (rc); | |
380 | } | |
381 | wp += port_width; | |
382 | } | |
383 | ||
384 | /* | |
385 | * handle word aligned part | |
386 | */ | |
387 | count = 0; | |
388 | while (cnt >= port_width) { | |
389 | data = 0; | |
390 | for (i=0; i<port_width; ++i) { | |
391 | data = (data << 8) | *src++; | |
392 | } | |
393 | if ((rc = write_data(info, wp, data)) != 0) { | |
394 | return (rc); | |
395 | } | |
396 | wp += port_width; | |
397 | cnt -= port_width; | |
398 | if (count++ > 0x800) | |
399 | { | |
400 | putc('.'); | |
401 | count = 0; | |
402 | } | |
403 | } | |
404 | ||
405 | if (cnt == 0) { | |
406 | return (0); | |
407 | } | |
408 | ||
409 | /* | |
410 | * handle unaligned tail bytes | |
411 | */ | |
412 | data = 0; | |
413 | for (i=0, cp=wp; i<port_width && cnt>0; ++i, ++cp) { | |
414 | data = (data << 8) | *src++; | |
415 | --cnt; | |
416 | } | |
417 | for (; i<port_width; ++i, ++cp) { | |
418 | data = (data << 8) | (*(uchar *)cp); | |
419 | } | |
420 | ||
421 | return (write_data(info, wp, data)); | |
422 | } | |
423 | ||
424 | /*----------------------------------------------------------------------- | |
425 | * Write a word or halfword to Flash, returns: | |
426 | * 0 - OK | |
427 | * 1 - write timeout | |
428 | * 2 - Flash not erased | |
429 | */ | |
430 | static int write_data (flash_info_t *info, ulong dest, FPW data) | |
431 | { | |
432 | FPWV *addr = (FPWV *)dest; | |
433 | ulong status; | |
434 | ulong start; | |
435 | int flag; | |
436 | ||
437 | /* Check if Flash is (sufficiently) erased */ | |
438 | if ((*addr & data) != data) { | |
439 | printf("not erased at %08lx (%x)\n",(ulong)addr,*addr); | |
440 | return (2); | |
441 | } | |
442 | /* Disable interrupts which might cause a timeout here */ | |
443 | flag = disable_interrupts(); | |
444 | ||
445 | *addr = (FPW)0x00400040; /* write setup */ | |
446 | *addr = data; | |
447 | ||
448 | /* re-enable interrupts if necessary */ | |
449 | if (flag) | |
450 | enable_interrupts(); | |
451 | ||
452 | start = get_timer (0); | |
453 | ||
454 | while (((status = *addr) & (FPW)0x00800080) != (FPW)0x00800080) { | |
6d0f6bcf | 455 | if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT) { |
affae2bf WD |
456 | *addr = (FPW)0x00FF00FF; /* restore read mode */ |
457 | return (1); | |
458 | } | |
459 | } | |
460 | ||
461 | *addr = (FPW)0x00FF00FF; /* restore read mode */ | |
462 | ||
463 | return (0); | |
464 | } |