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ppc4xx: Consolidate pci_target_init() function
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CommitLineData
a4c8d138
SR
1/*
2 * (C) Copyright 2006
3 * Stefan Roese, DENX Software Engineering, sr@denx.de.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24#include <common.h>
25#include <ppc4xx.h>
566a494f
HS
26#include <malloc.h>
27#include <command.h>
28#include <crc.h>
a4c8d138
SR
29#include <asm/processor.h>
30#include <spd_sdram.h>
566a494f
HS
31#include <status_led.h>
32#include <sha1.h>
f98984cb 33#include <asm/io.h>
d2567be9 34#include <net.h>
a4c8d138
SR
35
36DECLARE_GLOBAL_DATA_PTR;
37
6d0f6bcf 38extern flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH chips */
a4c8d138 39
566a494f
HS
40unsigned char sha1_checksum[SHA1_SUM_LEN];
41
42/* swap 4 Bits (Bit0 = Bit3, Bit1 = Bit2, Bit2 = Bit1 and Bit3 = Bit0) */
43unsigned char swapbits[16] = {0x0, 0x8, 0x4, 0xc, 0x2, 0xa, 0x6, 0xe,
44 0x1, 0x9, 0x5, 0xd, 0x3, 0xb, 0x7, 0xf};
45
46static void set_leds (int val)
47{
48 out32(GPIO0_OR, (in32 (GPIO0_OR) & ~0x78000000) | (val << 27));
49}
50
51#define GET_LEDS ((in32 (GPIO0_OR) & 0x78000000) >> 27)
52
53void __led_init (led_id_t mask, int state)
54{
55 int val = GET_LEDS;
56
57 if (state == STATUS_LED_ON)
58 val |= mask;
59 else
60 val &= ~mask;
61 set_leds (val);
62}
63
64void __led_set (led_id_t mask, int state)
65{
66 int val = GET_LEDS;
67
68 if (state == STATUS_LED_ON)
69 val |= mask;
70 else if (state == STATUS_LED_OFF)
71 val &= ~mask;
72 set_leds (val);
73}
74
75void __led_toggle (led_id_t mask)
a4c8d138 76{
566a494f
HS
77 int val = GET_LEDS;
78
79 val ^= mask;
80 set_leds (val);
a4c8d138
SR
81}
82
566a494f
HS
83static void status_led_blink (void)
84{
85 int i;
86 int val = GET_LEDS;
87
88 /* set all LED which are on, to state BLINKING */
89 for (i = 0; i < 4; i++) {
96e1d75b
HS
90 if (val & 0x01) status_led_set (3 - i, STATUS_LED_BLINKING);
91 else status_led_set (3 - i, STATUS_LED_OFF);
92 val = val >> 1;
566a494f
HS
93 }
94}
95
96#if defined(CONFIG_SHOW_BOOT_PROGRESS)
97void show_boot_progress (int val)
a4c8d138 98{
566a494f
HS
99 /* find all valid Codes for val in README */
100 if (val == -30) return;
101 if (val < 0) {
102 /* smthing goes wrong */
103 status_led_blink ();
104 return;
105 }
106 switch (val) {
107 case 1:
108 /* validating Image */
109 status_led_set (0, STATUS_LED_OFF);
110 status_led_set (1, STATUS_LED_ON);
111 status_led_set (2, STATUS_LED_ON);
112 break;
113 case 15:
114 /* booting */
115 status_led_set (0, STATUS_LED_ON);
116 status_led_set (1, STATUS_LED_ON);
117 status_led_set (2, STATUS_LED_ON);
118 break;
96e1d75b 119#if 0
566a494f
HS
120 case 64:
121 /* starting Ethernet configuration */
122 status_led_set (0, STATUS_LED_OFF);
123 status_led_set (1, STATUS_LED_OFF);
124 status_led_set (2, STATUS_LED_ON);
125 break;
96e1d75b 126#endif
566a494f
HS
127 case 80:
128 /* loading Image */
129 status_led_set (0, STATUS_LED_ON);
130 status_led_set (1, STATUS_LED_OFF);
131 status_led_set (2, STATUS_LED_ON);
132 break;
133 }
a4c8d138 134}
566a494f 135#endif
a4c8d138
SR
136
137int board_early_init_f(void)
138{
139 register uint reg;
140
141 set_leds(0); /* display boot info counter */
142
143 /*--------------------------------------------------------------------
144 * Setup the external bus controller/chip selects
145 *-------------------------------------------------------------------*/
d1c3b275
SR
146 mtdcr(EBC0_CFGADDR, EBC0_CFG);
147 reg = mfdcr(EBC0_CFGDATA);
148 mtdcr(EBC0_CFGDATA, reg | 0x04000000); /* Set ATC */
a4c8d138
SR
149
150 /*--------------------------------------------------------------------
151 * GPIO's are alreay setup in cpu/ppc4xx/cpu_init.c
152 * via define from board config file.
153 *-------------------------------------------------------------------*/
154
155 /*--------------------------------------------------------------------
156 * Setup the interrupt controller polarities, triggers, etc.
157 *-------------------------------------------------------------------*/
952e7760
SR
158 mtdcr(UIC0SR, 0xffffffff); /* clear all */
159 mtdcr(UIC0ER, 0x00000000); /* disable all */
160 mtdcr(UIC0CR, 0x00000001); /* UIC1 crit is critical */
161 mtdcr(UIC0PR, 0xfffffe1f); /* per ref-board manual */
162 mtdcr(UIC0TR, 0x01c00000); /* per ref-board manual */
163 mtdcr(UIC0VR, 0x00000001); /* int31 highest, base=0x000 */
164 mtdcr(UIC0SR, 0xffffffff); /* clear all */
165
166 mtdcr(UIC1SR, 0xffffffff); /* clear all */
167 mtdcr(UIC1ER, 0x00000000); /* disable all */
168 mtdcr(UIC1CR, 0x00000000); /* all non-critical */
169 mtdcr(UIC1PR, 0xffffe0ff); /* per ref-board manual */
170 mtdcr(UIC1TR, 0x00ffc000); /* per ref-board manual */
171 mtdcr(UIC1VR, 0x00000001); /* int31 highest, base=0x000 */
172 mtdcr(UIC1SR, 0xffffffff); /* clear all */
a4c8d138
SR
173
174 /*--------------------------------------------------------------------
175 * Setup other serial configuration
176 *-------------------------------------------------------------------*/
d1c3b275
SR
177 mfsdr(SDR0_PCI0, reg);
178 mtsdr(SDR0_PCI0, 0x80000000 | reg); /* PCI arbiter enabled */
179 mtsdr(SDR0_PFC0, 0x00000000); /* Pin function: enable GPIO49-63 */
180 mtsdr(SDR0_PFC1, 0x00048000); /* Pin function: UART0 has 4 pins, select IRQ5 */
a4c8d138
SR
181
182 return 0;
183}
184
566a494f 185#define EEPROM_LEN 256
9c150102 186static void load_ethaddr(void)
566a494f 187{
9c150102 188 int ok_ethaddr, ok_eth1addr;
566a494f 189 int ret;
d2567be9 190 uchar buf[EEPROM_LEN];
566a494f
HS
191 char *use_eeprom;
192 u16 checksumcrc16 = 0;
193
9c150102
MF
194 /* If the env is sane, then nothing for us to do */
195 ok_ethaddr = eth_getenv_enetaddr("ethaddr", buf);
196 ok_eth1addr = eth_getenv_enetaddr("eth1addr", buf);
197 if (ok_ethaddr && ok_eth1addr)
198 return;
199
566a494f
HS
200 /* read the MACs from EEprom */
201 status_led_set (0, STATUS_LED_ON);
202 status_led_set (1, STATUS_LED_ON);
d2567be9 203 ret = eeprom_read (CONFIG_SYS_I2C_EEPROM_ADDR, 0, buf, EEPROM_LEN);
566a494f 204 if (ret == 0) {
d2567be9 205 checksumcrc16 = cyg_crc16 (buf, EEPROM_LEN - 2);
566a494f
HS
206 /* check, if the EEprom is programmed:
207 * - The Prefix(Byte 0,1,2) is equal to "ATR"
208 * - The checksum, stored in the last 2 Bytes, is correct
209 */
d2567be9 210 if ((strncmp ((char *)buf,"ATR",3) != 0) ||
4ef218f6
WD
211 ((checksumcrc16 >> 8) != buf[EEPROM_LEN - 2]) ||
212 ((checksumcrc16 & 0xff) != buf[EEPROM_LEN - 1])) {
566a494f
HS
213 /* EEprom is not programmed */
214 printf("%s: EEPROM Checksum not OK\n", __FUNCTION__);
215 } else {
216 /* get the MACs */
9c150102
MF
217 if (!ok_ethaddr)
218 eth_setenv_enetaddr("ethaddr", &buf[3]);
219 if (!ok_eth1addr)
220 eth_setenv_enetaddr("eth1addr", &buf[9]);
566a494f
HS
221 return;
222 }
223 }
224
225 /* some error reading the EEprom */
226 if ((use_eeprom = getenv ("use_eeprom_ethaddr")) == NULL) {
227 /* dont use bootcmd */
228 setenv("bootdelay", "-1");
229 return;
230 }
231 /* == default ? use standard */
232 if (strncmp (use_eeprom, "default", 7) == 0) {
233 return;
234 }
235 /* Env doesnt exist -> hang */
236 status_led_blink ();
90790247
HS
237 /* here we do this "handy" because we have no interrupts
238 at this time */
239 puts ("### EEPROM ERROR ### Please RESET the board ###\n");
240 for (;;) {
241 __led_toggle (12);
242 udelay (100000);
243 }
566a494f
HS
244 return;
245}
246
247#ifdef CONFIG_PREBOOT
248
249static uchar kbd_magic_prefix[] = "key_magic";
250static uchar kbd_command_prefix[] = "key_cmd";
251
252struct kbd_data_t {
253 char s1;
254 char s2;
255};
256
257struct kbd_data_t* get_keys (struct kbd_data_t *kbd_data)
258{
259 char *val;
260 unsigned long tmp;
261
262 /* use the DIPs for some bootoptions */
263 val = getenv (ENV_NAME_DIP);
264 tmp = simple_strtoul (val, NULL, 16);
265
266 kbd_data->s2 = (tmp & 0x0f);
267 kbd_data->s1 = (tmp & 0xf0) >> 4;
268 return kbd_data;
269}
270
271static int compare_magic (const struct kbd_data_t *kbd_data, char *str)
272{
273 char s1 = str[0];
274
275 if (s1 >= '0' && s1 <= '9')
276 s1 -= '0';
277 else if (s1 >= 'a' && s1 <= 'f')
278 s1 = s1 - 'a' + 10;
279 else if (s1 >= 'A' && s1 <= 'F')
280 s1 = s1 - 'A' + 10;
281 else
282 return -1;
283
284 if (s1 != kbd_data->s1) return -1;
285
286 s1 = str[1];
287 if (s1 >= '0' && s1 <= '9')
288 s1 -= '0';
289 else if (s1 >= 'a' && s1 <= 'f')
290 s1 = s1 - 'a' + 10;
291 else if (s1 >= 'A' && s1 <= 'F')
292 s1 = s1 - 'A' + 10;
293 else
294 return -1;
295
296 if (s1 != kbd_data->s2) return -1;
297 return 0;
298}
299
300static char *key_match (const struct kbd_data_t *kbd_data)
301{
302 char magic[sizeof (kbd_magic_prefix) + 1];
303 char *suffix;
304 char *kbd_magic_keys;
305
306 /*
307 * The following string defines the characters that can be appended
308 * to "key_magic" to form the names of environment variables that
309 * hold "magic" key codes, i. e. such key codes that can cause
310 * pre-boot actions. If the string is empty (""), then only
311 * "key_magic" is checked (old behaviour); the string "125" causes
312 * checks for "key_magic1", "key_magic2" and "key_magic5", etc.
313 */
314 if ((kbd_magic_keys = getenv ("magic_keys")) == NULL)
315 kbd_magic_keys = "";
316
317 /* loop over all magic keys;
318 * use '\0' suffix in case of empty string
319 */
320 for (suffix = kbd_magic_keys; *suffix ||
321 suffix == kbd_magic_keys; ++suffix) {
322 sprintf (magic, "%s%c", kbd_magic_prefix, *suffix);
323 if (compare_magic (kbd_data, getenv (magic)) == 0) {
324 char cmd_name[sizeof (kbd_command_prefix) + 1];
325 char *cmd;
326
327 sprintf (cmd_name, "%s%c", kbd_command_prefix, *suffix);
328 cmd = getenv (cmd_name);
329
330 return (cmd);
331 }
332 }
333 return (NULL);
334}
335
336#endif /* CONFIG_PREBOOT */
337
338static int pcs440ep_readinputs (void)
339{
340 int i;
341 char value[20];
342
343 /* read the inputs and set the Envvars */
344 /* Revision Level Bit 26 - 29 */
345 i = ((in32 (GPIO0_IR) & 0x0000003c) >> 2);
346 i = swapbits[i];
347 sprintf (value, "%02x", i);
348 setenv (ENV_NAME_REVLEV, value);
349 /* Solder Switch Bit 30 - 33 */
350 i = (in32 (GPIO0_IR) & 0x00000003) << 2;
351 i += (in32 (GPIO1_IR) & 0xc0000000) >> 30;
352 i = swapbits[i];
353 sprintf (value, "%02x", i);
354 setenv (ENV_NAME_SOLDER, value);
355 /* DIP Switch Bit 49 - 56 */
356 i = ((in32 (GPIO1_IR) & 0x00007f80) >> 7);
357 i = (swapbits[i & 0x0f] << 4) + swapbits[(i & 0xf0) >> 4];
358 sprintf (value, "%02x", i);
359 setenv (ENV_NAME_DIP, value);
360 return 0;
361}
362
363
364#if defined(CONFIG_SHA1_CHECK_UB_IMG)
365/*************************************************************************
366 * calculate a SHA1 sum for the U-Boot image in Flash.
367 *
368 ************************************************************************/
369static int pcs440ep_sha1 (int docheck)
370{
371 unsigned char *data;
372 unsigned char *ptroff;
373 unsigned char output[20];
374 unsigned char org[20];
375 int i, len = CONFIG_SHA1_LEN;
376
6d0f6bcf
JCPV
377 memcpy ((char *)CONFIG_SYS_LOAD_ADDR, (char *)CONFIG_SHA1_START, len);
378 data = (unsigned char *)CONFIG_SYS_LOAD_ADDR;
566a494f
HS
379 ptroff = &data[len + SHA1_SUM_POS];
380
381 for (i = 0; i < SHA1_SUM_LEN; i++) {
382 org[i] = ptroff[i];
383 ptroff[i] = 0;
384 }
4ef218f6 385
566a494f
HS
386 sha1_csum ((unsigned char *) data, len, (unsigned char *)output);
387
388 if (docheck == 2) {
389 for (i = 0; i < 20 ; i++) {
390 printf("%02X ", output[i]);
391 }
392 printf("\n");
393 }
394 if (docheck == 1) {
395 for (i = 0; i < 20 ; i++) {
396 if (org[i] != output[i]) return 1;
397 }
398 }
399 return 0;
400}
401
402/*************************************************************************
403 * do some checks after the SHA1 checksum from the U-Boot Image was
404 * calculated.
405 *
406 ************************************************************************/
407static void pcs440ep_checksha1 (void)
408{
409 int ret;
410 char *cs_test;
411
96e1d75b
HS
412 status_led_set (0, STATUS_LED_OFF);
413 status_led_set (1, STATUS_LED_OFF);
414 status_led_set (2, STATUS_LED_ON);
566a494f
HS
415 ret = pcs440ep_sha1 (1);
416 if (ret == 0) return;
417
418 if ((cs_test = getenv ("cs_test")) == NULL) {
419 /* Env doesnt exist -> hang */
420 status_led_blink ();
90790247
HS
421 /* here we do this "handy" because we have no interrupts
422 at this time */
423 puts ("### SHA1 ERROR ### Please RESET the board ###\n");
424 for (;;) {
425 __led_toggle (2);
426 udelay (100000);
427 }
566a494f
HS
428 }
429
430 if (strncmp (cs_test, "off", 3) == 0) {
431 printf ("SHA1 U-Boot sum NOT ok!\n");
432 setenv ("bootdelay", "-1");
433 }
434}
435#else
436static __inline__ void pcs440ep_checksha1 (void) { do {} while (0);}
437#endif
438
a4c8d138
SR
439int misc_init_r (void)
440{
441 uint pbcr;
442 int size_val = 0;
443
9c150102
MF
444 load_ethaddr();
445
a4c8d138 446 /* Re-do sizing to get full correct info */
d1c3b275
SR
447 mtdcr(EBC0_CFGADDR, PB0CR);
448 pbcr = mfdcr(EBC0_CFGDATA);
a4c8d138
SR
449 switch (gd->bd->bi_flashsize) {
450 case 1 << 20:
451 size_val = 0;
452 break;
453 case 2 << 20:
454 size_val = 1;
455 break;
456 case 4 << 20:
457 size_val = 2;
458 break;
459 case 8 << 20:
460 size_val = 3;
461 break;
462 case 16 << 20:
463 size_val = 4;
464 break;
465 case 32 << 20:
466 size_val = 5;
467 break;
468 case 64 << 20:
469 size_val = 6;
470 break;
471 case 128 << 20:
472 size_val = 7;
473 break;
474 }
475 pbcr = (pbcr & 0x0001ffff) | gd->bd->bi_flashstart | (size_val << 17);
d1c3b275
SR
476 mtdcr(EBC0_CFGADDR, PB0CR);
477 mtdcr(EBC0_CFGDATA, pbcr);
a4c8d138
SR
478
479 /* adjust flash start and offset */
480 gd->bd->bi_flashstart = 0 - gd->bd->bi_flashsize;
481 gd->bd->bi_flashoffset = 0;
482
483 /* Monitor protection ON by default */
484 (void)flash_protect(FLAG_PROTECT_SET,
6d0f6bcf 485 -CONFIG_SYS_MONITOR_LEN,
a4c8d138
SR
486 0xffffffff,
487 &flash_info[1]);
488
489 /* Env protection ON by default */
490 (void)flash_protect(FLAG_PROTECT_SET,
0e8d1586
JCPV
491 CONFIG_ENV_ADDR_REDUND,
492 CONFIG_ENV_ADDR_REDUND + 2*CONFIG_ENV_SECT_SIZE - 1,
4526c87e 493 &flash_info[1]);
a4c8d138 494
566a494f
HS
495 pcs440ep_readinputs ();
496 pcs440ep_checksha1 ();
497#ifdef CONFIG_PREBOOT
498 {
499 struct kbd_data_t kbd_data;
500 /* Decode keys */
501 char *str = strdup (key_match (get_keys (&kbd_data)));
502 /* Set or delete definition */
503 setenv ("preboot", str);
504 free (str);
505 }
506#endif /* CONFIG_PREBOOT */
a4c8d138
SR
507 return 0;
508}
509
510int checkboard(void)
511{
512 char *s = getenv("serial#");
513
514 printf("Board: PCS440EP");
515 if (s != NULL) {
516 puts(", serial# ");
517 puts(s);
518 }
519 putc('\n');
520
521 return (0);
522}
523
566a494f
HS
524void spd_ddr_init_hang (void)
525{
526 status_led_set (0, STATUS_LED_OFF);
527 status_led_set (1, STATUS_LED_ON);
528 /* we cannot use hang() because we are still running from
529 Flash, and so the status_led driver is not initialized */
90790247 530 puts ("### SDRAM ERROR ### Please RESET the board ###\n");
566a494f
HS
531 for (;;) {
532 __led_toggle (4);
533 udelay (100000);
534 }
535}
566a494f 536
9973e3c6 537phys_size_t initdram (int board_type)
a4c8d138
SR
538{
539 long dram_size = 0;
540
566a494f
HS
541 status_led_set (0, STATUS_LED_ON);
542 status_led_set (1, STATUS_LED_OFF);
a4c8d138 543 dram_size = spd_sdram();
566a494f
HS
544 status_led_set (0, STATUS_LED_OFF);
545 status_led_set (1, STATUS_LED_ON);
546 if (dram_size == 0) {
547 hang();
548 }
a4c8d138
SR
549
550 return dram_size;
551}
552
a4c8d138
SR
553/*************************************************************************
554 * pci_pre_init
555 *
556 * This routine is called just prior to registering the hose and gives
557 * the board the opportunity to check things. Returning a value of zero
558 * indicates that things are bad & PCI initialization should be aborted.
559 *
560 * Different boards may wish to customize the pci controller structure
561 * (add regions, override default access routines, etc) or perform
562 * certain pre-initialization actions.
563 *
564 ************************************************************************/
466fff1a 565#if defined(CONFIG_PCI)
a4c8d138
SR
566int pci_pre_init(struct pci_controller *hose)
567{
568 unsigned long addr;
569
570 /*-------------------------------------------------------------------------+
571 | Set priority for all PLB3 devices to 0.
572 | Set PLB3 arbiter to fair mode.
573 +-------------------------------------------------------------------------*/
d1c3b275
SR
574 mfsdr(SD0_AMP1, addr);
575 mtsdr(SD0_AMP1, (addr & 0x000000FF) | 0x0000FF00);
576 addr = mfdcr(PLB3_ACR);
577 mtdcr(PLB3_ACR, addr | 0x80000000);
a4c8d138
SR
578
579 /*-------------------------------------------------------------------------+
580 | Set priority for all PLB4 devices to 0.
581 +-------------------------------------------------------------------------*/
d1c3b275
SR
582 mfsdr(SD0_AMP0, addr);
583 mtsdr(SD0_AMP0, (addr & 0x000000FF) | 0x0000FF00);
584 addr = mfdcr(PLB4_ACR) | 0xa0000000; /* Was 0x8---- */
585 mtdcr(PLB4_ACR, addr);
a4c8d138
SR
586
587 /*-------------------------------------------------------------------------+
588 | Set Nebula PLB4 arbiter to fair mode.
589 +-------------------------------------------------------------------------*/
590 /* Segment0 */
d1c3b275
SR
591 addr = (mfdcr(PLB0_ACR) & ~PLB0_ACR_PPM_MASK) | PLB0_ACR_PPM_FAIR;
592 addr = (addr & ~PLB0_ACR_HBU_MASK) | PLB0_ACR_HBU_ENABLED;
593 addr = (addr & ~PLB0_ACR_RDP_MASK) | PLB0_ACR_RDP_4DEEP;
594 addr = (addr & ~PLB0_ACR_WRP_MASK) | PLB0_ACR_WRP_2DEEP;
595 mtdcr(PLB0_ACR, addr);
a4c8d138
SR
596
597 /* Segment1 */
d1c3b275
SR
598 addr = (mfdcr(PLB1_ACR) & ~PLB1_ACR_PPM_MASK) | PLB1_ACR_PPM_FAIR;
599 addr = (addr & ~PLB1_ACR_HBU_MASK) | PLB1_ACR_HBU_ENABLED;
600 addr = (addr & ~PLB1_ACR_RDP_MASK) | PLB1_ACR_RDP_4DEEP;
601 addr = (addr & ~PLB1_ACR_WRP_MASK) | PLB1_ACR_WRP_2DEEP;
602 mtdcr(PLB1_ACR, addr);
a4c8d138
SR
603
604 return 1;
605}
466fff1a 606#endif /* defined(CONFIG_PCI) */
a4c8d138 607
a4c8d138
SR
608/*************************************************************************
609 * pci_master_init
610 *
611 ************************************************************************/
6d0f6bcf 612#if defined(CONFIG_PCI) && defined(CONFIG_SYS_PCI_MASTER_INIT)
a4c8d138
SR
613void pci_master_init(struct pci_controller *hose)
614{
615 unsigned short temp_short;
616
617 /*--------------------------------------------------------------------------+
618 | Write the PowerPC440 EP PCI Configuration regs.
619 | Enable PowerPC440 EP to be a master on the PCI bus (PMM).
620 | Enable PowerPC440 EP to act as a PCI memory target (PTM).
621 +--------------------------------------------------------------------------*/
622 pci_read_config_word(0, PCI_COMMAND, &temp_short);
623 pci_write_config_word(0, PCI_COMMAND,
624 temp_short | PCI_COMMAND_MASTER |
625 PCI_COMMAND_MEMORY);
626}
6d0f6bcf 627#endif /* defined(CONFIG_PCI) && defined(CONFIG_SYS_PCI_MASTER_INIT) */
a4c8d138 628
a4c8d138
SR
629/*************************************************************************
630 * hw_watchdog_reset
631 *
632 * This routine is called to reset (keep alive) the watchdog timer
633 *
634 ************************************************************************/
635#if defined(CONFIG_HW_WATCHDOG)
636void hw_watchdog_reset(void)
637{
638
639}
640#endif
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641
642/*************************************************************************
643 * "led" Commando for the U-Boot shell
644 *
645 ************************************************************************/
646int do_led (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
647{
96e1d75b 648 int rcode = 0, i;
566a494f
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649 ulong pattern = 0;
650
96e1d75b
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651 pattern = simple_strtoul (argv[1], NULL, 16);
652 if (pattern > 0x400) {
653 int val = GET_LEDS;
654 printf ("led: %x\n", val);
655 return rcode;
656 }
657 if (pattern > 0x200) {
566a494f
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658 status_led_blink ();
659 hang ();
660 return rcode;
661 }
96e1d75b 662 if (pattern > 0x100) {
566a494f
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663 status_led_blink ();
664 return rcode;
665 }
666 pattern &= 0x0f;
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667 for (i = 0; i < 4; i++) {
668 if (pattern & 0x01) status_led_set (i, STATUS_LED_ON);
669 else status_led_set (i, STATUS_LED_OFF);
670 pattern = pattern >> 1;
671 }
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672 return rcode;
673}
674
675U_BOOT_CMD(
53677ef1 676 led, 2, 1, do_led,
2fb2604d 677 "set the DIAG-LED",
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678 "[bitmask] 0x01 = DIAG 1 on\n"
679 " 0x02 = DIAG 2 on\n"
680 " 0x04 = DIAG 3 on\n"
681 " 0x08 = DIAG 4 on\n"
a89c33db 682 " > 0x100 set the LED, who are on, to state blinking"
566a494f
HS
683);
684
685#if defined(CONFIG_SHA1_CHECK_UB_IMG)
686/*************************************************************************
687 * "sha1" Commando for the U-Boot shell
688 *
689 ************************************************************************/
690int do_sha1 (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
691{
692 int rcode = -1;
693
694 if (argc < 2) {
695 usage:
62c3ae7c 696 cmd_usage(cmdtp);
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697 return 1;
698 }
699
700 if (argc >= 3) {
701 unsigned char *data;
702 unsigned char output[20];
703 int len;
704 int i;
4ef218f6 705
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706 data = (unsigned char *)simple_strtoul (argv[1], NULL, 16);
707 len = simple_strtoul (argv[2], NULL, 16);
708 sha1_csum (data, len, (unsigned char *)output);
709 printf ("U-Boot sum:\n");
710 for (i = 0; i < 20 ; i++) {
711 printf ("%02X ", output[i]);
712 }
713 printf ("\n");
714 if (argc == 4) {
715 data = (unsigned char *)simple_strtoul (argv[3], NULL, 16);
716 memcpy (data, output, 20);
717 }
718 return 0;
719 }
720 if (argc == 2) {
721 char *ptr = argv[1];
722 if (*ptr != '-') goto usage;
723 ptr++;
724 if ((*ptr == 'c') || (*ptr == 'C')) {
725 rcode = pcs440ep_sha1 (1);
726 printf ("SHA1 U-Boot sum %sok!\n", (rcode != 0) ? "not " : "");
727 } else if ((*ptr == 'p') || (*ptr == 'P')) {
728 rcode = pcs440ep_sha1 (2);
729 } else {
730 rcode = pcs440ep_sha1 (0);
731 }
4ef218f6 732 return rcode;
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733 }
734 return rcode;
735}
736
737U_BOOT_CMD(
53677ef1 738 sha1, 4, 1, do_sha1,
2fb2604d 739 "calculate the SHA1 Sum",
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740 "address len [addr] calculate the SHA1 sum [save at addr]\n"
741 " -p calculate the SHA1 sum from the U-Boot image in flash and print\n"
a89c33db 742 " -c check the U-Boot image in flash"
566a494f
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743);
744#endif
745
f98984cb
HS
746#if defined (CONFIG_CMD_IDE)
747/* These addresses need to be shifted one place to the left
748 * ( bus per_addr 20 -30 is connectsd on CF bus A10-A0)
749 * These values are shifted
750 */
751extern ulong *ide_bus_offset;
752void inline ide_outb(int dev, int port, unsigned char val)
753{
754 debug ("ide_outb (dev= %d, port= 0x%x, val= 0x%02x) : @ 0x%08lx\n",
755 dev, port, val, (ATA_CURR_BASE(dev)+port));
756
757 out_be16((u16 *)(ATA_CURR_BASE(dev)+(port << 1)), val);
758}
759unsigned char inline ide_inb(int dev, int port)
760{
761 uchar val;
762 val = in_be16((u16 *)(ATA_CURR_BASE(dev)+(port << 1)));
763 debug ("ide_inb (dev= %d, port= 0x%x) : @ 0x%08lx -> 0x%02x\n",
764 dev, port, (ATA_CURR_BASE(dev)+port), val);
765 return (val);
766}
767#endif
768
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769#ifdef CONFIG_IDE_PREINIT
770int ide_preinit (void)
771{
772 /* Set True IDE Mode */
773 out32 (GPIO0_OR, (in32 (GPIO0_OR) | 0x00100000));
774 out32 (GPIO0_OR, (in32 (GPIO0_OR) | 0x00200000));
775 out32 (GPIO1_OR, (in32 (GPIO1_OR) & ~0x00008040));
776 udelay (100000);
777 return 0;
778}
779#endif
780
afaac86f 781#if defined (CONFIG_CMD_IDE) && defined (CONFIG_IDE_RESET)
566a494f
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782void ide_set_reset (int idereset)
783{
784 debug ("ide_reset(%d)\n", idereset);
785 if (idereset == 0) {
786 out32 (GPIO0_OR, (in32 (GPIO0_OR) | 0x00200000));
787 } else {
788 out32 (GPIO0_OR, (in32 (GPIO0_OR) & ~0x00200000));
789 }
790 udelay (10000);
791}
afaac86f 792#endif /* defined (CONFIG_CMD_IDE) && defined (CONFIG_IDE_RESET) */