]> git.ipfire.org Git - people/ms/u-boot.git/blame - board/ppmc7xx/pci.c
rename CFG_ macros to CONFIG_SYS
[people/ms/u-boot.git] / board / ppmc7xx / pci.c
CommitLineData
f5e0d039
HS
1/*
2 * (C) Copyright 2002 ELTEC Elektronik AG
3 * Frank Gottschling <fgottschling@eltec.de>
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24/*
25 * PCI initialisation for the MPC10x.
26 */
27
28#include <common.h>
29#include <pci.h>
30#include <mpc106.h>
31
32#ifdef CONFIG_PCI
33
34struct pci_controller local_hose;
35
36void pci_init_board(void)
37{
38 struct pci_controller* hose = (struct pci_controller *)&local_hose;
39 u16 reg16;
40
41 hose->first_busno = 0;
42 hose->last_busno = 0xff;
43
44 pci_set_region(hose->regions + 0,
6d0f6bcf
JCPV
45 CONFIG_SYS_PCI_MEMORY_BUS,
46 CONFIG_SYS_PCI_MEMORY_PHYS,
47 CONFIG_SYS_PCI_MEMORY_SIZE,
f5e0d039
HS
48 PCI_REGION_MEM | PCI_REGION_MEMORY);
49
50 /* PCI memory space */
51 pci_set_region(hose->regions + 1,
6d0f6bcf
JCPV
52 CONFIG_SYS_PCI_MEM_BUS,
53 CONFIG_SYS_PCI_MEM_PHYS,
54 CONFIG_SYS_PCI_MEM_SIZE,
f5e0d039
HS
55 PCI_REGION_MEM);
56
57 /* ISA/PCI memory space */
58 pci_set_region(hose->regions + 2,
6d0f6bcf
JCPV
59 CONFIG_SYS_ISA_MEM_BUS,
60 CONFIG_SYS_ISA_MEM_PHYS,
61 CONFIG_SYS_ISA_MEM_SIZE,
f5e0d039
HS
62 PCI_REGION_MEM);
63
64 /* PCI I/O space */
65 pci_set_region(hose->regions + 3,
6d0f6bcf
JCPV
66 CONFIG_SYS_PCI_IO_BUS,
67 CONFIG_SYS_PCI_IO_PHYS,
68 CONFIG_SYS_PCI_IO_SIZE,
f5e0d039
HS
69 PCI_REGION_IO);
70
71 /* ISA/PCI I/O space */
72 pci_set_region(hose->regions + 4,
6d0f6bcf
JCPV
73 CONFIG_SYS_ISA_IO_BUS,
74 CONFIG_SYS_ISA_IO_PHYS,
75 CONFIG_SYS_ISA_IO_SIZE,
f5e0d039
HS
76 PCI_REGION_IO);
77
78 hose->region_count = 5;
79
80 pci_setup_indirect(hose,
81 MPC106_REG_ADDR,
82 MPC106_REG_DATA);
83
84 pci_register_hose(hose);
85
86 hose->last_busno = pci_hose_scan(hose);
87
88 /* Initialises the MPC10x PCI Configuration regs. */
89 pci_read_config_word (PCI_BDF(0,0,0), PCI_COMMAND, &reg16);
90 reg16 |= PCI_COMMAND_SERR | PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY;
91 pci_write_config_word(PCI_BDF(0,0,0), PCI_COMMAND, reg16);
92
93 /* Clear non-reserved bits in status register */
94 pci_write_config_word(PCI_BDF(0,0,0), PCI_STATUS, 0xffff);
95}
96
97#endif /* CONFIG_PCI */