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83d290c5 | 1 | // SPDX-License-Identifier: GPL-2.0 |
60c0467a VB |
2 | /* |
3 | * board/renesas/porter/qos.c | |
4 | * | |
5 | * Copyright (C) 2015 Renesas Electronics Corporation | |
6 | * Copyright (C) 2015 Cogent Embedded, Inc. | |
7 | * | |
60c0467a VB |
8 | */ |
9 | ||
60c0467a VB |
10 | #include <asm/processor.h> |
11 | #include <asm/mach-types.h> | |
12 | #include <asm/io.h> | |
65abdd19 | 13 | #include <asm/arch/renesas.h> |
60c0467a VB |
14 | |
15 | /* QoS version 0.240 for ES1 and version 0.334 for ES2 */ | |
436eadfe | 16 | #if defined(CONFIG_RENESAS_EXTRAM_BOOT) |
60c0467a VB |
17 | enum { |
18 | DBSC3_00, DBSC3_01, DBSC3_02, DBSC3_03, DBSC3_04, | |
19 | DBSC3_05, DBSC3_06, DBSC3_07, DBSC3_08, DBSC3_09, | |
20 | DBSC3_10, DBSC3_11, DBSC3_12, DBSC3_13, DBSC3_14, | |
21 | DBSC3_15, | |
22 | DBSC3_NR, | |
23 | }; | |
24 | ||
25 | static u32 dbsc3_0_r_qos_addr[DBSC3_NR] = { | |
26 | [DBSC3_00] = DBSC3_0_QOS_R0_BASE, | |
27 | [DBSC3_01] = DBSC3_0_QOS_R1_BASE, | |
28 | [DBSC3_02] = DBSC3_0_QOS_R2_BASE, | |
29 | [DBSC3_03] = DBSC3_0_QOS_R3_BASE, | |
30 | [DBSC3_04] = DBSC3_0_QOS_R4_BASE, | |
31 | [DBSC3_05] = DBSC3_0_QOS_R5_BASE, | |
32 | [DBSC3_06] = DBSC3_0_QOS_R6_BASE, | |
33 | [DBSC3_07] = DBSC3_0_QOS_R7_BASE, | |
34 | [DBSC3_08] = DBSC3_0_QOS_R8_BASE, | |
35 | [DBSC3_09] = DBSC3_0_QOS_R9_BASE, | |
36 | [DBSC3_10] = DBSC3_0_QOS_R10_BASE, | |
37 | [DBSC3_11] = DBSC3_0_QOS_R11_BASE, | |
38 | [DBSC3_12] = DBSC3_0_QOS_R12_BASE, | |
39 | [DBSC3_13] = DBSC3_0_QOS_R13_BASE, | |
40 | [DBSC3_14] = DBSC3_0_QOS_R14_BASE, | |
41 | [DBSC3_15] = DBSC3_0_QOS_R15_BASE, | |
42 | }; | |
43 | ||
44 | static u32 dbsc3_0_w_qos_addr[DBSC3_NR] = { | |
45 | [DBSC3_00] = DBSC3_0_QOS_W0_BASE, | |
46 | [DBSC3_01] = DBSC3_0_QOS_W1_BASE, | |
47 | [DBSC3_02] = DBSC3_0_QOS_W2_BASE, | |
48 | [DBSC3_03] = DBSC3_0_QOS_W3_BASE, | |
49 | [DBSC3_04] = DBSC3_0_QOS_W4_BASE, | |
50 | [DBSC3_05] = DBSC3_0_QOS_W5_BASE, | |
51 | [DBSC3_06] = DBSC3_0_QOS_W6_BASE, | |
52 | [DBSC3_07] = DBSC3_0_QOS_W7_BASE, | |
53 | [DBSC3_08] = DBSC3_0_QOS_W8_BASE, | |
54 | [DBSC3_09] = DBSC3_0_QOS_W9_BASE, | |
55 | [DBSC3_10] = DBSC3_0_QOS_W10_BASE, | |
56 | [DBSC3_11] = DBSC3_0_QOS_W11_BASE, | |
57 | [DBSC3_12] = DBSC3_0_QOS_W12_BASE, | |
58 | [DBSC3_13] = DBSC3_0_QOS_W13_BASE, | |
59 | [DBSC3_14] = DBSC3_0_QOS_W14_BASE, | |
60 | [DBSC3_15] = DBSC3_0_QOS_W15_BASE, | |
61 | }; | |
62 | ||
63 | static u32 dbsc3_1_r_qos_addr[DBSC3_NR] = { | |
64 | [DBSC3_00] = DBSC3_1_QOS_R0_BASE, | |
65 | [DBSC3_01] = DBSC3_1_QOS_R1_BASE, | |
66 | [DBSC3_02] = DBSC3_1_QOS_R2_BASE, | |
67 | [DBSC3_03] = DBSC3_1_QOS_R3_BASE, | |
68 | [DBSC3_04] = DBSC3_1_QOS_R4_BASE, | |
69 | [DBSC3_05] = DBSC3_1_QOS_R5_BASE, | |
70 | [DBSC3_06] = DBSC3_1_QOS_R6_BASE, | |
71 | [DBSC3_07] = DBSC3_1_QOS_R7_BASE, | |
72 | [DBSC3_08] = DBSC3_1_QOS_R8_BASE, | |
73 | [DBSC3_09] = DBSC3_1_QOS_R9_BASE, | |
74 | [DBSC3_10] = DBSC3_1_QOS_R10_BASE, | |
75 | [DBSC3_11] = DBSC3_1_QOS_R11_BASE, | |
76 | [DBSC3_12] = DBSC3_1_QOS_R12_BASE, | |
77 | [DBSC3_13] = DBSC3_1_QOS_R13_BASE, | |
78 | [DBSC3_14] = DBSC3_1_QOS_R14_BASE, | |
79 | [DBSC3_15] = DBSC3_1_QOS_R15_BASE, | |
80 | }; | |
81 | ||
82 | static u32 dbsc3_1_w_qos_addr[DBSC3_NR] = { | |
83 | [DBSC3_00] = DBSC3_1_QOS_W0_BASE, | |
84 | [DBSC3_01] = DBSC3_1_QOS_W1_BASE, | |
85 | [DBSC3_02] = DBSC3_1_QOS_W2_BASE, | |
86 | [DBSC3_03] = DBSC3_1_QOS_W3_BASE, | |
87 | [DBSC3_04] = DBSC3_1_QOS_W4_BASE, | |
88 | [DBSC3_05] = DBSC3_1_QOS_W5_BASE, | |
89 | [DBSC3_06] = DBSC3_1_QOS_W6_BASE, | |
90 | [DBSC3_07] = DBSC3_1_QOS_W7_BASE, | |
91 | [DBSC3_08] = DBSC3_1_QOS_W8_BASE, | |
92 | [DBSC3_09] = DBSC3_1_QOS_W9_BASE, | |
93 | [DBSC3_10] = DBSC3_1_QOS_W10_BASE, | |
94 | [DBSC3_11] = DBSC3_1_QOS_W11_BASE, | |
95 | [DBSC3_12] = DBSC3_1_QOS_W12_BASE, | |
96 | [DBSC3_13] = DBSC3_1_QOS_W13_BASE, | |
97 | [DBSC3_14] = DBSC3_1_QOS_W14_BASE, | |
98 | [DBSC3_15] = DBSC3_1_QOS_W15_BASE, | |
99 | }; | |
100 | ||
101 | void qos_init(void) | |
102 | { | |
103 | int i; | |
104 | struct rcar_s3c *s3c; | |
105 | struct rcar_s3c_qos *s3c_qos; | |
106 | struct rcar_dbsc3_qos *qos_addr; | |
107 | struct rcar_mxi *mxi; | |
108 | struct rcar_mxi_qos *mxi_qos; | |
109 | struct rcar_axi_qos *axi_qos; | |
110 | ||
111 | /* DBSC DBADJ2 */ | |
112 | writel(0x20042004, DBSC3_0_DBADJ2); | |
113 | writel(0x20042004, DBSC3_1_DBADJ2); | |
114 | ||
115 | /* S3C -QoS */ | |
116 | s3c = (struct rcar_s3c *)S3C_BASE; | |
117 | if (IS_R8A7791_ES2()) { | |
118 | /* Linear All mode */ | |
119 | /* writel(0x00000000, &s3c->s3cadsplcr); */ | |
120 | /* Linear Linear 0x7000 to 0x7800 mode */ | |
121 | writel(0x00BF1B0C, &s3c->s3cadsplcr); | |
122 | /* Split Linear 0x6800 t 0x7000 mode */ | |
123 | /* writel(0x00DF1B0C, &s3c->s3cadsplcr); */ | |
124 | /* Ssplit All mode */ | |
125 | /* writel(0x00FF1B0C, &s3c->s3cadsplcr); */ | |
126 | writel(0x1F0B0908, &s3c->s3crorr); | |
127 | writel(0x1F0C0A08, &s3c->s3cworr); | |
128 | } else { | |
129 | writel(0x00FF1B1D, &s3c->s3cadsplcr); | |
130 | writel(0x1F0D0C0C, &s3c->s3crorr); | |
131 | writel(0x1F0D0C0A, &s3c->s3cworr); | |
132 | } | |
133 | /* QoS Control Registers */ | |
134 | s3c_qos = (struct rcar_s3c_qos *)S3C_QOS_CCI0_BASE; | |
135 | writel(0x00890089, &s3c_qos->s3cqos0); | |
136 | writel(0x20960010, &s3c_qos->s3cqos1); | |
137 | writel(0x20302030, &s3c_qos->s3cqos2); | |
138 | writel(0x20AA2200, &s3c_qos->s3cqos3); | |
139 | writel(0x00002032, &s3c_qos->s3cqos4); | |
140 | writel(0x20960010, &s3c_qos->s3cqos5); | |
141 | writel(0x20302030, &s3c_qos->s3cqos6); | |
142 | writel(0x20AA2200, &s3c_qos->s3cqos7); | |
143 | writel(0x00002032, &s3c_qos->s3cqos8); | |
144 | ||
145 | s3c_qos = (struct rcar_s3c_qos *)S3C_QOS_CCI1_BASE; | |
146 | writel(0x00890089, &s3c_qos->s3cqos0); | |
147 | writel(0x20960010, &s3c_qos->s3cqos1); | |
148 | writel(0x20302030, &s3c_qos->s3cqos2); | |
149 | writel(0x20AA2200, &s3c_qos->s3cqos3); | |
150 | writel(0x00002032, &s3c_qos->s3cqos4); | |
151 | writel(0x20960010, &s3c_qos->s3cqos5); | |
152 | writel(0x20302030, &s3c_qos->s3cqos6); | |
153 | writel(0x20AA2200, &s3c_qos->s3cqos7); | |
154 | writel(0x00002032, &s3c_qos->s3cqos8); | |
155 | ||
156 | s3c_qos = (struct rcar_s3c_qos *)S3C_QOS_MXI_BASE; | |
157 | writel(0x00820082, &s3c_qos->s3cqos0); | |
158 | writel(0x20960020, &s3c_qos->s3cqos1); | |
159 | writel(0x20302030, &s3c_qos->s3cqos2); | |
160 | writel(0x20AA20DC, &s3c_qos->s3cqos3); | |
161 | writel(0x00002032, &s3c_qos->s3cqos4); | |
162 | writel(0x20960020, &s3c_qos->s3cqos5); | |
163 | writel(0x20302030, &s3c_qos->s3cqos6); | |
164 | writel(0x20AA20DC, &s3c_qos->s3cqos7); | |
165 | writel(0x00002032, &s3c_qos->s3cqos8); | |
166 | ||
167 | s3c_qos = (struct rcar_s3c_qos *)S3C_QOS_AXI_BASE; | |
168 | writel(0x00820082, &s3c_qos->s3cqos0); | |
169 | writel(0x20960020, &s3c_qos->s3cqos1); | |
170 | writel(0x20302030, &s3c_qos->s3cqos2); | |
171 | writel(0x20AA20FA, &s3c_qos->s3cqos3); | |
172 | writel(0x00002032, &s3c_qos->s3cqos4); | |
173 | writel(0x20960020, &s3c_qos->s3cqos5); | |
174 | writel(0x20302030, &s3c_qos->s3cqos6); | |
175 | writel(0x20AA20FA, &s3c_qos->s3cqos7); | |
176 | writel(0x00002032, &s3c_qos->s3cqos8); | |
177 | ||
178 | /* DBSC -QoS */ | |
179 | /* DBSC0 - Read */ | |
180 | for (i = DBSC3_00; i < DBSC3_NR; i++) { | |
181 | qos_addr = (struct rcar_dbsc3_qos *)dbsc3_0_r_qos_addr[i]; | |
182 | writel(0x00000002, &qos_addr->dblgcnt); | |
183 | writel(0x00002096, &qos_addr->dbtmval0); | |
184 | writel(0x00002064, &qos_addr->dbtmval1); | |
185 | writel(0x00002032, &qos_addr->dbtmval2); | |
186 | writel(0x00001FB0, &qos_addr->dbtmval3); | |
187 | writel(0x00000001, &qos_addr->dbrqctr); | |
188 | writel(0x00002078, &qos_addr->dbthres0); | |
189 | writel(0x0000204B, &qos_addr->dbthres1); | |
190 | writel(0x0000201E, &qos_addr->dbthres2); | |
191 | writel(0x00000001, &qos_addr->dblgqon); | |
192 | } | |
193 | ||
194 | /* DBSC0 - Write */ | |
195 | for (i = DBSC3_00; i < DBSC3_NR; i++) { | |
196 | qos_addr = (struct rcar_dbsc3_qos *)dbsc3_0_w_qos_addr[i]; | |
197 | writel(0x00000002, &qos_addr->dblgcnt); | |
198 | writel(0x00002096, &qos_addr->dbtmval0); | |
199 | writel(0x00002064, &qos_addr->dbtmval1); | |
200 | writel(0x00002050, &qos_addr->dbtmval2); | |
201 | writel(0x0000203A, &qos_addr->dbtmval3); | |
202 | writel(0x00000001, &qos_addr->dbrqctr); | |
203 | writel(0x00002078, &qos_addr->dbthres0); | |
204 | writel(0x0000204B, &qos_addr->dbthres1); | |
205 | writel(0x0000203C, &qos_addr->dbthres2); | |
206 | writel(0x00000001, &qos_addr->dblgqon); | |
207 | } | |
208 | ||
209 | /* DBSC1 - Read */ | |
210 | for (i = DBSC3_00; i < DBSC3_NR; i++) { | |
211 | qos_addr = (struct rcar_dbsc3_qos *)dbsc3_1_r_qos_addr[i]; | |
212 | writel(0x00000002, &qos_addr->dblgcnt); | |
213 | writel(0x00002096, &qos_addr->dbtmval0); | |
214 | writel(0x00002064, &qos_addr->dbtmval1); | |
215 | writel(0x00002032, &qos_addr->dbtmval2); | |
216 | writel(0x00001FB0, &qos_addr->dbtmval3); | |
217 | writel(0x00000001, &qos_addr->dbrqctr); | |
218 | writel(0x00002078, &qos_addr->dbthres0); | |
219 | writel(0x0000204B, &qos_addr->dbthres1); | |
220 | writel(0x0000201E, &qos_addr->dbthres2); | |
221 | writel(0x00000001, &qos_addr->dblgqon); | |
222 | } | |
223 | ||
224 | /* DBSC1 - Write */ | |
225 | for (i = DBSC3_00; i < DBSC3_NR; i++) { | |
226 | qos_addr = (struct rcar_dbsc3_qos *)dbsc3_1_w_qos_addr[i]; | |
227 | writel(0x00000002, &qos_addr->dblgcnt); | |
228 | writel(0x00002096, &qos_addr->dbtmval0); | |
229 | writel(0x00002064, &qos_addr->dbtmval1); | |
230 | writel(0x00002050, &qos_addr->dbtmval2); | |
231 | writel(0x0000203A, &qos_addr->dbtmval3); | |
232 | writel(0x00000001, &qos_addr->dbrqctr); | |
233 | writel(0x00002078, &qos_addr->dbthres0); | |
234 | writel(0x0000204B, &qos_addr->dbthres1); | |
235 | writel(0x0000203C, &qos_addr->dbthres2); | |
236 | writel(0x00000001, &qos_addr->dblgqon); | |
237 | } | |
238 | ||
239 | /* CCI-400 -QoS */ | |
240 | writel(0x20001000, CCI_400_MAXOT_1); | |
241 | writel(0x20001000, CCI_400_MAXOT_2); | |
242 | writel(0x0000000C, CCI_400_QOSCNTL_1); | |
243 | writel(0x0000000C, CCI_400_QOSCNTL_2); | |
244 | ||
245 | /* MXI -QoS */ | |
246 | /* Transaction Control (MXI) */ | |
247 | mxi = (struct rcar_mxi *)MXI_BASE; | |
248 | writel(0x00000013, &mxi->mxrtcr); | |
249 | writel(0x00000013, &mxi->mxwtcr); | |
250 | ||
251 | /* QoS Control (MXI) */ | |
252 | mxi_qos = (struct rcar_mxi_qos *)MXI_QOS_BASE; | |
253 | writel(0x0000000C, &mxi_qos->vspdu0); | |
254 | writel(0x0000000C, &mxi_qos->vspdu1); | |
255 | writel(0x0000000E, &mxi_qos->du0); | |
256 | writel(0x0000000D, &mxi_qos->du1); | |
257 | ||
258 | /* AXI -QoS */ | |
259 | /* Transaction Control (MXI) */ | |
260 | axi_qos = (struct rcar_axi_qos *)SYS_AXI_SYX64TO128_BASE; | |
261 | writel(0x00000002, &axi_qos->qosconf); | |
262 | writel(0x00002245, &axi_qos->qosctset0); | |
263 | writel(0x00002096, &axi_qos->qosctset1); | |
264 | writel(0x00002030, &axi_qos->qosctset2); | |
265 | writel(0x00002030, &axi_qos->qosctset3); | |
266 | writel(0x00000001, &axi_qos->qosreqctr); | |
267 | writel(0x00002064, &axi_qos->qosthres0); | |
268 | writel(0x00002004, &axi_qos->qosthres1); | |
269 | writel(0x00000000, &axi_qos->qosthres2); | |
270 | writel(0x00000001, &axi_qos->qosqon); | |
271 | ||
272 | axi_qos = (struct rcar_axi_qos *)SYS_AXI_AVB_BASE; | |
273 | writel(0x00000000, &axi_qos->qosconf); | |
274 | writel(0x000020A6, &axi_qos->qosctset0); | |
275 | writel(0x00000001, &axi_qos->qosreqctr); | |
276 | writel(0x00002064, &axi_qos->qosthres0); | |
277 | writel(0x00002004, &axi_qos->qosthres1); | |
278 | writel(0x00000000, &axi_qos->qosthres2); | |
279 | writel(0x00000001, &axi_qos->qosqon); | |
280 | ||
281 | axi_qos = (struct rcar_axi_qos *)SYS_AXI_G2D_BASE; | |
282 | writel(0x00000000, &axi_qos->qosconf); | |
283 | writel(0x000020A6, &axi_qos->qosctset0); | |
284 | writel(0x00000001, &axi_qos->qosreqctr); | |
285 | writel(0x00002064, &axi_qos->qosthres0); | |
286 | writel(0x00002004, &axi_qos->qosthres1); | |
287 | writel(0x00000000, &axi_qos->qosthres2); | |
288 | writel(0x00000001, &axi_qos->qosqon); | |
289 | ||
290 | axi_qos = (struct rcar_axi_qos *)SYS_AXI_IMP0_BASE; | |
291 | writel(0x00000000, &axi_qos->qosconf); | |
292 | writel(0x00002021, &axi_qos->qosctset0); | |
293 | writel(0x00000001, &axi_qos->qosreqctr); | |
294 | writel(0x00002064, &axi_qos->qosthres0); | |
295 | writel(0x00002004, &axi_qos->qosthres1); | |
296 | writel(0x00000000, &axi_qos->qosthres2); | |
297 | writel(0x00000001, &axi_qos->qosqon); | |
298 | ||
299 | axi_qos = (struct rcar_axi_qos *)SYS_AXI_IMP1_BASE; | |
300 | writel(0x00000000, &axi_qos->qosconf); | |
301 | writel(0x00002037, &axi_qos->qosctset0); | |
302 | writel(0x00000001, &axi_qos->qosreqctr); | |
303 | writel(0x00002064, &axi_qos->qosthres0); | |
304 | writel(0x00002004, &axi_qos->qosthres1); | |
305 | writel(0x00000000, &axi_qos->qosthres2); | |
306 | writel(0x00000001, &axi_qos->qosqon); | |
307 | ||
308 | axi_qos = (struct rcar_axi_qos *)SYS_AXI_IMUX0_BASE; | |
309 | writel(0x00000002, &axi_qos->qosconf); | |
310 | writel(0x00002245, &axi_qos->qosctset0); | |
311 | writel(0x00002096, &axi_qos->qosctset1); | |
312 | writel(0x00002030, &axi_qos->qosctset2); | |
313 | writel(0x00002030, &axi_qos->qosctset3); | |
314 | writel(0x00000001, &axi_qos->qosreqctr); | |
315 | writel(0x00002064, &axi_qos->qosthres0); | |
316 | writel(0x00002004, &axi_qos->qosthres1); | |
317 | writel(0x00000000, &axi_qos->qosthres2); | |
318 | writel(0x00000001, &axi_qos->qosqon); | |
319 | ||
320 | axi_qos = (struct rcar_axi_qos *)SYS_AXI_IMUX1_BASE; | |
321 | writel(0x00000002, &axi_qos->qosconf); | |
322 | writel(0x00002245, &axi_qos->qosctset0); | |
323 | writel(0x00002096, &axi_qos->qosctset1); | |
324 | writel(0x00002030, &axi_qos->qosctset2); | |
325 | writel(0x00002030, &axi_qos->qosctset3); | |
326 | writel(0x00000001, &axi_qos->qosreqctr); | |
327 | writel(0x00002064, &axi_qos->qosthres0); | |
328 | writel(0x00002004, &axi_qos->qosthres1); | |
329 | writel(0x00000000, &axi_qos->qosthres2); | |
330 | writel(0x00000001, &axi_qos->qosqon); | |
331 | ||
332 | axi_qos = (struct rcar_axi_qos *)SYS_AXI_IMUX2_BASE; | |
333 | writel(0x00000002, &axi_qos->qosconf); | |
334 | writel(0x00002245, &axi_qos->qosctset0); | |
335 | writel(0x00002096, &axi_qos->qosctset1); | |
336 | writel(0x00002030, &axi_qos->qosctset2); | |
337 | writel(0x00002030, &axi_qos->qosctset3); | |
338 | writel(0x00000001, &axi_qos->qosreqctr); | |
339 | writel(0x00002064, &axi_qos->qosthres0); | |
340 | writel(0x00002004, &axi_qos->qosthres1); | |
341 | writel(0x00000000, &axi_qos->qosthres2); | |
342 | writel(0x00000001, &axi_qos->qosqon); | |
343 | ||
344 | axi_qos = (struct rcar_axi_qos *)SYS_AXI_LBS_BASE; | |
345 | writel(0x00000000, &axi_qos->qosconf); | |
346 | writel(0x0000214C, &axi_qos->qosctset0); | |
347 | writel(0x00000001, &axi_qos->qosreqctr); | |
348 | writel(0x00002064, &axi_qos->qosthres0); | |
349 | writel(0x00002004, &axi_qos->qosthres1); | |
350 | writel(0x00000000, &axi_qos->qosthres2); | |
351 | writel(0x00000001, &axi_qos->qosqon); | |
352 | ||
353 | axi_qos = (struct rcar_axi_qos *)SYS_AXI_MMUDS_BASE; | |
354 | writel(0x00000001, &axi_qos->qosconf); | |
355 | writel(0x00002004, &axi_qos->qosctset0); | |
356 | writel(0x00002096, &axi_qos->qosctset1); | |
357 | writel(0x00002030, &axi_qos->qosctset2); | |
358 | writel(0x00002030, &axi_qos->qosctset3); | |
359 | writel(0x00000001, &axi_qos->qosreqctr); | |
360 | writel(0x00002064, &axi_qos->qosthres0); | |
361 | writel(0x00002004, &axi_qos->qosthres1); | |
362 | writel(0x00000000, &axi_qos->qosthres2); | |
363 | writel(0x00000001, &axi_qos->qosqon); | |
364 | ||
365 | axi_qos = (struct rcar_axi_qos *)SYS_AXI_MMUM_BASE; | |
366 | writel(0x00000001, &axi_qos->qosconf); | |
367 | writel(0x00002004, &axi_qos->qosctset0); | |
368 | writel(0x00002096, &axi_qos->qosctset1); | |
369 | writel(0x00002030, &axi_qos->qosctset2); | |
370 | writel(0x00002030, &axi_qos->qosctset3); | |
371 | writel(0x00000001, &axi_qos->qosreqctr); | |
372 | writel(0x00002064, &axi_qos->qosthres0); | |
373 | writel(0x00002004, &axi_qos->qosthres1); | |
374 | writel(0x00000000, &axi_qos->qosthres2); | |
375 | writel(0x00000001, &axi_qos->qosqon); | |
376 | ||
377 | axi_qos = (struct rcar_axi_qos *)SYS_AXI_MMUR_BASE; | |
378 | writel(0x00000001, &axi_qos->qosconf); | |
379 | writel(0x00002004, &axi_qos->qosctset0); | |
380 | writel(0x00002096, &axi_qos->qosctset1); | |
381 | writel(0x00002030, &axi_qos->qosctset2); | |
382 | writel(0x00002030, &axi_qos->qosctset3); | |
383 | writel(0x00000001, &axi_qos->qosreqctr); | |
384 | writel(0x00002064, &axi_qos->qosthres0); | |
385 | writel(0x00002004, &axi_qos->qosthres1); | |
386 | writel(0x00000000, &axi_qos->qosthres2); | |
387 | writel(0x00000001, &axi_qos->qosqon); | |
388 | ||
389 | axi_qos = (struct rcar_axi_qos *)SYS_AXI_MMUS0_BASE; | |
390 | writel(0x00000001, &axi_qos->qosconf); | |
391 | writel(0x00002004, &axi_qos->qosctset0); | |
392 | writel(0x00002096, &axi_qos->qosctset1); | |
393 | writel(0x00002030, &axi_qos->qosctset2); | |
394 | writel(0x00002030, &axi_qos->qosctset3); | |
395 | writel(0x00000001, &axi_qos->qosreqctr); | |
396 | writel(0x00002064, &axi_qos->qosthres0); | |
397 | writel(0x00002004, &axi_qos->qosthres1); | |
398 | writel(0x00000000, &axi_qos->qosthres2); | |
399 | writel(0x00000001, &axi_qos->qosqon); | |
400 | ||
401 | axi_qos = (struct rcar_axi_qos *)SYS_AXI_MMUS1_BASE; | |
402 | writel(0x00000001, &axi_qos->qosconf); | |
403 | writel(0x00002004, &axi_qos->qosctset0); | |
404 | writel(0x00002096, &axi_qos->qosctset1); | |
405 | writel(0x00002030, &axi_qos->qosctset2); | |
406 | writel(0x00002030, &axi_qos->qosctset3); | |
407 | writel(0x00000001, &axi_qos->qosreqctr); | |
408 | writel(0x00002064, &axi_qos->qosthres0); | |
409 | writel(0x00002004, &axi_qos->qosthres1); | |
410 | writel(0x00000000, &axi_qos->qosthres2); | |
411 | writel(0x00000001, &axi_qos->qosqon); | |
412 | ||
413 | axi_qos = (struct rcar_axi_qos *)SYS_AXI_MTSB0_BASE; | |
414 | writel(0x00000000, &axi_qos->qosconf); | |
415 | writel(0x00002021, &axi_qos->qosctset0); | |
416 | writel(0x00000001, &axi_qos->qosreqctr); | |
417 | writel(0x00002064, &axi_qos->qosthres0); | |
418 | writel(0x00002004, &axi_qos->qosthres1); | |
419 | writel(0x00000000, &axi_qos->qosthres2); | |
420 | writel(0x00000001, &axi_qos->qosqon); | |
421 | ||
422 | axi_qos = (struct rcar_axi_qos *)SYS_AXI_MTSB1_BASE; | |
423 | writel(0x00000000, &axi_qos->qosconf); | |
424 | writel(0x00002021, &axi_qos->qosctset0); | |
425 | writel(0x00000001, &axi_qos->qosreqctr); | |
426 | writel(0x00002064, &axi_qos->qosthres0); | |
427 | writel(0x00002004, &axi_qos->qosthres1); | |
428 | writel(0x00000000, &axi_qos->qosthres2); | |
429 | writel(0x00000001, &axi_qos->qosqon); | |
430 | ||
431 | axi_qos = (struct rcar_axi_qos *)SYS_AXI_PCI_BASE; | |
432 | writel(0x00000000, &axi_qos->qosconf); | |
433 | writel(0x0000214C, &axi_qos->qosctset0); | |
434 | writel(0x00000001, &axi_qos->qosreqctr); | |
435 | writel(0x00002064, &axi_qos->qosthres0); | |
436 | writel(0x00002004, &axi_qos->qosthres1); | |
437 | writel(0x00000000, &axi_qos->qosthres2); | |
438 | writel(0x00000001, &axi_qos->qosqon); | |
439 | ||
440 | axi_qos = (struct rcar_axi_qos *)SYS_AXI_RTX_BASE; | |
441 | writel(0x00000002, &axi_qos->qosconf); | |
442 | writel(0x00002245, &axi_qos->qosctset0); | |
443 | writel(0x00002096, &axi_qos->qosctset1); | |
444 | writel(0x00002030, &axi_qos->qosctset2); | |
445 | writel(0x00002030, &axi_qos->qosctset3); | |
446 | writel(0x00000001, &axi_qos->qosreqctr); | |
447 | writel(0x00002064, &axi_qos->qosthres0); | |
448 | writel(0x00002004, &axi_qos->qosthres1); | |
449 | writel(0x00000000, &axi_qos->qosthres2); | |
450 | writel(0x00000001, &axi_qos->qosqon); | |
451 | ||
452 | axi_qos = (struct rcar_axi_qos *)SYS_AXI_SDS0_BASE; | |
453 | writel(0x00000000, &axi_qos->qosconf); | |
454 | writel(0x000020A6, &axi_qos->qosctset0); | |
455 | writel(0x00000001, &axi_qos->qosreqctr); | |
456 | writel(0x00002064, &axi_qos->qosthres0); | |
457 | writel(0x00002004, &axi_qos->qosthres1); | |
458 | writel(0x00000000, &axi_qos->qosthres2); | |
459 | writel(0x00000001, &axi_qos->qosqon); | |
460 | ||
461 | axi_qos = (struct rcar_axi_qos *)SYS_AXI_SDS1_BASE; | |
462 | writel(0x00000000, &axi_qos->qosconf); | |
463 | writel(0x000020A6, &axi_qos->qosctset0); | |
464 | writel(0x00000001, &axi_qos->qosreqctr); | |
465 | writel(0x00002064, &axi_qos->qosthres0); | |
466 | writel(0x00002004, &axi_qos->qosthres1); | |
467 | writel(0x00000000, &axi_qos->qosthres2); | |
468 | writel(0x00000001, &axi_qos->qosqon); | |
469 | ||
470 | axi_qos = (struct rcar_axi_qos *)SYS_AXI_USB20_BASE; | |
471 | writel(0x00000000, &axi_qos->qosconf); | |
472 | writel(0x00002053, &axi_qos->qosctset0); | |
473 | writel(0x00000001, &axi_qos->qosreqctr); | |
474 | writel(0x00002064, &axi_qos->qosthres0); | |
475 | writel(0x00002004, &axi_qos->qosthres1); | |
476 | writel(0x00000000, &axi_qos->qosthres2); | |
477 | writel(0x00000001, &axi_qos->qosqon); | |
478 | ||
479 | axi_qos = (struct rcar_axi_qos *)SYS_AXI_USB21_BASE; | |
480 | writel(0x00000000, &axi_qos->qosconf); | |
481 | writel(0x00002053, &axi_qos->qosctset0); | |
482 | writel(0x00000001, &axi_qos->qosreqctr); | |
483 | writel(0x00002064, &axi_qos->qosthres0); | |
484 | writel(0x00002004, &axi_qos->qosthres1); | |
485 | writel(0x00000000, &axi_qos->qosthres2); | |
486 | writel(0x00000001, &axi_qos->qosqon); | |
487 | ||
488 | axi_qos = (struct rcar_axi_qos *)SYS_AXI_USB22_BASE; | |
489 | writel(0x00000000, &axi_qos->qosconf); | |
490 | writel(0x00002053, &axi_qos->qosctset0); | |
491 | writel(0x00000001, &axi_qos->qosreqctr); | |
492 | writel(0x00002064, &axi_qos->qosthres0); | |
493 | writel(0x00002004, &axi_qos->qosthres1); | |
494 | writel(0x00000000, &axi_qos->qosthres2); | |
495 | writel(0x00000001, &axi_qos->qosqon); | |
496 | ||
497 | axi_qos = (struct rcar_axi_qos *)SYS_AXI_USB30_BASE; | |
498 | writel(0x00000000, &axi_qos->qosconf); | |
499 | writel(0x0000214C, &axi_qos->qosctset0); | |
500 | writel(0x00000001, &axi_qos->qosreqctr); | |
501 | writel(0x00002064, &axi_qos->qosthres0); | |
502 | writel(0x00002004, &axi_qos->qosthres1); | |
503 | writel(0x00000000, &axi_qos->qosthres2); | |
504 | writel(0x00000001, &axi_qos->qosqon); | |
505 | ||
506 | axi_qos = (struct rcar_axi_qos *)SYS_AXI_AX2M_BASE; | |
507 | writel(0x00000002, &axi_qos->qosconf); | |
508 | writel(0x00002245, &axi_qos->qosctset0); | |
509 | writel(0x00000001, &axi_qos->qosreqctr); | |
510 | writel(0x00002064, &axi_qos->qosthres0); | |
511 | writel(0x00002004, &axi_qos->qosthres1); | |
512 | writel(0x00000000, &axi_qos->qosthres2); | |
513 | writel(0x00000001, &axi_qos->qosqon); | |
514 | ||
515 | axi_qos = (struct rcar_axi_qos *)SYS_AXI_CC50_BASE; | |
516 | writel(0x00000000, &axi_qos->qosconf); | |
517 | writel(0x00002029, &axi_qos->qosctset0); | |
518 | writel(0x00000001, &axi_qos->qosreqctr); | |
519 | writel(0x00002064, &axi_qos->qosthres0); | |
520 | writel(0x00002004, &axi_qos->qosthres1); | |
521 | writel(0x00000000, &axi_qos->qosthres2); | |
522 | writel(0x00000001, &axi_qos->qosqon); | |
523 | ||
524 | axi_qos = (struct rcar_axi_qos *)SYS_AXI_CCI_BASE; | |
525 | writel(0x00000002, &axi_qos->qosconf); | |
526 | writel(0x00002245, &axi_qos->qosctset0); | |
527 | writel(0x00000001, &axi_qos->qosreqctr); | |
528 | writel(0x00002064, &axi_qos->qosthres0); | |
529 | writel(0x00002004, &axi_qos->qosthres1); | |
530 | writel(0x00000000, &axi_qos->qosthres2); | |
531 | writel(0x00000001, &axi_qos->qosqon); | |
532 | ||
533 | axi_qos = (struct rcar_axi_qos *)SYS_AXI_CS_BASE; | |
534 | writel(0x00000000, &axi_qos->qosconf); | |
535 | writel(0x00002053, &axi_qos->qosctset0); | |
536 | writel(0x00000001, &axi_qos->qosreqctr); | |
537 | writel(0x00002064, &axi_qos->qosthres0); | |
538 | writel(0x00002004, &axi_qos->qosthres1); | |
539 | writel(0x00000000, &axi_qos->qosthres2); | |
540 | writel(0x00000001, &axi_qos->qosqon); | |
541 | ||
542 | axi_qos = (struct rcar_axi_qos *)SYS_AXI_DDM_BASE; | |
543 | writel(0x00000000, &axi_qos->qosconf); | |
544 | writel(0x000020A6, &axi_qos->qosctset0); | |
545 | writel(0x00000001, &axi_qos->qosreqctr); | |
546 | writel(0x00002064, &axi_qos->qosthres0); | |
547 | writel(0x00002004, &axi_qos->qosthres1); | |
548 | writel(0x00000000, &axi_qos->qosthres2); | |
549 | writel(0x00000001, &axi_qos->qosqon); | |
550 | ||
551 | axi_qos = (struct rcar_axi_qos *)SYS_AXI_ETH_BASE; | |
552 | writel(0x00000000, &axi_qos->qosconf); | |
553 | writel(0x00002053, &axi_qos->qosctset0); | |
554 | writel(0x00000001, &axi_qos->qosreqctr); | |
555 | writel(0x00002064, &axi_qos->qosthres0); | |
556 | writel(0x00002004, &axi_qos->qosthres1); | |
557 | writel(0x00000000, &axi_qos->qosthres2); | |
558 | writel(0x00000001, &axi_qos->qosqon); | |
559 | ||
560 | axi_qos = (struct rcar_axi_qos *)SYS_AXI_MPXM_BASE; | |
561 | writel(0x00000002, &axi_qos->qosconf); | |
562 | writel(0x00002245, &axi_qos->qosctset0); | |
563 | writel(0x00000001, &axi_qos->qosreqctr); | |
564 | writel(0x00002064, &axi_qos->qosthres0); | |
565 | writel(0x00002004, &axi_qos->qosthres1); | |
566 | writel(0x00000000, &axi_qos->qosthres2); | |
567 | writel(0x00000001, &axi_qos->qosqon); | |
568 | ||
569 | axi_qos = (struct rcar_axi_qos *)SYS_AXI_SAT0_BASE; | |
570 | writel(0x00000000, &axi_qos->qosconf); | |
571 | writel(0x00002053, &axi_qos->qosctset0); | |
572 | writel(0x00000001, &axi_qos->qosreqctr); | |
573 | writel(0x00002064, &axi_qos->qosthres0); | |
574 | writel(0x00002004, &axi_qos->qosthres1); | |
575 | writel(0x00000000, &axi_qos->qosthres2); | |
576 | writel(0x00000001, &axi_qos->qosqon); | |
577 | ||
578 | axi_qos = (struct rcar_axi_qos *)SYS_AXI_SAT1_BASE; | |
579 | writel(0x00000000, &axi_qos->qosconf); | |
580 | writel(0x00002053, &axi_qos->qosctset0); | |
581 | writel(0x00000001, &axi_qos->qosreqctr); | |
582 | writel(0x00002064, &axi_qos->qosthres0); | |
583 | writel(0x00002004, &axi_qos->qosthres1); | |
584 | writel(0x00000000, &axi_qos->qosthres2); | |
585 | writel(0x00000001, &axi_qos->qosqon); | |
586 | ||
587 | axi_qos = (struct rcar_axi_qos *)SYS_AXI_SDM0_BASE; | |
588 | writel(0x00000000, &axi_qos->qosconf); | |
589 | writel(0x0000214C, &axi_qos->qosctset0); | |
590 | writel(0x00000001, &axi_qos->qosreqctr); | |
591 | writel(0x00002064, &axi_qos->qosthres0); | |
592 | writel(0x00002004, &axi_qos->qosthres1); | |
593 | writel(0x00000000, &axi_qos->qosthres2); | |
594 | writel(0x00000001, &axi_qos->qosqon); | |
595 | ||
596 | axi_qos = (struct rcar_axi_qos *)SYS_AXI_SDM1_BASE; | |
597 | writel(0x00000000, &axi_qos->qosconf); | |
598 | writel(0x0000214C, &axi_qos->qosctset0); | |
599 | writel(0x00000001, &axi_qos->qosreqctr); | |
600 | writel(0x00002064, &axi_qos->qosthres0); | |
601 | writel(0x00002004, &axi_qos->qosthres1); | |
602 | writel(0x00000000, &axi_qos->qosthres2); | |
603 | writel(0x00000001, &axi_qos->qosqon); | |
604 | ||
605 | axi_qos = (struct rcar_axi_qos *)SYS_AXI_TRAB_BASE; | |
606 | writel(0x00000000, &axi_qos->qosconf); | |
607 | writel(0x000020A6, &axi_qos->qosctset0); | |
608 | writel(0x00000001, &axi_qos->qosreqctr); | |
609 | writel(0x00002064, &axi_qos->qosthres0); | |
610 | writel(0x00002004, &axi_qos->qosthres1); | |
611 | writel(0x00000000, &axi_qos->qosthres2); | |
612 | writel(0x00000001, &axi_qos->qosqon); | |
613 | ||
614 | axi_qos = (struct rcar_axi_qos *)SYS_AXI_UDM0_BASE; | |
615 | writel(0x00000000, &axi_qos->qosconf); | |
616 | writel(0x00002053, &axi_qos->qosctset0); | |
617 | writel(0x00000001, &axi_qos->qosreqctr); | |
618 | writel(0x00002064, &axi_qos->qosthres0); | |
619 | writel(0x00002004, &axi_qos->qosthres1); | |
620 | writel(0x00000000, &axi_qos->qosthres2); | |
621 | writel(0x00000001, &axi_qos->qosqon); | |
622 | ||
623 | axi_qos = (struct rcar_axi_qos *)SYS_AXI_UDM1_BASE; | |
624 | writel(0x00000000, &axi_qos->qosconf); | |
625 | writel(0x00002053, &axi_qos->qosctset0); | |
626 | writel(0x00000001, &axi_qos->qosreqctr); | |
627 | writel(0x00002064, &axi_qos->qosthres0); | |
628 | writel(0x00002004, &axi_qos->qosthres1); | |
629 | writel(0x00000000, &axi_qos->qosthres2); | |
630 | writel(0x00000001, &axi_qos->qosqon); | |
631 | ||
632 | /* QoS Register (RT-AXI) */ | |
633 | axi_qos = (struct rcar_axi_qos *)RT_AXI_SHX_BASE; | |
634 | writel(0x00000000, &axi_qos->qosconf); | |
635 | writel(0x00002053, &axi_qos->qosctset0); | |
636 | writel(0x00002096, &axi_qos->qosctset1); | |
637 | writel(0x00002030, &axi_qos->qosctset2); | |
638 | writel(0x00002030, &axi_qos->qosctset3); | |
639 | writel(0x00000001, &axi_qos->qosreqctr); | |
640 | writel(0x00002064, &axi_qos->qosthres0); | |
641 | writel(0x00002004, &axi_qos->qosthres1); | |
642 | writel(0x00000000, &axi_qos->qosthres2); | |
643 | writel(0x00000001, &axi_qos->qosqon); | |
644 | ||
645 | axi_qos = (struct rcar_axi_qos *)RT_AXI_DBG_BASE; | |
646 | writel(0x00000000, &axi_qos->qosconf); | |
647 | writel(0x00002053, &axi_qos->qosctset0); | |
648 | writel(0x00002096, &axi_qos->qosctset1); | |
649 | writel(0x00002030, &axi_qos->qosctset2); | |
650 | writel(0x00002030, &axi_qos->qosctset3); | |
651 | writel(0x00000001, &axi_qos->qosreqctr); | |
652 | writel(0x00002064, &axi_qos->qosthres0); | |
653 | writel(0x00002004, &axi_qos->qosthres1); | |
654 | writel(0x00000000, &axi_qos->qosthres2); | |
655 | writel(0x00000001, &axi_qos->qosqon); | |
656 | ||
657 | axi_qos = (struct rcar_axi_qos *)RT_AXI_RDM_BASE; | |
658 | writel(0x00000000, &axi_qos->qosconf); | |
659 | writel(0x00002299, &axi_qos->qosctset0); | |
660 | writel(0x00000001, &axi_qos->qosreqctr); | |
661 | writel(0x00002064, &axi_qos->qosthres0); | |
662 | writel(0x00002004, &axi_qos->qosthres1); | |
663 | writel(0x00000000, &axi_qos->qosthres2); | |
664 | writel(0x00000001, &axi_qos->qosqon); | |
665 | ||
666 | axi_qos = (struct rcar_axi_qos *)RT_AXI_RDS_BASE; | |
667 | writel(0x00000000, &axi_qos->qosconf); | |
668 | writel(0x00002029, &axi_qos->qosctset0); | |
669 | writel(0x00000001, &axi_qos->qosreqctr); | |
670 | writel(0x00002064, &axi_qos->qosthres0); | |
671 | writel(0x00002004, &axi_qos->qosthres1); | |
672 | writel(0x00000000, &axi_qos->qosthres2); | |
673 | writel(0x00000001, &axi_qos->qosqon); | |
674 | ||
675 | axi_qos = (struct rcar_axi_qos *)RT_AXI_RTX64TO128_BASE; | |
676 | writel(0x00000002, &axi_qos->qosconf); | |
677 | writel(0x00002245, &axi_qos->qosctset0); | |
678 | writel(0x00002096, &axi_qos->qosctset1); | |
679 | writel(0x00002030, &axi_qos->qosctset2); | |
680 | writel(0x00002030, &axi_qos->qosctset3); | |
681 | writel(0x00000001, &axi_qos->qosreqctr); | |
682 | writel(0x00002064, &axi_qos->qosthres0); | |
683 | writel(0x00002004, &axi_qos->qosthres1); | |
684 | writel(0x00000000, &axi_qos->qosthres2); | |
685 | writel(0x00000001, &axi_qos->qosqon); | |
686 | ||
687 | axi_qos = (struct rcar_axi_qos *)RT_AXI_STPRO_BASE; | |
688 | writel(0x00000000, &axi_qos->qosconf); | |
689 | writel(0x00002029, &axi_qos->qosctset0); | |
690 | writel(0x00002096, &axi_qos->qosctset1); | |
691 | writel(0x00002030, &axi_qos->qosctset2); | |
692 | writel(0x00002030, &axi_qos->qosctset3); | |
693 | writel(0x00000001, &axi_qos->qosreqctr); | |
694 | writel(0x00002064, &axi_qos->qosthres0); | |
695 | writel(0x00002004, &axi_qos->qosthres1); | |
696 | writel(0x00000000, &axi_qos->qosthres2); | |
697 | writel(0x00000001, &axi_qos->qosqon); | |
698 | ||
699 | axi_qos = (struct rcar_axi_qos *)RT_AXI_SY2RT_BASE; | |
700 | writel(0x00000002, &axi_qos->qosconf); | |
701 | writel(0x00002245, &axi_qos->qosctset0); | |
702 | writel(0x00000001, &axi_qos->qosreqctr); | |
703 | writel(0x00002064, &axi_qos->qosthres0); | |
704 | writel(0x00002004, &axi_qos->qosthres1); | |
705 | writel(0x00000000, &axi_qos->qosthres2); | |
706 | writel(0x00000001, &axi_qos->qosqon); | |
707 | ||
708 | /* QoS Register (MP-AXI) */ | |
709 | axi_qos = (struct rcar_axi_qos *)MP_AXI_ADSP_BASE; | |
710 | writel(0x00000000, &axi_qos->qosconf); | |
711 | writel(0x00002037, &axi_qos->qosctset0); | |
712 | writel(0x00000001, &axi_qos->qosreqctr); | |
713 | writel(0x00002064, &axi_qos->qosthres0); | |
714 | writel(0x00002004, &axi_qos->qosthres1); | |
715 | writel(0x00000000, &axi_qos->qosthres2); | |
716 | writel(0x00000001, &axi_qos->qosqon); | |
717 | ||
718 | axi_qos = (struct rcar_axi_qos *)MP_AXI_ASDS0_BASE; | |
719 | writel(0x00000001, &axi_qos->qosconf); | |
720 | writel(0x00002014, &axi_qos->qosctset0); | |
721 | writel(0x00000040, &axi_qos->qosreqctr); | |
722 | writel(0x00002064, &axi_qos->qosthres0); | |
723 | writel(0x00002004, &axi_qos->qosthres1); | |
724 | writel(0x00000000, &axi_qos->qosthres2); | |
725 | writel(0x00000001, &axi_qos->qosqon); | |
726 | ||
727 | axi_qos = (struct rcar_axi_qos *)MP_AXI_ASDS1_BASE; | |
728 | writel(0x00000001, &axi_qos->qosconf); | |
729 | writel(0x00002014, &axi_qos->qosctset0); | |
730 | writel(0x00000040, &axi_qos->qosreqctr); | |
731 | writel(0x00002064, &axi_qos->qosthres0); | |
732 | writel(0x00002004, &axi_qos->qosthres1); | |
733 | writel(0x00000000, &axi_qos->qosthres2); | |
734 | writel(0x00000001, &axi_qos->qosqon); | |
735 | ||
736 | axi_qos = (struct rcar_axi_qos *)MP_AXI_MLP_BASE; | |
737 | writel(0x00000001, &axi_qos->qosconf); | |
738 | writel(0x00001FF0, &axi_qos->qosctset0); | |
739 | writel(0x00000020, &axi_qos->qosreqctr); | |
740 | writel(0x00002064, &axi_qos->qosthres0); | |
741 | writel(0x00002004, &axi_qos->qosthres1); | |
742 | writel(0x00002001, &axi_qos->qosthres2); | |
743 | writel(0x00000001, &axi_qos->qosqon); | |
744 | ||
745 | axi_qos = (struct rcar_axi_qos *)MP_AXI_MMUMP_BASE; | |
746 | writel(0x00000001, &axi_qos->qosconf); | |
747 | writel(0x00002004, &axi_qos->qosctset0); | |
748 | writel(0x00002096, &axi_qos->qosctset1); | |
749 | writel(0x00002030, &axi_qos->qosctset2); | |
750 | writel(0x00002030, &axi_qos->qosctset3); | |
751 | writel(0x00000001, &axi_qos->qosreqctr); | |
752 | writel(0x00002064, &axi_qos->qosthres0); | |
753 | writel(0x00002004, &axi_qos->qosthres1); | |
754 | writel(0x00000000, &axi_qos->qosthres2); | |
755 | writel(0x00000001, &axi_qos->qosqon); | |
756 | ||
757 | axi_qos = (struct rcar_axi_qos *)MP_AXI_SPU_BASE; | |
758 | writel(0x00000000, &axi_qos->qosconf); | |
759 | writel(0x00002053, &axi_qos->qosctset0); | |
760 | writel(0x00000001, &axi_qos->qosreqctr); | |
761 | writel(0x00002064, &axi_qos->qosthres0); | |
762 | writel(0x00002004, &axi_qos->qosthres1); | |
763 | writel(0x00000000, &axi_qos->qosthres2); | |
764 | writel(0x00000001, &axi_qos->qosqon); | |
765 | ||
766 | axi_qos = (struct rcar_axi_qos *)MP_AXI_SPUC_BASE; | |
767 | writel(0x00000000, &axi_qos->qosconf); | |
768 | writel(0x0000206E, &axi_qos->qosctset0); | |
769 | writel(0x00000001, &axi_qos->qosreqctr); | |
770 | writel(0x00002064, &axi_qos->qosthres0); | |
771 | writel(0x00002004, &axi_qos->qosthres1); | |
772 | writel(0x00000000, &axi_qos->qosthres2); | |
773 | writel(0x00000001, &axi_qos->qosqon); | |
774 | ||
775 | /* QoS Register (SYS-AXI256) */ | |
776 | axi_qos = (struct rcar_axi_qos *)SYS_AXI256_AXI128TO256_BASE; | |
777 | writel(0x00000002, &axi_qos->qosconf); | |
778 | if (IS_R8A7791_ES2()) | |
779 | writel(0x000020EB, &axi_qos->qosctset0); | |
780 | else | |
781 | writel(0x00002245, &axi_qos->qosctset0); | |
782 | writel(0x00002096, &axi_qos->qosctset1); | |
783 | writel(0x00002030, &axi_qos->qosctset2); | |
784 | writel(0x00002030, &axi_qos->qosctset3); | |
785 | writel(0x00000001, &axi_qos->qosreqctr); | |
786 | writel(0x00002064, &axi_qos->qosthres0); | |
787 | writel(0x00002004, &axi_qos->qosthres1); | |
788 | writel(0x00000000, &axi_qos->qosthres2); | |
789 | writel(0x00000001, &axi_qos->qosqon); | |
790 | ||
791 | axi_qos = (struct rcar_axi_qos *)SYS_AXI256_SYX_BASE; | |
792 | writel(0x00000002, &axi_qos->qosconf); | |
793 | if (IS_R8A7791_ES2()) | |
794 | writel(0x000020EB, &axi_qos->qosctset0); | |
795 | else | |
796 | writel(0x00002245, &axi_qos->qosctset0); | |
797 | writel(0x00002096, &axi_qos->qosctset1); | |
798 | writel(0x00002030, &axi_qos->qosctset2); | |
799 | writel(0x00002030, &axi_qos->qosctset3); | |
800 | writel(0x00000001, &axi_qos->qosreqctr); | |
801 | writel(0x00002064, &axi_qos->qosthres0); | |
802 | writel(0x00002004, &axi_qos->qosthres1); | |
803 | writel(0x00000000, &axi_qos->qosthres2); | |
804 | writel(0x00000001, &axi_qos->qosqon); | |
805 | ||
806 | axi_qos = (struct rcar_axi_qos *)SYS_AXI256_MPX_BASE; | |
807 | writel(0x00000002, &axi_qos->qosconf); | |
808 | if (IS_R8A7791_ES2()) | |
809 | writel(0x000020EB, &axi_qos->qosctset0); | |
810 | else | |
811 | writel(0x00002245, &axi_qos->qosctset0); | |
812 | writel(0x00002096, &axi_qos->qosctset1); | |
813 | writel(0x00002030, &axi_qos->qosctset2); | |
814 | writel(0x00002030, &axi_qos->qosctset3); | |
815 | writel(0x00000001, &axi_qos->qosreqctr); | |
816 | writel(0x00002064, &axi_qos->qosthres0); | |
817 | writel(0x00002004, &axi_qos->qosthres1); | |
818 | writel(0x00000000, &axi_qos->qosthres2); | |
819 | writel(0x00000001, &axi_qos->qosqon); | |
820 | ||
821 | axi_qos = (struct rcar_axi_qos *)SYS_AXI256_MXI_BASE; | |
822 | writel(0x00000002, &axi_qos->qosconf); | |
823 | writel(0x00002245, &axi_qos->qosctset0); | |
824 | writel(0x00002096, &axi_qos->qosctset1); | |
825 | writel(0x00002030, &axi_qos->qosctset2); | |
826 | writel(0x00002030, &axi_qos->qosctset3); | |
827 | writel(0x00000001, &axi_qos->qosreqctr); | |
828 | writel(0x00002064, &axi_qos->qosthres0); | |
829 | writel(0x00002004, &axi_qos->qosthres1); | |
830 | writel(0x00000000, &axi_qos->qosthres2); | |
831 | writel(0x00000001, &axi_qos->qosqon); | |
832 | ||
833 | /* QoS Register (CCI-AXI) */ | |
834 | axi_qos = (struct rcar_axi_qos *)CCI_AXI_MMUS0_BASE; | |
835 | writel(0x00000001, &axi_qos->qosconf); | |
836 | writel(0x00002004, &axi_qos->qosctset0); | |
837 | writel(0x00002096, &axi_qos->qosctset1); | |
838 | writel(0x00002030, &axi_qos->qosctset2); | |
839 | writel(0x00002030, &axi_qos->qosctset3); | |
840 | writel(0x00000001, &axi_qos->qosreqctr); | |
841 | writel(0x00002064, &axi_qos->qosthres0); | |
842 | writel(0x00002004, &axi_qos->qosthres1); | |
843 | writel(0x00000000, &axi_qos->qosthres2); | |
844 | writel(0x00000001, &axi_qos->qosqon); | |
845 | ||
846 | axi_qos = (struct rcar_axi_qos *)CCI_AXI_SYX2_BASE; | |
847 | writel(0x00000002, &axi_qos->qosconf); | |
848 | writel(0x00002245, &axi_qos->qosctset0); | |
849 | writel(0x00002096, &axi_qos->qosctset1); | |
850 | writel(0x00002030, &axi_qos->qosctset2); | |
851 | writel(0x00002030, &axi_qos->qosctset3); | |
852 | writel(0x00000001, &axi_qos->qosreqctr); | |
853 | writel(0x00002064, &axi_qos->qosthres0); | |
854 | writel(0x00002004, &axi_qos->qosthres1); | |
855 | writel(0x00000000, &axi_qos->qosthres2); | |
856 | writel(0x00000001, &axi_qos->qosqon); | |
857 | ||
858 | axi_qos = (struct rcar_axi_qos *)CCI_AXI_MMUR_BASE; | |
859 | writel(0x00000001, &axi_qos->qosconf); | |
860 | writel(0x00002004, &axi_qos->qosctset0); | |
861 | writel(0x00002096, &axi_qos->qosctset1); | |
862 | writel(0x00002030, &axi_qos->qosctset2); | |
863 | writel(0x00002030, &axi_qos->qosctset3); | |
864 | writel(0x00000001, &axi_qos->qosreqctr); | |
865 | writel(0x00002064, &axi_qos->qosthres0); | |
866 | writel(0x00002004, &axi_qos->qosthres1); | |
867 | writel(0x00000000, &axi_qos->qosthres2); | |
868 | writel(0x00000001, &axi_qos->qosqon); | |
869 | ||
870 | axi_qos = (struct rcar_axi_qos *)CCI_AXI_MMUDS_BASE; | |
871 | writel(0x00000001, &axi_qos->qosconf); | |
872 | writel(0x00002004, &axi_qos->qosctset0); | |
873 | writel(0x00002096, &axi_qos->qosctset1); | |
874 | writel(0x00002030, &axi_qos->qosctset2); | |
875 | writel(0x00002030, &axi_qos->qosctset3); | |
876 | writel(0x00000001, &axi_qos->qosreqctr); | |
877 | writel(0x00002064, &axi_qos->qosthres0); | |
878 | writel(0x00002004, &axi_qos->qosthres1); | |
879 | writel(0x00000000, &axi_qos->qosthres2); | |
880 | writel(0x00000001, &axi_qos->qosqon); | |
881 | ||
882 | axi_qos = (struct rcar_axi_qos *)CCI_AXI_MMUM_BASE; | |
883 | writel(0x00000001, &axi_qos->qosconf); | |
884 | writel(0x00002004, &axi_qos->qosctset0); | |
885 | writel(0x00002096, &axi_qos->qosctset1); | |
886 | writel(0x00002030, &axi_qos->qosctset2); | |
887 | writel(0x00002030, &axi_qos->qosctset3); | |
888 | writel(0x00000001, &axi_qos->qosreqctr); | |
889 | writel(0x00002064, &axi_qos->qosthres0); | |
890 | writel(0x00002004, &axi_qos->qosthres1); | |
891 | writel(0x00000000, &axi_qos->qosthres2); | |
892 | writel(0x00000001, &axi_qos->qosqon); | |
893 | ||
894 | axi_qos = (struct rcar_axi_qos *)CCI_AXI_MXI_BASE; | |
895 | writel(0x00000002, &axi_qos->qosconf); | |
896 | writel(0x00002245, &axi_qos->qosctset0); | |
897 | writel(0x00002096, &axi_qos->qosctset1); | |
898 | writel(0x00002030, &axi_qos->qosctset2); | |
899 | writel(0x00002030, &axi_qos->qosctset3); | |
900 | writel(0x00000001, &axi_qos->qosreqctr); | |
901 | writel(0x00002064, &axi_qos->qosthres0); | |
902 | writel(0x00002004, &axi_qos->qosthres1); | |
903 | writel(0x00000000, &axi_qos->qosthres2); | |
904 | writel(0x00000001, &axi_qos->qosqon); | |
905 | ||
906 | axi_qos = (struct rcar_axi_qos *)CCI_AXI_MMUS1_BASE; | |
907 | writel(0x00000001, &axi_qos->qosconf); | |
908 | writel(0x00002004, &axi_qos->qosctset0); | |
909 | writel(0x00002096, &axi_qos->qosctset1); | |
910 | writel(0x00002030, &axi_qos->qosctset2); | |
911 | writel(0x00002030, &axi_qos->qosctset3); | |
912 | writel(0x00000001, &axi_qos->qosreqctr); | |
913 | writel(0x00002064, &axi_qos->qosthres0); | |
914 | writel(0x00002004, &axi_qos->qosthres1); | |
915 | writel(0x00000000, &axi_qos->qosthres2); | |
916 | writel(0x00000001, &axi_qos->qosqon); | |
917 | ||
918 | axi_qos = (struct rcar_axi_qos *)CCI_AXI_MMUMP_BASE; | |
919 | writel(0x00000001, &axi_qos->qosconf); | |
920 | writel(0x00002004, &axi_qos->qosctset0); | |
921 | writel(0x00002096, &axi_qos->qosctset1); | |
922 | writel(0x00002030, &axi_qos->qosctset2); | |
923 | writel(0x00002030, &axi_qos->qosctset3); | |
924 | writel(0x00000001, &axi_qos->qosreqctr); | |
925 | writel(0x00002064, &axi_qos->qosthres0); | |
926 | writel(0x00002004, &axi_qos->qosthres1); | |
927 | writel(0x00000000, &axi_qos->qosthres2); | |
928 | writel(0x00000001, &axi_qos->qosqon); | |
929 | ||
930 | /* QoS Register (Media-AXI) */ | |
931 | axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_MXR_BASE; | |
932 | writel(0x00000002, &axi_qos->qosconf); | |
933 | writel(0x000020DC, &axi_qos->qosctset0); | |
934 | writel(0x00002096, &axi_qos->qosctset1); | |
935 | writel(0x00002030, &axi_qos->qosctset2); | |
936 | writel(0x00002030, &axi_qos->qosctset3); | |
937 | writel(0x00000020, &axi_qos->qosreqctr); | |
938 | writel(0x000020AA, &axi_qos->qosthres0); | |
939 | writel(0x00002032, &axi_qos->qosthres1); | |
940 | writel(0x00000001, &axi_qos->qosthres2); | |
941 | ||
942 | axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_MXW_BASE; | |
943 | writel(0x00000002, &axi_qos->qosconf); | |
944 | writel(0x000020DC, &axi_qos->qosctset0); | |
945 | writel(0x00002096, &axi_qos->qosctset1); | |
946 | writel(0x00002030, &axi_qos->qosctset2); | |
947 | writel(0x00002030, &axi_qos->qosctset3); | |
948 | writel(0x00000020, &axi_qos->qosreqctr); | |
949 | writel(0x000020AA, &axi_qos->qosthres0); | |
950 | writel(0x00002032, &axi_qos->qosthres1); | |
951 | writel(0x00000001, &axi_qos->qosthres2); | |
952 | ||
953 | axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_JPR_BASE; | |
954 | writel(0x00000001, &axi_qos->qosconf); | |
955 | writel(0x00002190, &axi_qos->qosctset0); | |
956 | writel(0x00000020, &axi_qos->qosreqctr); | |
957 | writel(0x00002064, &axi_qos->qosthres0); | |
958 | writel(0x00002004, &axi_qos->qosthres1); | |
959 | writel(0x00000001, &axi_qos->qosthres2); | |
960 | writel(0x00000001, &axi_qos->qosqon); | |
961 | ||
962 | axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_JPW_BASE; | |
963 | writel(0x00000001, &axi_qos->qosconf); | |
964 | writel(0x00002190, &axi_qos->qosctset0); | |
965 | writel(0x00000020, &axi_qos->qosreqctr); | |
966 | if (IS_R8A7791_ES2()) { | |
967 | writel(0x00000001, &axi_qos->qosthres0); | |
968 | writel(0x00000001, &axi_qos->qosthres1); | |
969 | } else { | |
970 | writel(0x00002064, &axi_qos->qosthres0); | |
971 | writel(0x00002004, &axi_qos->qosthres1); | |
972 | } | |
973 | writel(0x00000001, &axi_qos->qosthres2); | |
974 | writel(0x00000001, &axi_qos->qosqon); | |
975 | ||
976 | axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_TDMR_BASE; | |
977 | writel(0x00000001, &axi_qos->qosconf); | |
978 | writel(0x00002190, &axi_qos->qosctset0); | |
979 | writel(0x00000020, &axi_qos->qosreqctr); | |
980 | writel(0x00002064, &axi_qos->qosthres0); | |
981 | writel(0x00002004, &axi_qos->qosthres1); | |
982 | writel(0x00000001, &axi_qos->qosthres2); | |
983 | writel(0x00000001, &axi_qos->qosqon); | |
984 | ||
985 | axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_TDMW_BASE; | |
986 | writel(0x00000001, &axi_qos->qosconf); | |
987 | writel(0x00002190, &axi_qos->qosctset0); | |
988 | writel(0x00000020, &axi_qos->qosreqctr); | |
989 | writel(0x00002064, &axi_qos->qosthres0); | |
990 | writel(0x00002004, &axi_qos->qosthres1); | |
991 | writel(0x00000001, &axi_qos->qosthres2); | |
992 | writel(0x00000001, &axi_qos->qosqon); | |
993 | ||
994 | axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSP1CR_BASE; | |
995 | writel(0x00000001, &axi_qos->qosconf); | |
996 | writel(0x00002190, &axi_qos->qosctset0); | |
997 | writel(0x00000020, &axi_qos->qosreqctr); | |
998 | writel(0x00002064, &axi_qos->qosthres0); | |
999 | writel(0x00002004, &axi_qos->qosthres1); | |
1000 | writel(0x00000001, &axi_qos->qosthres2); | |
1001 | writel(0x00000001, &axi_qos->qosqon); | |
1002 | ||
1003 | axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSP1CW_BASE; | |
1004 | writel(0x00000001, &axi_qos->qosconf); | |
1005 | writel(0x00002190, &axi_qos->qosctset0); | |
1006 | writel(0x00000020, &axi_qos->qosreqctr); | |
1007 | if (IS_R8A7791_ES2()) { | |
1008 | writel(0x00000001, &axi_qos->qosthres0); | |
1009 | writel(0x00000001, &axi_qos->qosthres1); | |
1010 | } else { | |
1011 | writel(0x00002064, &axi_qos->qosthres0); | |
1012 | writel(0x00002004, &axi_qos->qosthres1); | |
1013 | } | |
1014 | writel(0x00000001, &axi_qos->qosthres2); | |
1015 | writel(0x00000001, &axi_qos->qosqon); | |
1016 | ||
1017 | axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSPDU0CR_BASE; | |
1018 | writel(0x00000001, &axi_qos->qosconf); | |
1019 | writel(0x00002190, &axi_qos->qosctset0); | |
1020 | writel(0x00000020, &axi_qos->qosreqctr); | |
1021 | writel(0x00002064, &axi_qos->qosthres0); | |
1022 | writel(0x00002004, &axi_qos->qosthres1); | |
1023 | writel(0x00000001, &axi_qos->qosthres2); | |
1024 | writel(0x00000001, &axi_qos->qosqon); | |
1025 | ||
1026 | axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSPDU0CW_BASE; | |
1027 | writel(0x00000001, &axi_qos->qosconf); | |
1028 | writel(0x00002190, &axi_qos->qosctset0); | |
1029 | writel(0x00000020, &axi_qos->qosreqctr); | |
1030 | if (IS_R8A7791_ES2()) { | |
1031 | writel(0x00000001, &axi_qos->qosthres0); | |
1032 | writel(0x00000001, &axi_qos->qosthres1); | |
1033 | } else { | |
1034 | writel(0x00002064, &axi_qos->qosthres0); | |
1035 | writel(0x00002004, &axi_qos->qosthres1); | |
1036 | } | |
1037 | writel(0x00000001, &axi_qos->qosthres2); | |
1038 | writel(0x00000001, &axi_qos->qosqon); | |
1039 | ||
1040 | axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSPDU1CR_BASE; | |
1041 | writel(0x00000001, &axi_qos->qosconf); | |
1042 | writel(0x00002190, &axi_qos->qosctset0); | |
1043 | writel(0x00000020, &axi_qos->qosreqctr); | |
1044 | writel(0x00002064, &axi_qos->qosthres0); | |
1045 | writel(0x00002004, &axi_qos->qosthres1); | |
1046 | writel(0x00000001, &axi_qos->qosthres2); | |
1047 | writel(0x00000001, &axi_qos->qosqon); | |
1048 | ||
1049 | axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSPDU1CW_BASE; | |
1050 | writel(0x00000001, &axi_qos->qosconf); | |
1051 | writel(0x00002190, &axi_qos->qosctset0); | |
1052 | writel(0x00000020, &axi_qos->qosreqctr); | |
1053 | if (IS_R8A7791_ES2()) { | |
1054 | writel(0x00000001, &axi_qos->qosthres0); | |
1055 | writel(0x00000001, &axi_qos->qosthres1); | |
1056 | } else { | |
1057 | writel(0x00002064, &axi_qos->qosthres0); | |
1058 | writel(0x00002004, &axi_qos->qosthres1); | |
1059 | } | |
1060 | writel(0x00000001, &axi_qos->qosthres2); | |
1061 | writel(0x00000001, &axi_qos->qosqon); | |
1062 | ||
1063 | axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VIN0W_BASE; | |
1064 | writel(0x00000001, &axi_qos->qosconf); | |
1065 | if (IS_R8A7791_ES2()) | |
1066 | writel(0x00001FF0, &axi_qos->qosctset0); | |
1067 | else | |
1068 | writel(0x000020C8, &axi_qos->qosctset0); | |
1069 | writel(0x00000020, &axi_qos->qosreqctr); | |
1070 | writel(0x00002064, &axi_qos->qosthres0); | |
1071 | writel(0x00002004, &axi_qos->qosthres1); | |
1072 | if (IS_R8A7791_ES2()) | |
1073 | writel(0x00002001, &axi_qos->qosthres2); | |
1074 | else | |
1075 | writel(0x00000001, &axi_qos->qosthres2); | |
1076 | writel(0x00000001, &axi_qos->qosqon); | |
1077 | ||
1078 | axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_FDP0R_BASE; | |
1079 | writel(0x00000001, &axi_qos->qosconf); | |
1080 | writel(0x000020C8, &axi_qos->qosctset0); | |
1081 | writel(0x00000020, &axi_qos->qosreqctr); | |
1082 | writel(0x00002064, &axi_qos->qosthres0); | |
1083 | writel(0x00002004, &axi_qos->qosthres1); | |
1084 | writel(0x00000001, &axi_qos->qosthres2); | |
1085 | writel(0x00000001, &axi_qos->qosqon); | |
1086 | ||
1087 | axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_FDP0W_BASE; | |
1088 | writel(0x00000001, &axi_qos->qosconf); | |
1089 | writel(0x000020C8, &axi_qos->qosctset0); | |
1090 | writel(0x00000020, &axi_qos->qosreqctr); | |
1091 | if (IS_R8A7791_ES2()) { | |
1092 | writel(0x00000001, &axi_qos->qosthres0); | |
1093 | writel(0x00000001, &axi_qos->qosthres1); | |
1094 | } else { | |
1095 | writel(0x00002064, &axi_qos->qosthres0); | |
1096 | writel(0x00002004, &axi_qos->qosthres1); | |
1097 | } | |
1098 | writel(0x00000001, &axi_qos->qosthres2); | |
1099 | writel(0x00000001, &axi_qos->qosqon); | |
1100 | ||
1101 | axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_IMSR_BASE; | |
1102 | writel(0x00000001, &axi_qos->qosconf); | |
1103 | writel(0x000020C8, &axi_qos->qosctset0); | |
1104 | writel(0x00000020, &axi_qos->qosreqctr); | |
1105 | writel(0x00002064, &axi_qos->qosthres0); | |
1106 | writel(0x00002004, &axi_qos->qosthres1); | |
1107 | writel(0x00000001, &axi_qos->qosthres2); | |
1108 | writel(0x00000001, &axi_qos->qosqon); | |
1109 | ||
1110 | axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_IMSW_BASE; | |
1111 | writel(0x00000001, &axi_qos->qosconf); | |
1112 | writel(0x000020C8, &axi_qos->qosctset0); | |
1113 | writel(0x00000020, &axi_qos->qosreqctr); | |
1114 | writel(0x00002064, &axi_qos->qosthres0); | |
1115 | writel(0x00002004, &axi_qos->qosthres1); | |
1116 | writel(0x00000001, &axi_qos->qosthres2); | |
1117 | writel(0x00000001, &axi_qos->qosqon); | |
1118 | ||
1119 | axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSP1R_BASE; | |
1120 | writel(0x00000001, &axi_qos->qosconf); | |
1121 | writel(0x000020C8, &axi_qos->qosctset0); | |
1122 | writel(0x00000020, &axi_qos->qosreqctr); | |
1123 | writel(0x00002064, &axi_qos->qosthres0); | |
1124 | writel(0x00002004, &axi_qos->qosthres1); | |
1125 | writel(0x00000001, &axi_qos->qosthres2); | |
1126 | writel(0x00000001, &axi_qos->qosqon); | |
1127 | ||
1128 | axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSP1W_BASE; | |
1129 | writel(0x00000001, &axi_qos->qosconf); | |
1130 | writel(0x000020C8, &axi_qos->qosctset0); | |
1131 | writel(0x00000020, &axi_qos->qosreqctr); | |
1132 | if (IS_R8A7791_ES2()) { | |
1133 | writel(0x00000001, &axi_qos->qosthres0); | |
1134 | writel(0x00000001, &axi_qos->qosthres1); | |
1135 | } else { | |
1136 | writel(0x00002064, &axi_qos->qosthres0); | |
1137 | writel(0x00002004, &axi_qos->qosthres1); | |
1138 | } | |
1139 | writel(0x00000001, &axi_qos->qosthres2); | |
1140 | writel(0x00000001, &axi_qos->qosqon); | |
1141 | ||
1142 | axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_FDP1R_BASE; | |
1143 | writel(0x00000001, &axi_qos->qosconf); | |
1144 | writel(0x000020C8, &axi_qos->qosctset0); | |
1145 | writel(0x00000020, &axi_qos->qosreqctr); | |
1146 | writel(0x00002064, &axi_qos->qosthres0); | |
1147 | writel(0x00002004, &axi_qos->qosthres1); | |
1148 | writel(0x00000001, &axi_qos->qosthres2); | |
1149 | writel(0x00000001, &axi_qos->qosqon); | |
1150 | ||
1151 | axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_FDP1W_BASE; | |
1152 | writel(0x00000001, &axi_qos->qosconf); | |
1153 | writel(0x000020C8, &axi_qos->qosctset0); | |
1154 | writel(0x00000020, &axi_qos->qosreqctr); | |
1155 | if (IS_R8A7791_ES2()) { | |
1156 | writel(0x00000001, &axi_qos->qosthres0); | |
1157 | writel(0x00000001, &axi_qos->qosthres1); | |
1158 | } else { | |
1159 | writel(0x00002064, &axi_qos->qosthres0); | |
1160 | writel(0x00002004, &axi_qos->qosthres1); | |
1161 | } | |
1162 | writel(0x00000001, &axi_qos->qosthres2); | |
1163 | writel(0x00000001, &axi_qos->qosqon); | |
1164 | ||
1165 | axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_IMRR_BASE; | |
1166 | writel(0x00000001, &axi_qos->qosconf); | |
1167 | writel(0x000020C8, &axi_qos->qosctset0); | |
1168 | writel(0x00000020, &axi_qos->qosreqctr); | |
1169 | writel(0x00002064, &axi_qos->qosthres0); | |
1170 | writel(0x00002004, &axi_qos->qosthres1); | |
1171 | writel(0x00000001, &axi_qos->qosthres2); | |
1172 | writel(0x00000001, &axi_qos->qosqon); | |
1173 | ||
1174 | axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_IMRW_BASE; | |
1175 | writel(0x00000001, &axi_qos->qosconf); | |
1176 | writel(0x000020C8, &axi_qos->qosctset0); | |
1177 | writel(0x00000020, &axi_qos->qosreqctr); | |
1178 | writel(0x00002064, &axi_qos->qosthres0); | |
1179 | writel(0x00002004, &axi_qos->qosthres1); | |
1180 | writel(0x00000001, &axi_qos->qosthres2); | |
1181 | writel(0x00000001, &axi_qos->qosqon); | |
1182 | ||
1183 | axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSPD0R_BASE; | |
1184 | if (IS_R8A7791_ES2()) | |
1185 | writel(0x00000003, &axi_qos->qosconf); | |
1186 | else | |
1187 | writel(0x00000000, &axi_qos->qosconf); | |
1188 | writel(0x000020C8, &axi_qos->qosctset0); | |
1189 | writel(0x00002064, &axi_qos->qosthres0); | |
1190 | writel(0x00002004, &axi_qos->qosthres1); | |
1191 | writel(0x00000001, &axi_qos->qosthres2); | |
1192 | writel(0x00000001, &axi_qos->qosqon); | |
1193 | ||
1194 | axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSPD0W_BASE; | |
1195 | if (IS_R8A7791_ES2()) | |
1196 | writel(0x00000003, &axi_qos->qosconf); | |
1197 | else | |
1198 | writel(0x00000000, &axi_qos->qosconf); | |
1199 | writel(0x000020C8, &axi_qos->qosctset0); | |
1200 | writel(0x00002064, &axi_qos->qosthres0); | |
1201 | writel(0x00002004, &axi_qos->qosthres1); | |
1202 | writel(0x00000001, &axi_qos->qosthres2); | |
1203 | writel(0x00000001, &axi_qos->qosqon); | |
1204 | ||
1205 | axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSPD1R_BASE; | |
1206 | if (IS_R8A7791_ES2()) | |
1207 | writel(0x00000003, &axi_qos->qosconf); | |
1208 | else | |
1209 | writel(0x00000000, &axi_qos->qosconf); | |
1210 | writel(0x000020C8, &axi_qos->qosctset0); | |
1211 | writel(0x00002064, &axi_qos->qosthres0); | |
1212 | writel(0x00002004, &axi_qos->qosthres1); | |
1213 | writel(0x00000001, &axi_qos->qosthres2); | |
1214 | writel(0x00000001, &axi_qos->qosqon); | |
1215 | ||
1216 | axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSPD1W_BASE; | |
1217 | if (IS_R8A7791_ES2()) | |
1218 | writel(0x00000003, &axi_qos->qosconf); | |
1219 | else | |
1220 | writel(0x00000000, &axi_qos->qosconf); | |
1221 | writel(0x000020C8, &axi_qos->qosctset0); | |
1222 | writel(0x00002064, &axi_qos->qosthres0); | |
1223 | writel(0x00002004, &axi_qos->qosthres1); | |
1224 | writel(0x00000001, &axi_qos->qosthres2); | |
1225 | writel(0x00000001, &axi_qos->qosqon); | |
1226 | ||
1227 | axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_DU0R_BASE; | |
1228 | if (IS_R8A7791_ES2()) | |
1229 | writel(0x00000003, &axi_qos->qosconf); | |
1230 | else | |
1231 | writel(0x00000000, &axi_qos->qosconf); | |
1232 | writel(0x00002063, &axi_qos->qosctset0); | |
1233 | writel(0x00000001, &axi_qos->qosreqctr); | |
1234 | writel(0x00002064, &axi_qos->qosthres0); | |
1235 | writel(0x00002004, &axi_qos->qosthres1); | |
1236 | writel(0x00000001, &axi_qos->qosthres2); | |
1237 | writel(0x00000001, &axi_qos->qosqon); | |
1238 | ||
1239 | axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_DU0W_BASE; | |
1240 | if (IS_R8A7791_ES2()) | |
1241 | writel(0x00000000, &axi_qos->qosconf); | |
1242 | else | |
1243 | writel(0x00000000, &axi_qos->qosconf); | |
1244 | writel(0x00002063, &axi_qos->qosctset0); | |
1245 | writel(0x00000001, &axi_qos->qosreqctr); | |
1246 | writel(0x00002064, &axi_qos->qosthres0); | |
1247 | writel(0x00002004, &axi_qos->qosthres1); | |
1248 | writel(0x00000001, &axi_qos->qosthres2); | |
1249 | writel(0x00000001, &axi_qos->qosqon); | |
1250 | ||
1251 | axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VCP0CR_BASE; | |
1252 | writel(0x00000001, &axi_qos->qosconf); | |
1253 | writel(0x00002073, &axi_qos->qosctset0); | |
1254 | writel(0x00000020, &axi_qos->qosreqctr); | |
1255 | writel(0x00002064, &axi_qos->qosthres0); | |
1256 | writel(0x00002004, &axi_qos->qosthres1); | |
1257 | writel(0x00000001, &axi_qos->qosthres2); | |
1258 | writel(0x00000001, &axi_qos->qosqon); | |
1259 | ||
1260 | axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VCP0CW_BASE; | |
1261 | writel(0x00000001, &axi_qos->qosconf); | |
1262 | writel(0x00002073, &axi_qos->qosctset0); | |
1263 | writel(0x00000020, &axi_qos->qosreqctr); | |
1264 | if (IS_R8A7791_ES2()) { | |
1265 | writel(0x00000001, &axi_qos->qosthres0); | |
1266 | writel(0x00000001, &axi_qos->qosthres1); | |
1267 | } else { | |
1268 | writel(0x00002064, &axi_qos->qosthres0); | |
1269 | writel(0x00002004, &axi_qos->qosthres1); | |
1270 | } | |
1271 | writel(0x00000001, &axi_qos->qosthres2); | |
1272 | writel(0x00000001, &axi_qos->qosqon); | |
1273 | ||
1274 | axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VCP0VR_BASE; | |
1275 | writel(0x00000001, &axi_qos->qosconf); | |
1276 | writel(0x00002073, &axi_qos->qosctset0); | |
1277 | writel(0x00000020, &axi_qos->qosreqctr); | |
1278 | writel(0x00002064, &axi_qos->qosthres0); | |
1279 | writel(0x00002004, &axi_qos->qosthres1); | |
1280 | writel(0x00000001, &axi_qos->qosthres2); | |
1281 | writel(0x00000001, &axi_qos->qosqon); | |
1282 | ||
1283 | axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VCP0VW_BASE; | |
1284 | writel(0x00000001, &axi_qos->qosconf); | |
1285 | writel(0x00002073, &axi_qos->qosctset0); | |
1286 | writel(0x00000020, &axi_qos->qosreqctr); | |
1287 | if (IS_R8A7791_ES2()) { | |
1288 | writel(0x00000001, &axi_qos->qosthres0); | |
1289 | writel(0x00000001, &axi_qos->qosthres1); | |
1290 | } else { | |
1291 | writel(0x00002064, &axi_qos->qosthres0); | |
1292 | writel(0x00002004, &axi_qos->qosthres1); | |
1293 | } | |
1294 | writel(0x00000001, &axi_qos->qosthres2); | |
1295 | writel(0x00000001, &axi_qos->qosqon); | |
1296 | ||
1297 | axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VPC0R_BASE; | |
1298 | writel(0x00000001, &axi_qos->qosconf); | |
1299 | writel(0x00002073, &axi_qos->qosctset0); | |
1300 | writel(0x00000020, &axi_qos->qosreqctr); | |
1301 | writel(0x00002064, &axi_qos->qosthres0); | |
1302 | writel(0x00002004, &axi_qos->qosthres1); | |
1303 | writel(0x00000001, &axi_qos->qosthres2); | |
1304 | writel(0x00000001, &axi_qos->qosqon); | |
1305 | } | |
436eadfe | 1306 | #else /* CONFIG_RENESAS_EXTRAM_BOOT */ |
60c0467a VB |
1307 | void qos_init(void) |
1308 | { | |
1309 | } | |
436eadfe | 1310 | #endif /* CONFIG_RENESAS_EXTRAM_BOOT */ |