[people/ms/u-boot.git] / board / renesas / sh7785lcr / selfcheck.c

/*
 * Copyright (C) 2008 Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#include <common.h>
#include <asm/io.h>
#include <asm/processor.h>
#include <asm/pci.h>

#if defined(CONFIG_CPU_32BIT)
#define NOCACHE_OFFSET		0x00000000
#else
#define NOCACHE_OFFSET		0xa0000000
#endif
#define PLD_LEDCR		(0x04000008 + NOCACHE_OFFSET)
#define PLD_SWSR		(0x0400000a + NOCACHE_OFFSET)
#define PLD_VERSR		(0x0400000c + NOCACHE_OFFSET)

#define SM107_DEVICEID		(0x13e00060 + NOCACHE_OFFSET)

static void test_pld(void)
{
	printf("PLD version = %04x\n", readb(PLD_VERSR));
}

static void test_sm107(void)
{
	printf("SM107 device ID = %04x\n", readl(SM107_DEVICEID));
}

static void test_led(void)
{
	printf("turn on LEDs 3, 5, 7, 9\n");
	writeb(0x55, PLD_LEDCR);
	mdelay(2000);
	printf("turn on LEDs 4, 6, 8, 10\n");
	writeb(0xaa, PLD_LEDCR);
	mdelay(2000);
	writeb(0x00, PLD_LEDCR);
}

static void test_dipsw(void)
{
	printf("Please DIPSW set = B'0101\n");
	while (readb(PLD_SWSR) != 0x05) {
		if (ctrlc())
			return;
	}
	printf("Please DIPSW set = B'1010\n");
	while (readb(PLD_SWSR) != 0x0A) {
		if (ctrlc())
			return;
	}
	printf("DIPSW OK\n");
}

static void test_net(void)
{
	unsigned long data;

	writel(0x80000000, 0xfe0401c0);
	data = readl(0xfe040220);
	if (data == 0x816910ec)
		printf("Ethernet OK\n");
	else
		printf("Ethernet NG, data = %08x\n", (unsigned int)data);
}

static void test_sata(void)
{
	unsigned long data;

	writel(0x80000800, 0xfe0401c0);
	data = readl(0xfe040220);
	if (data == 0x35121095)
		printf("SATA OK\n");
	else
		printf("SATA NG, data = %08x\n", (unsigned int)data);
}

static void test_pci(void)
{
	writel(0x80001800, 0xfe0401c0);
	printf("PCI CN1 ID = %08x\n", readl(0xfe040220));

	writel(0x80001000, 0xfe0401c0);
	printf("PCI CN2 ID = %08x\n", readl(0xfe040220));
}

int do_hw_test(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
	char *cmd;

	if (argc != 2)
		return cmd_usage(cmdtp);

	cmd = argv[1];
	switch (cmd[0]) {
	case 'a':	/* all */
		test_pld();
		test_led();
		test_dipsw();
		test_sm107();
		test_net();
		test_sata();
		test_pci();
		break;
	case 'p':	/* pld or pci */
		if (cmd[1] == 'l')
			test_pld();
		else
			test_pci();
		break;
	case 'l':	/* led */
		test_led();
		break;
	case 'd':	/* dipsw */
		test_dipsw();
		break;
	case 's':	/* sm107 or sata */
		if (cmd[1] == 'm')
			test_sm107();
		else
			test_sata();
		break;
	case 'n':	/* net */
		test_net();
		break;
	default:
		return cmd_usage(cmdtp);
	}

	return 0;
}

U_BOOT_CMD(
	hwtest,	2,	1,	do_hw_test,
	"hardware test for R0P7785LC0011RL board",
	"\n"
	"hwtest all   - test all hardware\n"
	"hwtest pld   - output PLD version\n"
	"hwtest led   - turn on LEDs\n"
	"hwtest dipsw - test DIP switch\n"
	"hwtest sm107 - output SM107 version\n"
	"hwtest net   - check RTL8110 ID\n"
	"hwtest sata  - check SiI3512 ID\n"
	"hwtest pci   - output PCI slot device ID"
);
Commit	Line	Data
0d53a47d NI	1	/*
	2	* Copyright (C) 2008 Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
	3	*
1a459660	4	* SPDX-License-Identifier: GPL-2.0+
0d53a47d NI	5	*/
	6
	7	#include <common.h>
	8	#include <asm/io.h>
	9	#include <asm/processor.h>
	10	#include <asm/pci.h>
	11
	12	#if defined(CONFIG_CPU_32BIT)
	13	#define NOCACHE_OFFSET 0x00000000
	14	#else
	15	#define NOCACHE_OFFSET 0xa0000000
	16	#endif
	17	#define PLD_LEDCR (0x04000008 + NOCACHE_OFFSET)
	18	#define PLD_SWSR (0x0400000a + NOCACHE_OFFSET)
	19	#define PLD_VERSR (0x0400000c + NOCACHE_OFFSET)
	20
	21	#define SM107_DEVICEID (0x13e00060 + NOCACHE_OFFSET)
	22
0d53a47d NI	23	static void test_pld(void)
	24	{
	25	printf("PLD version = %04x\n", readb(PLD_VERSR));
	26	}
	27
	28	static void test_sm107(void)
	29	{
	30	printf("SM107 device ID = %04x\n", readl(SM107_DEVICEID));
	31	}
	32
	33	static void test_led(void)
	34	{
	35	printf("turn on LEDs 3, 5, 7, 9\n");
	36	writeb(0x55, PLD_LEDCR);
5b84dd67	37	mdelay(2000);
0d53a47d NI	38	printf("turn on LEDs 4, 6, 8, 10\n");
0d53a47d NI	39	writeb(0xaa, PLD_LEDCR);
5b84dd67	40	mdelay(2000);
0d53a47d NI	41	writeb(0x00, PLD_LEDCR);
	42	}
	43
	44	static void test_dipsw(void)
	45	{
	46	printf("Please DIPSW set = B'0101\n");
	47	while (readb(PLD_SWSR) != 0x05) {
	48	if (ctrlc())
	49	return;
	50	}
	51	printf("Please DIPSW set = B'1010\n");
	52	while (readb(PLD_SWSR) != 0x0A) {
	53	if (ctrlc())
	54	return;
	55	}
	56	printf("DIPSW OK\n");
	57	}
	58
	59	static void test_net(void)
	60	{
	61	unsigned long data;
	62
	63	writel(0x80000000, 0xfe0401c0);
	64	data = readl(0xfe040220);
	65	if (data == 0x816910ec)
	66	printf("Ethernet OK\n");
	67	else
b5d10a13	68	printf("Ethernet NG, data = %08x\n", (unsigned int)data);
0d53a47d NI	69	}
	70
	71	static void test_sata(void)
	72	{
	73	unsigned long data;
	74
	75	writel(0x80000800, 0xfe0401c0);
	76	data = readl(0xfe040220);
	77	if (data == 0x35121095)
	78	printf("SATA OK\n");
	79	else
b5d10a13	80	printf("SATA NG, data = %08x\n", (unsigned int)data);
0d53a47d NI	81	}
	82
	83	static void test_pci(void)
	84	{
	85	writel(0x80001800, 0xfe0401c0);
	86	printf("PCI CN1 ID = %08x\n", readl(0xfe040220));
	87
	88	writel(0x80001000, 0xfe0401c0);
	89	printf("PCI CN2 ID = %08x\n", readl(0xfe040220));
	90	}
	91
54841ab5	92	int do_hw_test(cmd_tbl_t cmdtp, int flag, int argc, char const argv[])
0d53a47d NI	93	{
	94	char *cmd;
	95
47e26b1b WD	96	if (argc != 2)
47e26b1b WD	97	return cmd_usage(cmdtp);
0d53a47d NI	98
	99	cmd = argv[1];
	100	switch (cmd[0]) {
	101	case 'a': /* all */
	102	test_pld();
	103	test_led();
	104	test_dipsw();
	105	test_sm107();
	106	test_net();
	107	test_sata();
	108	test_pci();
	109	break;
	110	case 'p': /* pld or pci */
	111	if (cmd[1] == 'l')
	112	test_pld();
	113	else
	114	test_pci();
	115	break;
	116	case 'l': /* led */
	117	test_led();
	118	break;
	119	case 'd': /* dipsw */
	120	test_dipsw();
	121	break;
	122	case 's': /* sm107 or sata */
	123	if (cmd[1] == 'm')
	124	test_sm107();
	125	else
	126	test_sata();
	127	break;
	128	case 'n': /* net */
	129	test_net();
	130	break;
	131	default:
47e26b1b	132	return cmd_usage(cmdtp);
0d53a47d NI	133	}
	134
	135	return 0;
	136	}
	137
	138	U_BOOT_CMD(
	139	hwtest, 2, 1, do_hw_test,
2fb2604d	140	"hardware test for R0P7785LC0011RL board",
0d53a47d NI	141	"\n"
	142	"hwtest all - test all hardware\n"
	143	"hwtest pld - output PLD version\n"
	144	"hwtest led - turn on LEDs\n"
	145	"hwtest dipsw - test DIP switch\n"
	146	"hwtest sm107 - output SM107 version\n"
	147	"hwtest net - check RTL8110 ID\n"
	148	"hwtest sata - check SiI3512 ID\n"
a89c33db	149	"hwtest pci - output PCI slot device ID"
0d53a47d	150	);