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trats2: Code cleanup.
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1/*
2 * Copyright (c) 2013 Samsung Electronics Co., Ltd. All rights reserved.
3 * Sanghee Kim <sh0130.kim@samsung.com>
4 * Piotr Wilczek <p.wilczek@samsung.com>
5 *
6 * SPDX-License-Identifier: GPL-2.0+
7 */
8
9#include <common.h>
10#include <lcd.h>
11#include <asm/io.h>
12#include <asm/arch/gpio.h>
13#include <asm/arch/mmc.h>
14#include <asm/arch/power.h>
15#include <asm/arch/clk.h>
16#include <asm/arch/clock.h>
17#include <asm/arch/mipi_dsim.h>
18#include <asm/arch/pinmux.h>
19#include <asm/arch/power.h>
20#include <power/pmic.h>
21#include <power/max77686_pmic.h>
22#include <power/battery.h>
23#include <power/max77693_pmic.h>
24#include <power/max77693_muic.h>
25#include <power/max77693_fg.h>
26#include <libtizen.h>
27#include <errno.h>
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28#include <usb.h>
29#include <usb/s3c_udc.h>
30#include <usb_mass_storage.h>
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31
32DECLARE_GLOBAL_DATA_PTR;
33
34static struct exynos4x12_gpio_part1 *gpio1;
35static struct exynos4x12_gpio_part2 *gpio2;
36
37static unsigned int board_rev = -1;
38
39static inline u32 get_model_rev(void);
40
41static void check_hw_revision(void)
42{
43 int modelrev = 0;
44 int i;
45
5234b6e0 46 gpio2 = (struct exynos4x12_gpio_part2 *)samsung_get_base_gpio_part2();
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47
48 /*
49 * GPM1[1:0]: MODEL_REV[1:0]
50 * Don't set as pull-none for these N/C pin.
51 * TRM say that it may cause unexcepted state and leakage current.
52 * and pull-none is only for output function.
53 */
54 for (i = 0; i < 2; i++)
55 s5p_gpio_cfg_pin(&gpio2->m1, i, GPIO_INPUT);
56
57 /* GPM1[5:2]: HW_REV[3:0] */
58 for (i = 2; i < 6; i++) {
59 s5p_gpio_cfg_pin(&gpio2->m1, i, GPIO_INPUT);
60 s5p_gpio_set_pull(&gpio2->m1, i, GPIO_PULL_NONE);
61 }
62
63 /* GPM1[1:0]: MODEL_REV[1:0] */
64 for (i = 0; i < 2; i++)
65 modelrev |= (s5p_gpio_get_value(&gpio2->m1, i) << i);
66
67 /* board_rev[15:8] = model */
68 board_rev = modelrev << 8;
69}
70
71#ifdef CONFIG_DISPLAY_BOARDINFO
72int checkboard(void)
73{
74 puts("Board:\tTRATS2\n");
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75 printf("HW Revision:\t0x%04x\n", board_rev);
76
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77 return 0;
78}
79#endif
80
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81u32 get_board_rev(void)
82{
83 return board_rev;
84}
85
86static inline u32 get_model_rev(void)
87{
88 return (board_rev >> 8) & 0xff;
89}
90
91static void board_external_gpio_init(void)
92{
5234b6e0 93 gpio2 = (struct exynos4x12_gpio_part2 *)samsung_get_base_gpio_part2();
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94
95 /*
96 * some pins which in alive block are connected with external pull-up
97 * but it's default setting is pull-down.
98 * if that pin set as input then that floated
99 */
100
101 s5p_gpio_set_pull(&gpio2->x0, 2, GPIO_PULL_NONE); /* PS_ALS_INT */
102 s5p_gpio_set_pull(&gpio2->x0, 4, GPIO_PULL_NONE); /* TSP_nINT */
103 s5p_gpio_set_pull(&gpio2->x0, 7, GPIO_PULL_NONE); /* AP_PMIC_IRQ*/
104 s5p_gpio_set_pull(&gpio2->x1, 5, GPIO_PULL_NONE); /* IF_PMIC_IRQ*/
105 s5p_gpio_set_pull(&gpio2->x2, 0, GPIO_PULL_NONE); /* VOL_UP */
106 s5p_gpio_set_pull(&gpio2->x2, 1, GPIO_PULL_NONE); /* VOL_DOWN */
107 s5p_gpio_set_pull(&gpio2->x2, 3, GPIO_PULL_NONE); /* FUEL_ALERT */
108 s5p_gpio_set_pull(&gpio2->x2, 4, GPIO_PULL_NONE); /* ADC_INT */
109 s5p_gpio_set_pull(&gpio2->x2, 7, GPIO_PULL_NONE); /* nPOWER */
110 s5p_gpio_set_pull(&gpio2->x3, 0, GPIO_PULL_NONE); /* WPC_INT */
111 s5p_gpio_set_pull(&gpio2->x3, 5, GPIO_PULL_NONE); /* OK_KEY */
112 s5p_gpio_set_pull(&gpio2->x3, 7, GPIO_PULL_NONE); /* HDMI_HPD */
113}
114
115#ifdef CONFIG_SYS_I2C_INIT_BOARD
116static void board_init_i2c(void)
117{
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118 int err;
119
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120 gpio1 = (struct exynos4x12_gpio_part1 *)samsung_get_base_gpio_part1();
121 gpio2 = (struct exynos4x12_gpio_part2 *)samsung_get_base_gpio_part2();
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122
123 /* I2C_7 */
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124 err = exynos_pinmux_config(PERIPH_ID_I2C7, PINMUX_FLAG_NONE);
125 if (err) {
126 debug("I2C%d not configured\n", (I2C_7));
127 return;
128 }
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129
130 /* I2C_8 */
131 s5p_gpio_direction_output(&gpio1->f1, 4, 1);
132 s5p_gpio_direction_output(&gpio1->f1, 5, 1);
133
134 /* I2C_9 */
135 s5p_gpio_direction_output(&gpio2->m2, 1, 1);
136 s5p_gpio_direction_output(&gpio2->m2, 0, 1);
137}
138#endif
139
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140#ifdef CONFIG_SYS_I2C_SOFT
141int get_soft_i2c_scl_pin(void)
142{
143 if (I2C_ADAP_HWNR)
8475c869 144 return exynos4x12_gpio_get(2, m2, 1); /* I2C9 */
2d8f1e27 145 else
8475c869 146 return exynos4x12_gpio_get(1, f1, 4); /* I2C8 */
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147}
148
149int get_soft_i2c_sda_pin(void)
150{
151 if (I2C_ADAP_HWNR)
8475c869 152 return exynos4x12_gpio_get(2, m2, 0); /* I2C9 */
2d8f1e27 153 else
8475c869 154 return exynos4x12_gpio_get(1, f1, 5); /* I2C8 */
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155}
156#endif
157
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158int board_early_init_f(void)
159{
160 check_hw_revision();
161 board_external_gpio_init();
162
163 gd->flags |= GD_FLG_DISABLE_CONSOLE;
164
165 return 0;
166}
167
168static int pmic_init_max77686(void);
169
170int board_init(void)
171{
172 struct exynos4_power *pwr =
5234b6e0 173 (struct exynos4_power *)samsung_get_base_power();
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174
175 gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
176
177 /* workaround: clear INFORM4..5 */
178 writel(0, (unsigned int)&pwr->inform4);
179 writel(0, (unsigned int)&pwr->inform5);
180
181 return 0;
182}
183
184int power_init_board(void)
185{
186 int chrg;
187 struct power_battery *pb;
188 struct pmic *p_chrg, *p_muic, *p_fg, *p_bat;
189
190#ifdef CONFIG_SYS_I2C_INIT_BOARD
191 board_init_i2c();
192#endif
2d8f1e27 193 pmic_init(I2C_7); /* I2C adapter 7 - bus name s3c24x0_7 */
4d6c9671 194 pmic_init_max77686();
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195 pmic_init_max77693(I2C_10); /* I2C adapter 10 - bus name soft1 */
196 power_muic_init(I2C_10); /* I2C adapter 10 - bus name soft1 */
197 power_fg_init(I2C_9); /* I2C adapter 9 - bus name soft0 */
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198 power_bat_init(0);
199
200 p_chrg = pmic_get("MAX77693_PMIC");
201 if (!p_chrg) {
202 puts("MAX77693_PMIC: Not found\n");
203 return -ENODEV;
204 }
205
206 p_muic = pmic_get("MAX77693_MUIC");
207 if (!p_muic) {
208 puts("MAX77693_MUIC: Not found\n");
209 return -ENODEV;
210 }
211
212 p_fg = pmic_get("MAX77693_FG");
213 if (!p_fg) {
214 puts("MAX17042_FG: Not found\n");
215 return -ENODEV;
216 }
217
218 if (p_chrg->chrg->chrg_bat_present(p_chrg) == 0)
219 puts("No battery detected\n");
220
221 p_bat = pmic_get("BAT_TRATS2");
222 if (!p_bat) {
223 puts("BAT_TRATS2: Not found\n");
224 return -ENODEV;
225 }
226
227 p_fg->parent = p_bat;
228 p_chrg->parent = p_bat;
229 p_muic->parent = p_bat;
230
231 p_bat->pbat->battery_init(p_bat, p_fg, p_chrg, p_muic);
232
233 pb = p_bat->pbat;
234 chrg = p_muic->chrg->chrg_type(p_muic);
235 debug("CHARGER TYPE: %d\n", chrg);
236
237 if (!p_chrg->chrg->chrg_bat_present(p_chrg)) {
238 puts("No battery detected\n");
239 return -1;
240 }
241
242 p_fg->fg->fg_battery_check(p_fg, p_bat);
243
244 if (pb->bat->state == CHARGE && chrg == CHARGER_USB)
245 puts("CHARGE Battery !\n");
246
247 return 0;
248}
249
250int dram_init(void)
251{
252 u32 size_mb;
253
254 size_mb = (get_ram_size((long *)PHYS_SDRAM_1, PHYS_SDRAM_1_SIZE) +
255 get_ram_size((long *)PHYS_SDRAM_2, PHYS_SDRAM_2_SIZE) +
256 get_ram_size((long *)PHYS_SDRAM_3, PHYS_SDRAM_3_SIZE) +
257 get_ram_size((long *)PHYS_SDRAM_4, PHYS_SDRAM_4_SIZE)) >> 20;
258
259 gd->ram_size = size_mb << 20;
260
261 return 0;
262}
263
264void dram_init_banksize(void)
265{
266 gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
267 gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
268 gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
269 gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE;
270 gd->bd->bi_dram[2].start = PHYS_SDRAM_3;
271 gd->bd->bi_dram[2].size = PHYS_SDRAM_3_SIZE;
272 gd->bd->bi_dram[3].start = PHYS_SDRAM_4;
273 gd->bd->bi_dram[3].size = PHYS_SDRAM_4_SIZE;
274}
275
276int board_mmc_init(bd_t *bis)
277{
278 int err0, err2 = 0;
279
5234b6e0 280 gpio2 = (struct exynos4x12_gpio_part2 *)samsung_get_base_gpio_part2();
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281
282 /* eMMC_EN: SD_0_CDn: GPK0[2] Output High */
283 s5p_gpio_direction_output(&gpio2->k0, 2, 1);
284 s5p_gpio_set_pull(&gpio2->k0, 2, GPIO_PULL_NONE);
285
286 /*
287 * eMMC GPIO:
288 * SDR 8-bit@48MHz at MMC0
289 * GPK0[0] SD_0_CLK(2)
290 * GPK0[1] SD_0_CMD(2)
291 * GPK0[2] SD_0_CDn -> Not used
292 * GPK0[3:6] SD_0_DATA[0:3](2)
293 * GPK1[3:6] SD_0_DATA[0:3](3)
294 *
295 * DDR 4-bit@26MHz at MMC4
296 * GPK0[0] SD_4_CLK(3)
297 * GPK0[1] SD_4_CMD(3)
298 * GPK0[2] SD_4_CDn -> Not used
299 * GPK0[3:6] SD_4_DATA[0:3](3)
300 * GPK1[3:6] SD_4_DATA[4:7](4)
301 */
302
303 err0 = exynos_pinmux_config(PERIPH_ID_SDMMC0, PINMUX_FLAG_8BIT_MODE);
304
305 /*
306 * MMC device init
307 * mmc0 : eMMC (8-bit buswidth)
308 * mmc2 : SD card (4-bit buswidth)
309 */
310 if (err0)
311 debug("SDMMC0 not configured\n");
312 else
313 err0 = s5p_mmc_init(0, 8);
314
315 /* T-flash detect */
316 s5p_gpio_cfg_pin(&gpio2->x3, 4, 0xf);
317 s5p_gpio_set_pull(&gpio2->x3, 4, GPIO_PULL_UP);
318
319 /*
320 * Check the T-flash detect pin
321 * GPX3[4] T-flash detect pin
322 */
323 if (!s5p_gpio_get_value(&gpio2->x3, 4)) {
324 err2 = exynos_pinmux_config(PERIPH_ID_SDMMC2, PINMUX_FLAG_NONE);
325 if (err2)
326 debug("SDMMC2 not configured\n");
327 else
328 err2 = s5p_mmc_init(2, 4);
329 }
330
331 return err0 & err2;
332}
333
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334#ifdef CONFIG_USB_GADGET
335static int s5pc210_phy_control(int on)
336{
337 int ret = 0;
338 unsigned int val;
339 struct pmic *p, *p_pmic, *p_muic;
340
341 p_pmic = pmic_get("MAX77686_PMIC");
342 if (!p_pmic)
343 return -ENODEV;
344
345 if (pmic_probe(p_pmic))
346 return -1;
347
348 p_muic = pmic_get("MAX77693_MUIC");
349 if (!p_muic)
350 return -ENODEV;
351
352 if (pmic_probe(p_muic))
353 return -1;
354
355 if (on) {
356 ret = max77686_set_ldo_mode(p_pmic, 12, OPMODE_ON);
357 if (ret)
358 return -1;
359
360 p = pmic_get("MAX77693_PMIC");
361 if (!p)
362 return -ENODEV;
363
364 if (pmic_probe(p))
365 return -1;
366
367 /* SAFEOUT */
368 ret = pmic_reg_read(p, MAX77693_SAFEOUT, &val);
369 if (ret)
370 return -1;
371
372 val |= MAX77693_ENSAFEOUT1;
373 ret = pmic_reg_write(p, MAX77693_SAFEOUT, val);
374 if (ret)
375 return -1;
376
377 /* PATH: USB */
378 ret = pmic_reg_write(p_muic, MAX77693_MUIC_CONTROL1,
379 MAX77693_MUIC_CTRL1_DN1DP2);
380
381 } else {
382 ret = max77686_set_ldo_mode(p_pmic, 12, OPMODE_LPM);
383 if (ret)
384 return -1;
385
386 /* PATH: UART */
387 ret = pmic_reg_write(p_muic, MAX77693_MUIC_CONTROL1,
388 MAX77693_MUIC_CTRL1_UT1UR2);
389 }
390
391 if (ret)
392 return -1;
393
394 return 0;
395}
396
397struct s3c_plat_otg_data s5pc210_otg_data = {
398 .phy_control = s5pc210_phy_control,
399 .regs_phy = EXYNOS4X12_USBPHY_BASE,
400 .regs_otg = EXYNOS4X12_USBOTG_BASE,
401 .usb_phy_ctrl = EXYNOS4X12_USBPHY_CONTROL,
402 .usb_flags = PHY0_SLEEP,
403};
404
405int board_usb_init(int index, enum usb_init_type init)
406{
407 debug("USB_udc_probe\n");
408 return s3c_udc_probe(&s5pc210_otg_data);
409}
410
411#ifdef CONFIG_USB_CABLE_CHECK
412int usb_cable_connected(void)
413{
414 struct pmic *muic = pmic_get("MAX77693_MUIC");
415 if (!muic)
416 return 0;
417
418 return !!muic->chrg->chrg_type(muic);
419}
420#endif
421#endif
422
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423static int pmic_init_max77686(void)
424{
425 struct pmic *p = pmic_get("MAX77686_PMIC");
426
427 if (pmic_probe(p))
428 return -1;
429
430 /* BUCK/LDO Output Voltage */
431 max77686_set_ldo_voltage(p, 21, 2800000); /* LDO21 VTF_2.8V */
432 max77686_set_ldo_voltage(p, 23, 3300000); /* LDO23 TSP_AVDD_3.3V*/
433 max77686_set_ldo_voltage(p, 24, 1800000); /* LDO24 TSP_VDD_1.8V */
434
435 /* BUCK/LDO Output Mode */
436 max77686_set_buck_mode(p, 1, OPMODE_STANDBY); /* BUCK1 VMIF_1.1V_AP */
437 max77686_set_buck_mode(p, 2, OPMODE_ON); /* BUCK2 VARM_1.0V_AP */
438 max77686_set_buck_mode(p, 3, OPMODE_ON); /* BUCK3 VINT_1.0V_AP */
439 max77686_set_buck_mode(p, 4, OPMODE_ON); /* BUCK4 VG3D_1.0V_AP */
440 max77686_set_buck_mode(p, 5, OPMODE_ON); /* BUCK5 VMEM_1.2V_AP */
441 max77686_set_buck_mode(p, 6, OPMODE_ON); /* BUCK6 VCC_SUB_1.35V*/
442 max77686_set_buck_mode(p, 7, OPMODE_ON); /* BUCK7 VCC_SUB_2.0V */
443 max77686_set_buck_mode(p, 8, OPMODE_OFF); /* VMEM_VDDF_2.85V */
444 max77686_set_buck_mode(p, 9, OPMODE_OFF); /* CAM_ISP_CORE_1.2V*/
445
446 max77686_set_ldo_mode(p, 1, OPMODE_LPM); /* LDO1 VALIVE_1.0V_AP*/
447 max77686_set_ldo_mode(p, 2, OPMODE_STANDBY); /* LDO2 VM1M2_1.2V_AP */
448 max77686_set_ldo_mode(p, 3, OPMODE_LPM); /* LDO3 VCC_1.8V_AP */
449 max77686_set_ldo_mode(p, 4, OPMODE_LPM); /* LDO4 VCC_2.8V_AP */
450 max77686_set_ldo_mode(p, 5, OPMODE_OFF); /* LDO5_VCC_1.8V_IO */
451 max77686_set_ldo_mode(p, 6, OPMODE_STANDBY); /* LDO6 VMPLL_1.0V_AP */
452 max77686_set_ldo_mode(p, 7, OPMODE_STANDBY); /* LDO7 VPLL_1.0V_AP */
453 max77686_set_ldo_mode(p, 8, OPMODE_LPM); /* LDO8 VMIPI_1.0V_AP */
454 max77686_set_ldo_mode(p, 9, OPMODE_OFF); /* CAM_ISP_MIPI_1.2*/
455 max77686_set_ldo_mode(p, 10, OPMODE_LPM); /* LDO10 VMIPI_1.8V_AP*/
456 max77686_set_ldo_mode(p, 11, OPMODE_STANDBY); /* LDO11 VABB1_1.8V_AP*/
457 max77686_set_ldo_mode(p, 12, OPMODE_LPM); /* LDO12 VUOTG_3.0V_AP*/
458 max77686_set_ldo_mode(p, 13, OPMODE_OFF); /* LDO13 VC2C_1.8V_AP */
459 max77686_set_ldo_mode(p, 14, OPMODE_STANDBY); /* VABB02_1.8V_AP */
460 max77686_set_ldo_mode(p, 15, OPMODE_STANDBY); /* LDO15 VHSIC_1.0V_AP*/
461 max77686_set_ldo_mode(p, 16, OPMODE_STANDBY); /* LDO16 VHSIC_1.8V_AP*/
462 max77686_set_ldo_mode(p, 17, OPMODE_OFF); /* CAM_SENSOR_CORE_1.2*/
463 max77686_set_ldo_mode(p, 18, OPMODE_OFF); /* CAM_ISP_SEN_IO_1.8V*/
464 max77686_set_ldo_mode(p, 19, OPMODE_OFF); /* LDO19 VT_CAM_1.8V */
465 max77686_set_ldo_mode(p, 20, OPMODE_ON); /* LDO20 VDDQ_PRE_1.8V*/
466 max77686_set_ldo_mode(p, 21, OPMODE_OFF); /* LDO21 VTF_2.8V */
467 max77686_set_ldo_mode(p, 22, OPMODE_OFF); /* LDO22 VMEM_VDD_2.8V*/
468 max77686_set_ldo_mode(p, 23, OPMODE_OFF); /* LDO23 TSP_AVDD_3.3V*/
469 max77686_set_ldo_mode(p, 24, OPMODE_OFF); /* LDO24 TSP_VDD_1.8V */
470 max77686_set_ldo_mode(p, 25, OPMODE_OFF); /* LDO25 VCC_3.3V_LCD */
471 max77686_set_ldo_mode(p, 26, OPMODE_OFF); /*LDO26 VCC_3.0V_MOTOR*/
472
473 return 0;
474}
475
476/*
477 * LCD
478 */
479
480#ifdef CONFIG_LCD
481static struct mipi_dsim_config dsim_config = {
482 .e_interface = DSIM_VIDEO,
483 .e_virtual_ch = DSIM_VIRTUAL_CH_0,
484 .e_pixel_format = DSIM_24BPP_888,
485 .e_burst_mode = DSIM_BURST_SYNC_EVENT,
486 .e_no_data_lane = DSIM_DATA_LANE_4,
487 .e_byte_clk = DSIM_PLL_OUT_DIV8,
488 .hfp = 1,
489
490 .p = 3,
491 .m = 120,
492 .s = 1,
493
494 /* D-PHY PLL stable time spec :min = 200usec ~ max 400usec */
495 .pll_stable_time = 500,
496
497 /* escape clk : 10MHz */
498 .esc_clk = 20 * 1000000,
499
500 /* stop state holding counter after bta change count 0 ~ 0xfff */
501 .stop_holding_cnt = 0x7ff,
502 /* bta timeout 0 ~ 0xff */
503 .bta_timeout = 0xff,
504 /* lp rx timeout 0 ~ 0xffff */
505 .rx_timeout = 0xffff,
506};
507
508static struct exynos_platform_mipi_dsim dsim_platform_data = {
509 .lcd_panel_info = NULL,
510 .dsim_config = &dsim_config,
511};
512
513static struct mipi_dsim_lcd_device mipi_lcd_device = {
514 .name = "s6e8ax0",
515 .id = -1,
516 .bus_id = 0,
517 .platform_data = (void *)&dsim_platform_data,
518};
519
520static int mipi_power(void)
521{
522 struct pmic *p = pmic_get("MAX77686_PMIC");
523
524 /* LDO8 VMIPI_1.0V_AP */
525 max77686_set_ldo_mode(p, 8, OPMODE_ON);
526 /* LDO10 VMIPI_1.8V_AP */
527 max77686_set_ldo_mode(p, 10, OPMODE_ON);
528
529 return 0;
530}
531
532void exynos_lcd_power_on(void)
533{
534 struct pmic *p = pmic_get("MAX77686_PMIC");
535
5234b6e0 536 gpio1 = (struct exynos4x12_gpio_part1 *)samsung_get_base_gpio_part1();
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537
538 /* LCD_2.2V_EN: GPC0[1] */
539 s5p_gpio_set_pull(&gpio1->c0, 1, GPIO_PULL_UP);
540 s5p_gpio_direction_output(&gpio1->c0, 1, 1);
541
542 /* LDO25 VCC_3.1V_LCD */
543 pmic_probe(p);
544 max77686_set_ldo_voltage(p, 25, 3100000);
545 max77686_set_ldo_mode(p, 25, OPMODE_LPM);
546}
547
548void exynos_reset_lcd(void)
549{
5234b6e0 550 gpio1 = (struct exynos4x12_gpio_part1 *)samsung_get_base_gpio_part1();
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551
552 /* reset lcd */
553 s5p_gpio_direction_output(&gpio1->f2, 1, 0);
554 udelay(10);
555 s5p_gpio_set_value(&gpio1->f2, 1, 1);
556}
557
558vidinfo_t panel_info = {
559 .vl_freq = 60,
560 .vl_col = 720,
561 .vl_row = 1280,
562 .vl_width = 720,
563 .vl_height = 1280,
564 .vl_clkp = CONFIG_SYS_HIGH,
565 .vl_hsp = CONFIG_SYS_LOW,
566 .vl_vsp = CONFIG_SYS_LOW,
567 .vl_dp = CONFIG_SYS_LOW,
568 .vl_bpix = 5, /* Bits per pixel, 2^5 = 32 */
569
570 /* s6e8ax0 Panel infomation */
571 .vl_hspw = 5,
572 .vl_hbpd = 10,
573 .vl_hfpd = 10,
574
575 .vl_vspw = 2,
576 .vl_vbpd = 1,
577 .vl_vfpd = 13,
578 .vl_cmd_allow_len = 0xf,
579 .mipi_enabled = 1,
580
581 .dual_lcd_enabled = 0,
582
583 .init_delay = 0,
584 .power_on_delay = 25,
585 .reset_delay = 0,
586 .interface_mode = FIMD_RGB_INTERFACE,
587};
588
589void init_panel_info(vidinfo_t *vid)
590{
591 vid->logo_on = 1;
592 vid->resolution = HD_RESOLUTION;
593 vid->rgb_mode = MODE_RGB_P;
594
595 vid->power_on_delay = 30;
596
597 mipi_lcd_device.reverse_panel = 1;
598
599#ifdef CONFIG_TIZEN
600 get_tizen_logo_info(vid);
601#endif
602
603 strcpy(dsim_platform_data.lcd_panel_name, mipi_lcd_device.name);
604 dsim_platform_data.mipi_power = mipi_power;
605 dsim_platform_data.phy_enable = set_mipi_phy_ctrl;
606 dsim_platform_data.lcd_panel_info = (void *)vid;
607 exynos_mipi_dsi_register_lcd_device(&mipi_lcd_device);
608
609 s6e8ax0_init();
610
611 exynos_set_dsim_platform_data(&dsim_platform_data);
612}
613#endif /* LCD */
614
615#ifdef CONFIG_MISC_INIT_R
616int misc_init_r(void)
617{
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618 return 0;
619}
620#endif