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dm: exynos: Tidy up GPIO headers
[people/ms/u-boot.git] / board / samsung / trats2 / trats2.c
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1/*
2 * Copyright (c) 2013 Samsung Electronics Co., Ltd. All rights reserved.
3 * Sanghee Kim <sh0130.kim@samsung.com>
4 * Piotr Wilczek <p.wilczek@samsung.com>
5 *
6 * SPDX-License-Identifier: GPL-2.0+
7 */
8
9#include <common.h>
10#include <lcd.h>
903fd795 11#include <asm/gpio.h>
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12#include <asm/arch/pinmux.h>
13#include <asm/arch/power.h>
1ecab0f3 14#include <asm/arch/mipi_dsim.h>
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15#include <power/pmic.h>
16#include <power/max77686_pmic.h>
17#include <power/battery.h>
18#include <power/max77693_pmic.h>
19#include <power/max77693_muic.h>
20#include <power/max77693_fg.h>
21#include <libtizen.h>
22#include <errno.h>
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23#include <usb.h>
24#include <usb/s3c_udc.h>
25#include <usb_mass_storage.h>
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26
27DECLARE_GLOBAL_DATA_PTR;
28
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29static unsigned int board_rev = -1;
30
31static inline u32 get_model_rev(void);
32
33static void check_hw_revision(void)
34{
35 int modelrev = 0;
36 int i;
37
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38 /*
39 * GPM1[1:0]: MODEL_REV[1:0]
40 * Don't set as pull-none for these N/C pin.
41 * TRM say that it may cause unexcepted state and leakage current.
42 * and pull-none is only for output function.
43 */
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44 for (i = EXYNOS4X12_GPIO_M10; i < EXYNOS4X12_GPIO_M12; i++)
45 gpio_cfg_pin(i, S5P_GPIO_INPUT);
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46
47 /* GPM1[5:2]: HW_REV[3:0] */
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48 for (i = EXYNOS4X12_GPIO_M12; i < EXYNOS4X12_GPIO_M16; i++) {
49 gpio_cfg_pin(i, S5P_GPIO_INPUT);
50 gpio_set_pull(i, S5P_GPIO_PULL_NONE);
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51 }
52
53 /* GPM1[1:0]: MODEL_REV[1:0] */
54 for (i = 0; i < 2; i++)
f6ae1ca0 55 modelrev |= (gpio_get_value(EXYNOS4X12_GPIO_M10 + i) << i);
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56
57 /* board_rev[15:8] = model */
58 board_rev = modelrev << 8;
59}
60
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61u32 get_board_rev(void)
62{
63 return board_rev;
64}
65
66static inline u32 get_model_rev(void)
67{
68 return (board_rev >> 8) & 0xff;
69}
70
71static void board_external_gpio_init(void)
72{
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73 /*
74 * some pins which in alive block are connected with external pull-up
75 * but it's default setting is pull-down.
76 * if that pin set as input then that floated
77 */
78
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79 gpio_set_pull(EXYNOS4X12_GPIO_X02, S5P_GPIO_PULL_NONE); /* PS_ALS_INT */
80 gpio_set_pull(EXYNOS4X12_GPIO_X04, S5P_GPIO_PULL_NONE); /* TSP_nINT */
81 gpio_set_pull(EXYNOS4X12_GPIO_X07, S5P_GPIO_PULL_NONE); /* AP_PMIC_IRQ*/
82 gpio_set_pull(EXYNOS4X12_GPIO_X15, S5P_GPIO_PULL_NONE); /* IF_PMIC_IRQ*/
83 gpio_set_pull(EXYNOS4X12_GPIO_X20, S5P_GPIO_PULL_NONE); /* VOL_UP */
84 gpio_set_pull(EXYNOS4X12_GPIO_X21, S5P_GPIO_PULL_NONE); /* VOL_DOWN */
85 gpio_set_pull(EXYNOS4X12_GPIO_X23, S5P_GPIO_PULL_NONE); /* FUEL_ALERT */
86 gpio_set_pull(EXYNOS4X12_GPIO_X24, S5P_GPIO_PULL_NONE); /* ADC_INT */
87 gpio_set_pull(EXYNOS4X12_GPIO_X27, S5P_GPIO_PULL_NONE); /* nPOWER */
88 gpio_set_pull(EXYNOS4X12_GPIO_X30, S5P_GPIO_PULL_NONE); /* WPC_INT */
89 gpio_set_pull(EXYNOS4X12_GPIO_X35, S5P_GPIO_PULL_NONE); /* OK_KEY */
90 gpio_set_pull(EXYNOS4X12_GPIO_X37, S5P_GPIO_PULL_NONE); /* HDMI_HPD */
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91}
92
93#ifdef CONFIG_SYS_I2C_INIT_BOARD
94static void board_init_i2c(void)
95{
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96 int err;
97
4d6c9671 98 /* I2C_7 */
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99 err = exynos_pinmux_config(PERIPH_ID_I2C7, PINMUX_FLAG_NONE);
100 if (err) {
101 debug("I2C%d not configured\n", (I2C_7));
102 return;
103 }
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104
105 /* I2C_8 */
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106 gpio_direction_output(EXYNOS4X12_GPIO_F14, 1);
107 gpio_direction_output(EXYNOS4X12_GPIO_F15, 1);
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108
109 /* I2C_9 */
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110 gpio_direction_output(EXYNOS4X12_GPIO_M21, 1);
111 gpio_direction_output(EXYNOS4X12_GPIO_M20, 1);
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112}
113#endif
114
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115#ifdef CONFIG_SYS_I2C_SOFT
116int get_soft_i2c_scl_pin(void)
117{
118 if (I2C_ADAP_HWNR)
f6ae1ca0 119 return EXYNOS4X12_GPIO_M21; /* I2C9 */
2d8f1e27 120 else
f6ae1ca0 121 return EXYNOS4X12_GPIO_F14; /* I2C8 */
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122}
123
124int get_soft_i2c_sda_pin(void)
125{
126 if (I2C_ADAP_HWNR)
f6ae1ca0 127 return EXYNOS4X12_GPIO_M20; /* I2C9 */
2d8f1e27 128 else
f6ae1ca0 129 return EXYNOS4X12_GPIO_F15; /* I2C8 */
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130}
131#endif
132
1ecab0f3 133int exynos_early_init_f(void)
4d6c9671 134{
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135 board_external_gpio_init();
136
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137 return 0;
138}
139
140static int pmic_init_max77686(void);
141
1ecab0f3 142int exynos_init(void)
4d6c9671 143{
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144 struct exynos4_power *pwr =
145 (struct exynos4_power *)samsung_get_base_power();
146
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147 check_hw_revision();
148 printf("HW Revision:\t0x%04x\n", board_rev);
4d6c9671 149
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150 /*
151 * First bootloader on the TRATS2 platform uses
152 * INFORM4 and INFORM5 registers for recovery
153 *
154 * To indicate correct boot chain - those two
155 * registers must be cleared out
156 */
157 writel(0, &pwr->inform4);
158 writel(0, &pwr->inform5);
159
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160 return 0;
161}
162
1ecab0f3 163int exynos_power_init(void)
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164{
165 int chrg;
166 struct power_battery *pb;
167 struct pmic *p_chrg, *p_muic, *p_fg, *p_bat;
168
169#ifdef CONFIG_SYS_I2C_INIT_BOARD
170 board_init_i2c();
171#endif
2d8f1e27 172 pmic_init(I2C_7); /* I2C adapter 7 - bus name s3c24x0_7 */
4d6c9671 173 pmic_init_max77686();
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174 pmic_init_max77693(I2C_10); /* I2C adapter 10 - bus name soft1 */
175 power_muic_init(I2C_10); /* I2C adapter 10 - bus name soft1 */
176 power_fg_init(I2C_9); /* I2C adapter 9 - bus name soft0 */
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177 power_bat_init(0);
178
179 p_chrg = pmic_get("MAX77693_PMIC");
180 if (!p_chrg) {
181 puts("MAX77693_PMIC: Not found\n");
182 return -ENODEV;
183 }
184
185 p_muic = pmic_get("MAX77693_MUIC");
186 if (!p_muic) {
187 puts("MAX77693_MUIC: Not found\n");
188 return -ENODEV;
189 }
190
191 p_fg = pmic_get("MAX77693_FG");
192 if (!p_fg) {
193 puts("MAX17042_FG: Not found\n");
194 return -ENODEV;
195 }
196
197 if (p_chrg->chrg->chrg_bat_present(p_chrg) == 0)
198 puts("No battery detected\n");
199
200 p_bat = pmic_get("BAT_TRATS2");
201 if (!p_bat) {
202 puts("BAT_TRATS2: Not found\n");
203 return -ENODEV;
204 }
205
206 p_fg->parent = p_bat;
207 p_chrg->parent = p_bat;
208 p_muic->parent = p_bat;
209
210 p_bat->pbat->battery_init(p_bat, p_fg, p_chrg, p_muic);
211
212 pb = p_bat->pbat;
213 chrg = p_muic->chrg->chrg_type(p_muic);
214 debug("CHARGER TYPE: %d\n", chrg);
215
216 if (!p_chrg->chrg->chrg_bat_present(p_chrg)) {
217 puts("No battery detected\n");
4a188365 218 return 0;
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219 }
220
221 p_fg->fg->fg_battery_check(p_fg, p_bat);
222
223 if (pb->bat->state == CHARGE && chrg == CHARGER_USB)
224 puts("CHARGE Battery !\n");
225
226 return 0;
227}
228
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229#ifdef CONFIG_USB_GADGET
230static int s5pc210_phy_control(int on)
231{
232 int ret = 0;
233 unsigned int val;
234 struct pmic *p, *p_pmic, *p_muic;
235
236 p_pmic = pmic_get("MAX77686_PMIC");
237 if (!p_pmic)
238 return -ENODEV;
239
240 if (pmic_probe(p_pmic))
241 return -1;
242
243 p_muic = pmic_get("MAX77693_MUIC");
244 if (!p_muic)
245 return -ENODEV;
246
247 if (pmic_probe(p_muic))
248 return -1;
249
250 if (on) {
251 ret = max77686_set_ldo_mode(p_pmic, 12, OPMODE_ON);
252 if (ret)
253 return -1;
254
255 p = pmic_get("MAX77693_PMIC");
256 if (!p)
257 return -ENODEV;
258
259 if (pmic_probe(p))
260 return -1;
261
262 /* SAFEOUT */
263 ret = pmic_reg_read(p, MAX77693_SAFEOUT, &val);
264 if (ret)
265 return -1;
266
267 val |= MAX77693_ENSAFEOUT1;
268 ret = pmic_reg_write(p, MAX77693_SAFEOUT, val);
269 if (ret)
270 return -1;
271
272 /* PATH: USB */
273 ret = pmic_reg_write(p_muic, MAX77693_MUIC_CONTROL1,
274 MAX77693_MUIC_CTRL1_DN1DP2);
275
276 } else {
277 ret = max77686_set_ldo_mode(p_pmic, 12, OPMODE_LPM);
278 if (ret)
279 return -1;
280
281 /* PATH: UART */
282 ret = pmic_reg_write(p_muic, MAX77693_MUIC_CONTROL1,
283 MAX77693_MUIC_CTRL1_UT1UR2);
284 }
285
286 if (ret)
287 return -1;
288
289 return 0;
290}
291
292struct s3c_plat_otg_data s5pc210_otg_data = {
293 .phy_control = s5pc210_phy_control,
294 .regs_phy = EXYNOS4X12_USBPHY_BASE,
295 .regs_otg = EXYNOS4X12_USBOTG_BASE,
296 .usb_phy_ctrl = EXYNOS4X12_USBPHY_CONTROL,
297 .usb_flags = PHY0_SLEEP,
298};
299
300int board_usb_init(int index, enum usb_init_type init)
301{
302 debug("USB_udc_probe\n");
303 return s3c_udc_probe(&s5pc210_otg_data);
304}
305
75504e95 306int g_dnl_board_usb_cable_connected(void)
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307{
308 struct pmic *muic = pmic_get("MAX77693_MUIC");
309 if (!muic)
310 return 0;
311
312 return !!muic->chrg->chrg_type(muic);
313}
314#endif
ab8efbb2 315
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316static int pmic_init_max77686(void)
317{
318 struct pmic *p = pmic_get("MAX77686_PMIC");
319
320 if (pmic_probe(p))
321 return -1;
322
323 /* BUCK/LDO Output Voltage */
324 max77686_set_ldo_voltage(p, 21, 2800000); /* LDO21 VTF_2.8V */
325 max77686_set_ldo_voltage(p, 23, 3300000); /* LDO23 TSP_AVDD_3.3V*/
326 max77686_set_ldo_voltage(p, 24, 1800000); /* LDO24 TSP_VDD_1.8V */
327
328 /* BUCK/LDO Output Mode */
329 max77686_set_buck_mode(p, 1, OPMODE_STANDBY); /* BUCK1 VMIF_1.1V_AP */
330 max77686_set_buck_mode(p, 2, OPMODE_ON); /* BUCK2 VARM_1.0V_AP */
331 max77686_set_buck_mode(p, 3, OPMODE_ON); /* BUCK3 VINT_1.0V_AP */
332 max77686_set_buck_mode(p, 4, OPMODE_ON); /* BUCK4 VG3D_1.0V_AP */
333 max77686_set_buck_mode(p, 5, OPMODE_ON); /* BUCK5 VMEM_1.2V_AP */
334 max77686_set_buck_mode(p, 6, OPMODE_ON); /* BUCK6 VCC_SUB_1.35V*/
335 max77686_set_buck_mode(p, 7, OPMODE_ON); /* BUCK7 VCC_SUB_2.0V */
336 max77686_set_buck_mode(p, 8, OPMODE_OFF); /* VMEM_VDDF_2.85V */
337 max77686_set_buck_mode(p, 9, OPMODE_OFF); /* CAM_ISP_CORE_1.2V*/
338
339 max77686_set_ldo_mode(p, 1, OPMODE_LPM); /* LDO1 VALIVE_1.0V_AP*/
340 max77686_set_ldo_mode(p, 2, OPMODE_STANDBY); /* LDO2 VM1M2_1.2V_AP */
341 max77686_set_ldo_mode(p, 3, OPMODE_LPM); /* LDO3 VCC_1.8V_AP */
342 max77686_set_ldo_mode(p, 4, OPMODE_LPM); /* LDO4 VCC_2.8V_AP */
343 max77686_set_ldo_mode(p, 5, OPMODE_OFF); /* LDO5_VCC_1.8V_IO */
344 max77686_set_ldo_mode(p, 6, OPMODE_STANDBY); /* LDO6 VMPLL_1.0V_AP */
345 max77686_set_ldo_mode(p, 7, OPMODE_STANDBY); /* LDO7 VPLL_1.0V_AP */
346 max77686_set_ldo_mode(p, 8, OPMODE_LPM); /* LDO8 VMIPI_1.0V_AP */
347 max77686_set_ldo_mode(p, 9, OPMODE_OFF); /* CAM_ISP_MIPI_1.2*/
348 max77686_set_ldo_mode(p, 10, OPMODE_LPM); /* LDO10 VMIPI_1.8V_AP*/
349 max77686_set_ldo_mode(p, 11, OPMODE_STANDBY); /* LDO11 VABB1_1.8V_AP*/
350 max77686_set_ldo_mode(p, 12, OPMODE_LPM); /* LDO12 VUOTG_3.0V_AP*/
351 max77686_set_ldo_mode(p, 13, OPMODE_OFF); /* LDO13 VC2C_1.8V_AP */
352 max77686_set_ldo_mode(p, 14, OPMODE_STANDBY); /* VABB02_1.8V_AP */
353 max77686_set_ldo_mode(p, 15, OPMODE_STANDBY); /* LDO15 VHSIC_1.0V_AP*/
354 max77686_set_ldo_mode(p, 16, OPMODE_STANDBY); /* LDO16 VHSIC_1.8V_AP*/
355 max77686_set_ldo_mode(p, 17, OPMODE_OFF); /* CAM_SENSOR_CORE_1.2*/
356 max77686_set_ldo_mode(p, 18, OPMODE_OFF); /* CAM_ISP_SEN_IO_1.8V*/
357 max77686_set_ldo_mode(p, 19, OPMODE_OFF); /* LDO19 VT_CAM_1.8V */
358 max77686_set_ldo_mode(p, 20, OPMODE_ON); /* LDO20 VDDQ_PRE_1.8V*/
359 max77686_set_ldo_mode(p, 21, OPMODE_OFF); /* LDO21 VTF_2.8V */
360 max77686_set_ldo_mode(p, 22, OPMODE_OFF); /* LDO22 VMEM_VDD_2.8V*/
361 max77686_set_ldo_mode(p, 23, OPMODE_OFF); /* LDO23 TSP_AVDD_3.3V*/
362 max77686_set_ldo_mode(p, 24, OPMODE_OFF); /* LDO24 TSP_VDD_1.8V */
363 max77686_set_ldo_mode(p, 25, OPMODE_OFF); /* LDO25 VCC_3.3V_LCD */
364 max77686_set_ldo_mode(p, 26, OPMODE_OFF); /*LDO26 VCC_3.0V_MOTOR*/
365
366 return 0;
367}
368
369/*
370 * LCD
371 */
372
373#ifdef CONFIG_LCD
1ecab0f3 374int mipi_power(void)
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375{
376 struct pmic *p = pmic_get("MAX77686_PMIC");
377
378 /* LDO8 VMIPI_1.0V_AP */
379 max77686_set_ldo_mode(p, 8, OPMODE_ON);
380 /* LDO10 VMIPI_1.8V_AP */
381 max77686_set_ldo_mode(p, 10, OPMODE_ON);
382
383 return 0;
384}
385
386void exynos_lcd_power_on(void)
387{
388 struct pmic *p = pmic_get("MAX77686_PMIC");
389
4d6c9671 390 /* LCD_2.2V_EN: GPC0[1] */
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391 gpio_set_pull(EXYNOS4X12_GPIO_C01, S5P_GPIO_PULL_UP);
392 gpio_direction_output(EXYNOS4X12_GPIO_C01, 1);
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393
394 /* LDO25 VCC_3.1V_LCD */
395 pmic_probe(p);
396 max77686_set_ldo_voltage(p, 25, 3100000);
397 max77686_set_ldo_mode(p, 25, OPMODE_LPM);
398}
399
400void exynos_reset_lcd(void)
401{
4d6c9671 402 /* reset lcd */
f6ae1ca0 403 gpio_direction_output(EXYNOS4X12_GPIO_F21, 0);
4d6c9671 404 udelay(10);
f6ae1ca0 405 gpio_set_value(EXYNOS4X12_GPIO_F21, 1);
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406}
407
1ecab0f3 408void exynos_lcd_misc_init(vidinfo_t *vid)
4d6c9671 409{
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410#ifdef CONFIG_TIZEN
411 get_tizen_logo_info(vid);
412#endif
1ecab0f3 413#ifdef CONFIG_S6E8AX0
4d6c9671 414 s6e8ax0_init();
f64236a9 415#endif
4d6c9671 416}
1ecab0f3 417#endif /* LCD */