[thirdparty/u-boot.git] / board / starfive / visionfive2 / starfive_visionfive2.c

// SPDX-License-Identifier: GPL-2.0+
/*
 * Copyright (C) 2022 StarFive Technology Co., Ltd.
 * Author: Yanhong Wang<yanhong.wang@starfivetech.com>
 */

#include <cpu_func.h>
#include <dm.h>
#include <fdt_support.h>
#include <env.h>
#include <log.h>
#include <asm/arch/eeprom.h>
#include <asm/io.h>
#include <asm/sections.h>
#include <linux/bitops.h>

DECLARE_GLOBAL_DATA_PTR;
#define JH7110_L2_PREFETCHER_BASE_ADDR		0x2030000
#define JH7110_L2_PREFETCHER_HART_OFFSET	0x2000
#define FDTFILE_MILK_V_MARS \
	"starfive/jh7110-milkv-mars.dtb"
#define FDTFILE_MILK_V_MARS_CM \
	"starfive/jh7110-milkv-mars-cm.dtb"
#define FDTFILE_MILK_V_MARS_CM_LITE \
	"starfive/jh7110-milkv-mars-cm-lite.dtb"
#define FDTFILE_VISIONFIVE2_1_2A \
	"starfive/jh7110-starfive-visionfive-2-v1.2a.dtb"
#define FDTFILE_VISIONFIVE2_1_3B \
	"starfive/jh7110-starfive-visionfive-2-v1.3b.dtb"

/* enable U74-mc hart1~hart4 prefetcher */
static void enable_prefetcher(void)
{
	u8 hart;
	u32 *reg;

	/* JH7110 use U74MC CORE IP, it include five cores(one S7 and four U7),
	 * but only U7 cores support prefetcher configuration
	 */
	for (hart = 1; hart < 5; hart++) {
		reg = (void *)(u64)(JH7110_L2_PREFETCHER_BASE_ADDR
					+ hart * JH7110_L2_PREFETCHER_HART_OFFSET);

		mb(); /* memory barrier */
		setbits_le32(reg, 0x1);
		mb(); /* memory barrier */
	}
}

/**
 * set_fdtfile() - set the $fdtfile variable based on the board revision
 */
static void set_fdtfile(void)
{
	u8 version;
	const char *fdtfile;
	const char *product_id;

	fdtfile = env_get("fdtfile");
	if (fdtfile)
		return;

	product_id = get_product_id_from_eeprom();
	if (!product_id) {
		log_err("Can't read EEPROM\n");
		return;
	}
	if (!strncmp(product_id, "MARC", 4)) {
		if (get_mmc_size_from_eeprom())
			fdtfile = FDTFILE_MILK_V_MARS_CM;
		else
			fdtfile = FDTFILE_MILK_V_MARS_CM_LITE;
	} else if (!strncmp(product_id, "MARS", 4)) {
		fdtfile = FDTFILE_MILK_V_MARS;
	} else if (!strncmp(product_id, "VF7110", 6)) {
		version = get_pcb_revision_from_eeprom();

		switch (version) {
		case 'a':
		case 'A':
			fdtfile = FDTFILE_VISIONFIVE2_1_2A;
			break;

		case 'b':
		case 'B':
		default:
			fdtfile = FDTFILE_VISIONFIVE2_1_3B;
			break;
		}
	} else {
		log_err("Unknown product\n");
		return;
	}

	env_set("fdtfile", fdtfile);
}

int board_init(void)
{
	enable_caches();
	enable_prefetcher();

	return 0;
}

int board_late_init(void)
{
	if (CONFIG_IS_ENABLED(ID_EEPROM))
		set_fdtfile();

	return 0;
}

void *board_fdt_blob_setup(int *err)
{
	*err = 0;
	if (IS_ENABLED(CONFIG_OF_SEPARATE) || IS_ENABLED(CONFIG_OF_BOARD)) {
		if (gd->arch.firmware_fdt_addr)
			return (ulong *)(uintptr_t)gd->arch.firmware_fdt_addr;
	}

	return (ulong *)_end;
}

int ft_board_setup(void *blob, struct bd_info *bd)
{
	return fdt_fixup_memory(blob, 0x40000000, gd->ram_size);
}
Commit	Line	Data
5ecf9b0b YW	1	// SPDX-License-Identifier: GPL-2.0+
	2	/*
	3	* Copyright (C) 2022 StarFive Technology Co., Ltd.
	4	* Author: Yanhong Wang<yanhong.wang@starfivetech.com>
	5	*/
	6
5ecf9b0b	7	#include <cpu_func.h>
99f3a43d	8	#include <dm.h>
43177705	9	#include <fdt_support.h>
16dbe3d9	10	#include <env.h>
0a8b83fb	11	#include <log.h>
16dbe3d9 HS	12	#include <asm/arch/eeprom.h>
	13	#include <asm/io.h>
	14	#include <asm/sections.h>
5ecf9b0b YW	15	#include <linux/bitops.h>
5ecf9b0b YW	16
43177705	17	DECLARE_GLOBAL_DATA_PTR;
5ecf9b0b YW	18	#define JH7110_L2_PREFETCHER_BASE_ADDR 0x2030000
5ecf9b0b YW	19	#define JH7110_L2_PREFETCHER_HART_OFFSET 0x2000
0a8b83fb HS	20	#define FDTFILE_MILK_V_MARS \
0a8b83fb HS	21	"starfive/jh7110-milkv-mars.dtb"
de322959 HS	22	#define FDTFILE_MILK_V_MARS_CM \
	23	"starfive/jh7110-milkv-mars-cm.dtb"
	24	#define FDTFILE_MILK_V_MARS_CM_LITE \
	25	"starfive/jh7110-milkv-mars-cm-lite.dtb"
16dbe3d9 HS	26	#define FDTFILE_VISIONFIVE2_1_2A \
	27	"starfive/jh7110-starfive-visionfive-2-v1.2a.dtb"
	28	#define FDTFILE_VISIONFIVE2_1_3B \
	29	"starfive/jh7110-starfive-visionfive-2-v1.3b.dtb"
5ecf9b0b YW	30
	31	/* enable U74-mc hart1~hart4 prefetcher */
	32	static void enable_prefetcher(void)
	33	{
	34	u8 hart;
	35	u32 *reg;
	36
	37	/* JH7110 use U74MC CORE IP, it include five cores(one S7 and four U7),
	38	* but only U7 cores support prefetcher configuration
	39	*/
	40	for (hart = 1; hart < 5; hart++) {
	41	reg = (void *)(u64)(JH7110_L2_PREFETCHER_BASE_ADDR
	42	+ hart * JH7110_L2_PREFETCHER_HART_OFFSET);
	43
	44	mb(); /* memory barrier */
	45	setbits_le32(reg, 0x1);
	46	mb(); /* memory barrier */
	47	}
	48	}
	49
16dbe3d9 HS	50	/**
	51	* set_fdtfile() - set the $fdtfile variable based on the board revision
	52	*/
	53	static void set_fdtfile(void)
	54	{
	55	u8 version;
	56	const char *fdtfile;
0a8b83fb	57	const char *product_id;
16dbe3d9	58
0f6310c7 HS	59	fdtfile = env_get("fdtfile");
	60	if (fdtfile)
	61	return;
	62
0a8b83fb HS	63	product_id = get_product_id_from_eeprom();
	64	if (!product_id) {
	65	log_err("Can't read EEPROM\n");
	66	return;
	67	}
de322959 HS	68	if (!strncmp(product_id, "MARC", 4)) {
	69	if (get_mmc_size_from_eeprom())
	70	fdtfile = FDTFILE_MILK_V_MARS_CM;
	71	else
	72	fdtfile = FDTFILE_MILK_V_MARS_CM_LITE;
	73	} else if (!strncmp(product_id, "MARS", 4)) {
0a8b83fb HS	74	fdtfile = FDTFILE_MILK_V_MARS;
	75	} else if (!strncmp(product_id, "VF7110", 6)) {
	76	version = get_pcb_revision_from_eeprom();
	77
	78	switch (version) {
	79	case 'a':
	80	case 'A':
	81	fdtfile = FDTFILE_VISIONFIVE2_1_2A;
	82	break;
	83
	84	case 'b':
	85	case 'B':
	86	default:
	87	fdtfile = FDTFILE_VISIONFIVE2_1_3B;
	88	break;
	89	}
	90	} else {
	91	log_err("Unknown product\n");
	92	return;
	93	}
16dbe3d9 HS	94
	95	env_set("fdtfile", fdtfile);
	96	}
	97
5ecf9b0b YW	98	int board_init(void)
	99	{
	100	enable_caches();
	101	enable_prefetcher();
	102
	103	return 0;
	104	}
99f3a43d	105
16dbe3d9 HS	106	int board_late_init(void)
	107	{
	108	if (CONFIG_IS_ENABLED(ID_EEPROM))
	109	set_fdtfile();
	110
	111	return 0;
	112	}
	113
99f3a43d YW	114	void board_fdt_blob_setup(int err)
	115	{
	116	*err = 0;
	117	if (IS_ENABLED(CONFIG_OF_SEPARATE) \|\| IS_ENABLED(CONFIG_OF_BOARD)) {
	118	if (gd->arch.firmware_fdt_addr)
	119	return (ulong *)(uintptr_t)gd->arch.firmware_fdt_addr;
	120	}
	121
ccea96f4	122	return (ulong *)_end;
99f3a43d	123	}
43177705 SQ	124
	125	int ft_board_setup(void blob, struct bd_info bd)
	126	{
	127	return fdt_fixup_memory(blob, 0x40000000, gd->ram_size);
	128	}