]> git.ipfire.org Git - thirdparty/u-boot.git/blame - board/ti/am335x/board.h
Revert "Merge patch series "arm: dts: am62-beagleplay: Fix Beagleplay Ethernet""
[thirdparty/u-boot.git] / board / ti / am335x / board.h
CommitLineData
83d290c5 1/* SPDX-License-Identifier: GPL-2.0+ */
e363426e
PK
2/*
3 * board.h
4 *
5 * TI AM335x boards information header
6 *
a94a4071 7 * Copyright (C) 2011, Texas Instruments, Incorporated - https://www.ti.com/
e363426e
PK
8 */
9
10#ifndef _BOARD_H_
11#define _BOARD_H_
12
8c17cbdf
JS
13/**
14 * AM335X (EMIF_4D) EMIF REG_COS_COUNT_1, REG_COS_COUNT_2, and
15 * REG_PR_OLD_COUNT values to avoid LCDC DMA FIFO underflows and Frame
16 * Synchronization Lost errors. The values are the biggest that work
17 * reliably with offered video modes and the memory subsystem on the
18 * boards. These register have are briefly documented in "7.3.3.5.2
19 * Command Starvation" section of AM335x TRM. The REG_COS_COUNT_1 and
20 * REG_COS_COUNT_2 do not have any effect on current versions of
21 * AM335x.
22 */
23#define EMIF_OCP_CONFIG_BEAGLEBONE_BLACK 0x00141414
24#define EMIF_OCP_CONFIG_AM335X_EVM 0x003d3d3d
25
770e68c0
NM
26static inline int board_is_bone(void)
27{
28 return board_ti_is("A335BONE");
29}
e363426e 30
770e68c0 31static inline int board_is_bone_lt(void)
ace4275e 32{
770e68c0 33 return board_ti_is("A335BNLT");
ace4275e
TR
34}
35
eff0c977
JK
36static inline int board_is_pb(void)
37{
38 return board_ti_is("A335PBGL");
39}
40
770e68c0 41static inline int board_is_bbg1(void)
ace4275e 42{
770e68c0 43 return board_is_bone_lt() && !strncmp(board_ti_get_rev(), "BBG1", 4);
ace4275e
TR
44}
45
ad6054f1
KK
46static inline int board_is_bben(void)
47{
48 return board_is_bone_lt() && !strncmp(board_ti_get_rev(), "SE", 2);
49}
50
9f7923c7
LV
51static inline int board_is_beaglebonex(void)
52{
ad6054f1
KK
53 return board_is_pb() || board_is_bone() || board_is_bone_lt() ||
54 board_is_bbg1() || board_is_bben();
9f7923c7
LV
55}
56
770e68c0 57static inline int board_is_evm_sk(void)
ace4275e 58{
770e68c0 59 return board_ti_is("A335X_SK");
ace4275e
TR
60}
61
770e68c0 62static inline int board_is_idk(void)
ace4275e 63{
770e68c0 64 return !strncmp(board_ti_get_config(), "SKU#02", 6);
ace4275e
TR
65}
66
770e68c0 67static inline int board_is_gp_evm(void)
ace4275e 68{
770e68c0 69 return board_ti_is("A33515BB");
ace4275e
TR
70}
71
770e68c0 72static inline int board_is_evm_15_or_later(void)
ace4275e 73{
770e68c0
NM
74 return (board_is_gp_evm() &&
75 strncmp("1.5", board_ti_get_rev(), 3) <= 0);
ace4275e
TR
76}
77
a9643324
LV
78static inline int board_is_icev2(void)
79{
80 return board_ti_is("A335_ICE") && !strncmp("2", board_ti_get_rev(), 1);
81}
82
e363426e
PK
83/*
84 * We have three pin mux functions that must exist. We must be able to enable
85 * uart0, for initial output and i2c0 to read the main EEPROM. We then have a
86 * main pinmux function that can be overridden to enable all other pinmux that
87 * is required on the board.
88 */
89void enable_uart0_pin_mux(void);
6422b70b
AB
90void enable_uart1_pin_mux(void);
91void enable_uart2_pin_mux(void);
92void enable_uart3_pin_mux(void);
93void enable_uart4_pin_mux(void);
94void enable_uart5_pin_mux(void);
e363426e 95void enable_i2c0_pin_mux(void);
d705527a 96void enable_i2c2_pin_mux(void);
770e68c0 97void enable_board_pin_mux(void);
e363426e 98#endif