[people/ms/u-boot.git] / board / ti / beagle / beagle.c

/*
 * (C) Copyright 2004-2011
 * Texas Instruments, <www.ti.com>
 *
 * Author :
 *	Sunil Kumar <sunilsaini05@gmail.com>
 *	Shashi Ranjan <shashiranjanmca05@gmail.com>
 *
 * Derived from Beagle Board and 3430 SDP code by
 *	Richard Woodruff <r-woodruff2@ti.com>
 *	Syed Mohammed Khasim <khasim@ti.com>
 *
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */
#include <common.h>
#include <dm.h>
#include <ns16550.h>
#ifdef CONFIG_LED_STATUS
#include <status_led.h>
#endif
#include <twl4030.h>
#include <linux/mtd/rawnand.h>
#include <asm/io.h>
#include <asm/arch/mmc_host_def.h>
#include <asm/arch/mux.h>
#include <asm/arch/mem.h>
#include <asm/arch/sys_proto.h>
#include <asm/gpio.h>
#include <asm/mach-types.h>
#include <asm/omap_musb.h>
#include <linux/errno.h>
#include <linux/usb/ch9.h>
#include <linux/usb/gadget.h>
#include <linux/usb/musb.h>
#include "beagle.h"
#include <command.h>

#ifdef CONFIG_USB_EHCI_HCD
#include <usb.h>
#include <asm/ehci-omap.h>
#endif

#define TWL4030_I2C_BUS			0
#define EXPANSION_EEPROM_I2C_BUS	1
#define EXPANSION_EEPROM_I2C_ADDRESS	0x50

#define TINCANTOOLS_ZIPPY		0x01000100
#define TINCANTOOLS_ZIPPY2		0x02000100
#define TINCANTOOLS_TRAINER		0x04000100
#define TINCANTOOLS_SHOWDOG		0x03000100
#define KBADC_BEAGLEFPGA		0x01000600
#define LW_BEAGLETOUCH			0x01000700
#define BRAINMUX_LCDOG			0x01000800
#define BRAINMUX_LCDOGTOUCH		0x02000800
#define BBTOYS_WIFI			0x01000B00
#define BBTOYS_VGA			0x02000B00
#define BBTOYS_LCD			0x03000B00
#define BCT_BRETTL3			0x01000F00
#define BCT_BRETTL4			0x02000F00
#define LSR_COM6L_ADPT			0x01001300
#define BEAGLE_NO_EEPROM		0xffffffff

DECLARE_GLOBAL_DATA_PTR;

static struct {
	unsigned int device_vendor;
	unsigned char revision;
	unsigned char content;
	char fab_revision[8];
	char env_var[16];
	char env_setting[64];
} expansion_config;

static const struct ns16550_platdata beagle_serial = {
	.base = OMAP34XX_UART3,
	.reg_shift = 2,
	.clock = V_NS16550_CLK,
	.fcr = UART_FCR_DEFVAL,
};

U_BOOT_DEVICE(beagle_uart) = {
	"ns16550_serial",
	&beagle_serial
};

/*
 * Routine: board_init
 * Description: Early hardware init.
 */
int board_init(void)
{
	gpmc_init(); /* in SRAM or SDRAM, finish GPMC */
	/* board id for Linux */
	gd->bd->bi_arch_number = MACH_TYPE_OMAP3_BEAGLE;
	/* boot param addr */
	gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100);

#if defined(CONFIG_LED_STATUS) && defined(CONFIG_LED_STATUS_BOOT_ENABLE)
	status_led_set(CONFIG_LED_STATUS_BOOT, CONFIG_LED_STATUS_ON);
#endif

	return 0;
}

/*
 * Routine: get_board_revision
 * Description: Detect if we are running on a Beagle revision Ax/Bx,
 *		C1/2/3, C4, xM Ax/Bx or xM Cx. This can be done by reading
 *		the level of GPIO173, GPIO172 and GPIO171. This should
 *		result in
 *		GPIO173, GPIO172, GPIO171: 1 1 1 => Ax/Bx
 *		GPIO173, GPIO172, GPIO171: 1 1 0 => C1/2/3
 *		GPIO173, GPIO172, GPIO171: 1 0 1 => C4
 *		GPIO173, GPIO172, GPIO171: 0 1 0 => xM Cx
 *		GPIO173, GPIO172, GPIO171: 0 0 0 => xM Ax/Bx
 */
static int get_board_revision(void)
{
	static int revision = -1;

	if (revision == -1) {
		if (!gpio_request(171, "rev0") &&
		    !gpio_request(172, "rev1") &&
		    !gpio_request(173, "rev2")) {
			gpio_direction_input(171);
			gpio_direction_input(172);
			gpio_direction_input(173);

			revision = gpio_get_value(173) << 2 |
				gpio_get_value(172) << 1 |
				gpio_get_value(171);
		} else {
			printf("Error: unable to acquire board revision GPIOs\n");
		}
	}

	return revision;
}

#ifdef CONFIG_SPL_BUILD
/*
 * Routine: get_board_mem_timings
 * Description: If we use SPL then there is no x-loader nor config header
 * so we have to setup the DDR timings ourself on both banks.
 */
void get_board_mem_timings(struct board_sdrc_timings *timings)
{
	int pop_mfr, pop_id;

	/*
	 * We need to identify what PoP memory is on the board so that
	 * we know what timings to use.  If we can't identify it then
	 * we know it's an xM.  To map the ID values please see nand_ids.c
	 */
	identify_nand_chip(&pop_mfr, &pop_id);

	timings->mr = MICRON_V_MR_165;
	switch (get_board_revision()) {
	case REVISION_C4:
		if (pop_mfr == NAND_MFR_STMICRO && pop_id == 0xba) {
			/* 512MB DDR */
			timings->mcfg = NUMONYX_V_MCFG_165(512 << 20);
			timings->ctrla = NUMONYX_V_ACTIMA_165;
			timings->ctrlb = NUMONYX_V_ACTIMB_165;
			timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz;
			break;
		} else if (pop_mfr == NAND_MFR_MICRON && pop_id == 0xba) {
			/* Beagleboard Rev C4, 512MB Nand/256MB DDR*/
			timings->mcfg = MICRON_V_MCFG_165(128 << 20);
			timings->ctrla = MICRON_V_ACTIMA_165;
			timings->ctrlb = MICRON_V_ACTIMB_165;
			timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz;
			break;
		} else if (pop_mfr == NAND_MFR_MICRON && pop_id == 0xbc) {
			/* Beagleboard Rev C5, 256MB DDR */
			timings->mcfg = MICRON_V_MCFG_200(256 << 20);
			timings->ctrla = MICRON_V_ACTIMA_200;
			timings->ctrlb = MICRON_V_ACTIMB_200;
			timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_200MHz;
			break;
		}
	case REVISION_XM_AB:
	case REVISION_XM_C:
		if (pop_mfr == 0) {
			/* 256MB DDR */
			timings->mcfg = MICRON_V_MCFG_200(256 << 20);
			timings->ctrla = MICRON_V_ACTIMA_200;
			timings->ctrlb = MICRON_V_ACTIMB_200;
			timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_200MHz;
		} else {
			/* 512MB DDR */
			timings->mcfg = NUMONYX_V_MCFG_165(512 << 20);
			timings->ctrla = NUMONYX_V_ACTIMA_165;
			timings->ctrlb = NUMONYX_V_ACTIMB_165;
			timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz;
		}
		break;
	default:
		/* Assume 128MB and Micron/165MHz timings to be safe */
		timings->mcfg = MICRON_V_MCFG_165(128 << 20);
		timings->ctrla = MICRON_V_ACTIMA_165;
		timings->ctrlb = MICRON_V_ACTIMB_165;
		timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz;
	}
}
#endif

/*
 * Routine: get_expansion_id
 * Description: This function checks for expansion board by checking I2C
 *		bus 1 for the availability of an AT24C01B serial EEPROM.
 *		returns the device_vendor field from the EEPROM
 */
static unsigned int get_expansion_id(void)
{
	i2c_set_bus_num(EXPANSION_EEPROM_I2C_BUS);

	/* return BEAGLE_NO_EEPROM if eeprom doesn't respond */
	if (i2c_probe(EXPANSION_EEPROM_I2C_ADDRESS) == 1) {
		i2c_set_bus_num(TWL4030_I2C_BUS);
		return BEAGLE_NO_EEPROM;
	}

	/* read configuration data */
	i2c_read(EXPANSION_EEPROM_I2C_ADDRESS, 0, 1, (u8 *)&expansion_config,
		 sizeof(expansion_config));

	/* retry reading configuration data with 16bit addressing */
	if ((expansion_config.device_vendor == 0xFFFFFF00) ||
	    (expansion_config.device_vendor == 0xFFFFFFFF)) {
		printf("EEPROM is blank or 8bit addressing failed: retrying with 16bit:\n");
		i2c_read(EXPANSION_EEPROM_I2C_ADDRESS, 0, 2, (u8 *)&expansion_config,
			 sizeof(expansion_config));
	}

	i2c_set_bus_num(TWL4030_I2C_BUS);

	return expansion_config.device_vendor;
}

#ifdef CONFIG_VIDEO_OMAP3
/*
 * Configure DSS to display background color on DVID
 * Configure VENC to display color bar on S-Video
 */
static void beagle_display_init(void)
{
	omap3_dss_venc_config(&venc_config_std_tv, VENC_HEIGHT, VENC_WIDTH);
	switch (get_board_revision()) {
	case REVISION_AXBX:
	case REVISION_CX:
	case REVISION_C4:
		omap3_dss_panel_config(&dvid_cfg);
		break;
	case REVISION_XM_AB:
	case REVISION_XM_C:
	default:
		omap3_dss_panel_config(&dvid_cfg_xm);
		break;
	}
}

/*
 * Enable DVI power
 */
static void beagle_dvi_pup(void)
{
	uchar val;

	switch (get_board_revision()) {
	case REVISION_AXBX:
	case REVISION_CX:
	case REVISION_C4:
		gpio_request(170, "dvi");
		gpio_direction_output(170, 0);
		gpio_set_value(170, 1);
		break;
	case REVISION_XM_AB:
	case REVISION_XM_C:
	default:
		#define GPIODATADIR1 (TWL4030_BASEADD_GPIO+3)
		#define GPIODATAOUT1 (TWL4030_BASEADD_GPIO+6)

		i2c_read(TWL4030_CHIP_GPIO, GPIODATADIR1, 1, &val, 1);
		val |= 4;
		i2c_write(TWL4030_CHIP_GPIO, GPIODATADIR1, 1, &val, 1);

		i2c_read(TWL4030_CHIP_GPIO, GPIODATAOUT1, 1, &val, 1);
		val |= 4;
		i2c_write(TWL4030_CHIP_GPIO, GPIODATAOUT1, 1, &val, 1);
		break;
	}
}
#endif

#ifdef CONFIG_USB_MUSB_OMAP2PLUS
static struct musb_hdrc_config musb_config = {
	.multipoint     = 1,
	.dyn_fifo       = 1,
	.num_eps        = 16,
	.ram_bits       = 12,
};

static struct omap_musb_board_data musb_board_data = {
	.interface_type	= MUSB_INTERFACE_ULPI,
};

static struct musb_hdrc_platform_data musb_plat = {
#if defined(CONFIG_USB_MUSB_HOST)
	.mode           = MUSB_HOST,
#elif defined(CONFIG_USB_MUSB_GADGET)
	.mode		= MUSB_PERIPHERAL,
#else
#error "Please define either CONFIG_USB_MUSB_HOST or CONFIG_USB_MUSB_GADGET"
#endif
	.config         = &musb_config,
	.power          = 100,
	.platform_ops	= &omap2430_ops,
	.board_data	= &musb_board_data,
};
#endif

/*
 * Routine: misc_init_r
 * Description: Configure board specific parts
 */
int misc_init_r(void)
{
	struct gpio *gpio5_base = (struct gpio *)OMAP34XX_GPIO5_BASE;
	struct gpio *gpio6_base = (struct gpio *)OMAP34XX_GPIO6_BASE;
	struct control_prog_io *prog_io_base = (struct control_prog_io *)OMAP34XX_CTRL_BASE;
	bool generate_fake_mac = false;
	u32 value;

	/* Enable i2c2 pullup resisters */
	value = readl(&prog_io_base->io1);
	value &= ~(PRG_I2C2_PULLUPRESX);
	writel(value, &prog_io_base->io1);

	switch (get_board_revision()) {
	case REVISION_AXBX:
		printf("Beagle Rev Ax/Bx\n");
		env_set("beaglerev", "AxBx");
		break;
	case REVISION_CX:
		printf("Beagle Rev C1/C2/C3\n");
		env_set("beaglerev", "Cx");
		MUX_BEAGLE_C();
		break;
	case REVISION_C4:
		printf("Beagle Rev C4\n");
		env_set("beaglerev", "C4");
		MUX_BEAGLE_C();
		/* Set VAUX2 to 1.8V for EHCI PHY */
		twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VAUX2_DEDICATED,
					TWL4030_PM_RECEIVER_VAUX2_VSEL_18,
					TWL4030_PM_RECEIVER_VAUX2_DEV_GRP,
					TWL4030_PM_RECEIVER_DEV_GRP_P1);
		break;
	case REVISION_XM_AB:
		printf("Beagle xM Rev A/B\n");
		env_set("beaglerev", "xMAB");
		MUX_BEAGLE_XM();
		/* Set VAUX2 to 1.8V for EHCI PHY */
		twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VAUX2_DEDICATED,
					TWL4030_PM_RECEIVER_VAUX2_VSEL_18,
					TWL4030_PM_RECEIVER_VAUX2_DEV_GRP,
					TWL4030_PM_RECEIVER_DEV_GRP_P1);
		generate_fake_mac = true;
		break;
	case REVISION_XM_C:
		printf("Beagle xM Rev C\n");
		env_set("beaglerev", "xMC");
		MUX_BEAGLE_XM();
		/* Set VAUX2 to 1.8V for EHCI PHY */
		twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VAUX2_DEDICATED,
					TWL4030_PM_RECEIVER_VAUX2_VSEL_18,
					TWL4030_PM_RECEIVER_VAUX2_DEV_GRP,
					TWL4030_PM_RECEIVER_DEV_GRP_P1);
		generate_fake_mac = true;
		break;
	default:
		printf("Beagle unknown 0x%02x\n", get_board_revision());
		MUX_BEAGLE_XM();
		/* Set VAUX2 to 1.8V for EHCI PHY */
		twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VAUX2_DEDICATED,
					TWL4030_PM_RECEIVER_VAUX2_VSEL_18,
					TWL4030_PM_RECEIVER_VAUX2_DEV_GRP,
					TWL4030_PM_RECEIVER_DEV_GRP_P1);
		generate_fake_mac = true;
	}

	switch (get_expansion_id()) {
	case TINCANTOOLS_ZIPPY:
		printf("Recognized Tincantools Zippy board (rev %d %s)\n",
			expansion_config.revision,
			expansion_config.fab_revision);
		MUX_TINCANTOOLS_ZIPPY();
		env_set("buddy", "zippy");
		break;
	case TINCANTOOLS_ZIPPY2:
		printf("Recognized Tincantools Zippy2 board (rev %d %s)\n",
			expansion_config.revision,
			expansion_config.fab_revision);
		MUX_TINCANTOOLS_ZIPPY();
		env_set("buddy", "zippy2");
		break;
	case TINCANTOOLS_TRAINER:
		printf("Recognized Tincantools Trainer board (rev %d %s)\n",
			expansion_config.revision,
			expansion_config.fab_revision);
		MUX_TINCANTOOLS_ZIPPY();
		MUX_TINCANTOOLS_TRAINER();
		env_set("buddy", "trainer");
		break;
	case TINCANTOOLS_SHOWDOG:
		printf("Recognized Tincantools Showdow board (rev %d %s)\n",
			expansion_config.revision,
			expansion_config.fab_revision);
		/* Place holder for DSS2 definition for showdog lcd */
		env_set("defaultdisplay", "showdoglcd");
		env_set("buddy", "showdog");
		break;
	case KBADC_BEAGLEFPGA:
		printf("Recognized KBADC Beagle FPGA board\n");
		MUX_KBADC_BEAGLEFPGA();
		env_set("buddy", "beaglefpga");
		break;
	case LW_BEAGLETOUCH:
		printf("Recognized Liquidware BeagleTouch board\n");
		env_set("buddy", "beagletouch");
		break;
	case BRAINMUX_LCDOG:
		printf("Recognized Brainmux LCDog board\n");
		env_set("buddy", "lcdog");
		break;
	case BRAINMUX_LCDOGTOUCH:
		printf("Recognized Brainmux LCDog Touch board\n");
		env_set("buddy", "lcdogtouch");
		break;
	case BBTOYS_WIFI:
		printf("Recognized BeagleBoardToys WiFi board\n");
		MUX_BBTOYS_WIFI()
		env_set("buddy", "bbtoys-wifi");
		break;
	case BBTOYS_VGA:
		printf("Recognized BeagleBoardToys VGA board\n");
		break;
	case BBTOYS_LCD:
		printf("Recognized BeagleBoardToys LCD board\n");
		break;
	case BCT_BRETTL3:
		printf("Recognized bct electronic GmbH brettl3 board\n");
		break;
	case BCT_BRETTL4:
		printf("Recognized bct electronic GmbH brettl4 board\n");
		break;
	case LSR_COM6L_ADPT:
		printf("Recognized LSR COM6L Adapter Board\n");
		MUX_BBTOYS_WIFI()
		env_set("buddy", "lsr-com6l-adpt");
		break;
	case BEAGLE_NO_EEPROM:
		printf("No EEPROM on expansion board\n");
		env_set("buddy", "none");
		break;
	default:
		printf("Unrecognized expansion board: %x\n",
			expansion_config.device_vendor);
		env_set("buddy", "unknown");
	}

	if (expansion_config.content == 1)
		env_set(expansion_config.env_var, expansion_config.env_setting);

	twl4030_power_init();
	switch (get_board_revision()) {
	case REVISION_XM_AB:
		twl4030_led_init(TWL4030_LED_LEDEN_LEDBON);
		break;
	default:
		twl4030_led_init(TWL4030_LED_LEDEN_LEDAON | TWL4030_LED_LEDEN_LEDBON);
		break;
	}

	/* Set GPIO states before they are made outputs */
	writel(GPIO23 | GPIO10 | GPIO8 | GPIO2 | GPIO1,
		&gpio6_base->setdataout);
	writel(GPIO31 | GPIO30 | GPIO29 | GPIO28 | GPIO22 | GPIO21 |
		GPIO15 | GPIO14 | GPIO13 | GPIO12, &gpio5_base->setdataout);

	/* Configure GPIOs to output */
	writel(~(GPIO23 | GPIO10 | GPIO8 | GPIO2 | GPIO1), &gpio6_base->oe);
	writel(~(GPIO31 | GPIO30 | GPIO29 | GPIO28 | GPIO22 | GPIO21 |
		GPIO15 | GPIO14 | GPIO13 | GPIO12), &gpio5_base->oe);

	omap_die_id_display();

#ifdef CONFIG_VIDEO_OMAP3
	beagle_dvi_pup();
	beagle_display_init();
	omap3_dss_enable();
#endif

#ifdef CONFIG_USB_MUSB_OMAP2PLUS
	musb_register(&musb_plat, &musb_board_data, (void *)MUSB_BASE);
#endif

	if (generate_fake_mac)
		omap_die_id_usbethaddr();

	return 0;
}

/*
 * Routine: set_muxconf_regs
 * Description: Setting up the configuration Mux registers specific to the
 *		hardware. Many pins need to be moved from protect to primary
 *		mode.
 */
void set_muxconf_regs(void)
{
	MUX_BEAGLE();
}

#if defined(CONFIG_MMC)
int board_mmc_init(bd_t *bis)
{
	return omap_mmc_init(0, 0, 0, -1, -1);
}
#endif

#if defined(CONFIG_MMC)
void board_mmc_power_init(void)
{
	twl4030_power_mmc_init(0);
}
#endif

#if defined(CONFIG_USB_EHCI_HCD) && !defined(CONFIG_SPL_BUILD)
/* Call usb_stop() before starting the kernel */
void show_boot_progress(int val)
{
	if (val == BOOTSTAGE_ID_RUN_OS)
		usb_stop();
}

static struct omap_usbhs_board_data usbhs_bdata = {
	.port_mode[0] = OMAP_EHCI_PORT_MODE_PHY,
	.port_mode[1] = OMAP_EHCI_PORT_MODE_PHY,
	.port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED
};

int ehci_hcd_init(int index, enum usb_init_type init,
		struct ehci_hccr **hccr, struct ehci_hcor **hcor)
{
	return omap_ehci_hcd_init(index, &usbhs_bdata, hccr, hcor);
}

int ehci_hcd_stop(int index)
{
	return omap_ehci_hcd_stop();
}

#endif /* CONFIG_USB_EHCI_HCD */

#if defined(CONFIG_USB_ETHER) && defined(CONFIG_USB_MUSB_GADGET)
int board_eth_init(bd_t *bis)
{
	return usb_eth_initialize(bis);
}
#endif
Commit	Line	Data
f904cdbb	1	/*
75c57a35	2	* (C) Copyright 2004-2011
f904cdbb DB	3	* Texas Instruments, <www.ti.com>
	4	*
	5	* Author :
	6	* Sunil Kumar <sunilsaini05@gmail.com>
	7	* Shashi Ranjan <shashiranjanmca05@gmail.com>
	8	*
	9	* Derived from Beagle Board and 3430 SDP code by
	10	* Richard Woodruff <r-woodruff2@ti.com>
	11	* Syed Mohammed Khasim <khasim@ti.com>
	12	*
	13	*
1a459660	14	* SPDX-License-Identifier: GPL-2.0+
f904cdbb DB	15	*/
f904cdbb DB	16	#include <common.h>
b3f4ca11 SG	17	#include <dm.h>
b3f4ca11 SG	18	#include <ns16550.h>
2d8d190c	19	#ifdef CONFIG_LED_STATUS
70d8c944 JK	20	#include <status_led.h>
70d8c944 JK	21	#endif
2c155130	22	#include <twl4030.h>
6ae3900a	23	#include <linux/mtd/rawnand.h>
f904cdbb	24	#include <asm/io.h>
0cd31144	25	#include <asm/arch/mmc_host_def.h>
f904cdbb	26	#include <asm/arch/mux.h>
75c57a35	27	#include <asm/arch/mem.h>
f904cdbb	28	#include <asm/arch/sys_proto.h>
84c3b631	29	#include <asm/gpio.h>
f904cdbb	30	#include <asm/mach-types.h>
c642b151	31	#include <asm/omap_musb.h>
1221ce45	32	#include <linux/errno.h>
c642b151 IY	33	#include <linux/usb/ch9.h>
	34	#include <linux/usb/gadget.h>
	35	#include <linux/usb/musb.h>
f904cdbb	36	#include "beagle.h"
f835ea71	37	#include <command.h>
f904cdbb	38
8850c5d5	39	#ifdef CONFIG_USB_EHCI_HCD
43b62393 G	40	#include <usb.h>
	41	#include <asm/ehci-omap.h>
	42	#endif
	43
ca5f80ae KK	44	#define TWL4030_I2C_BUS 0
	45	#define EXPANSION_EEPROM_I2C_BUS 1
	46	#define EXPANSION_EEPROM_I2C_ADDRESS 0x50
	47
	48	#define TINCANTOOLS_ZIPPY 0x01000100
	49	#define TINCANTOOLS_ZIPPY2 0x02000100
	50	#define TINCANTOOLS_TRAINER 0x04000100
	51	#define TINCANTOOLS_SHOWDOG 0x03000100
	52	#define KBADC_BEAGLEFPGA 0x01000600
ee8485fd KK	53	#define LW_BEAGLETOUCH 0x01000700
	54	#define BRAINMUX_LCDOG 0x01000800
	55	#define BRAINMUX_LCDOGTOUCH 0x02000800
	56	#define BBTOYS_WIFI 0x01000B00
	57	#define BBTOYS_VGA 0x02000B00
	58	#define BBTOYS_LCD 0x03000B00
6cce5504	59	#define BCT_BRETTL3 0x01000F00
ef88e609	60	#define BCT_BRETTL4 0x02000F00
8a1f2dc0	61	#define LSR_COM6L_ADPT 0x01001300
ca5f80ae KK	62	#define BEAGLE_NO_EEPROM 0xffffffff
ca5f80ae KK	63
29565326 JR	64	DECLARE_GLOBAL_DATA_PTR;
29565326 JR	65
ca5f80ae KK	66	static struct {
	67	unsigned int device_vendor;
	68	unsigned char revision;
	69	unsigned char content;
	70	char fab_revision[8];
	71	char env_var[16];
	72	char env_setting[64];
	73	} expansion_config;
	74
b3f4ca11	75	static const struct ns16550_platdata beagle_serial = {
2f6ed3b8 AF	76	.base = OMAP34XX_UART3,
2f6ed3b8 AF	77	.reg_shift = 2,
17fa0326 HS	78	.clock = V_NS16550_CLK,
17fa0326 HS	79	.fcr = UART_FCR_DEFVAL,
b3f4ca11 SG	80	};
	81
	82	U_BOOT_DEVICE(beagle_uart) = {
c7b9686d	83	"ns16550_serial",
b3f4ca11 SG	84	&beagle_serial
	85	};
	86
58911517	87	/*
f904cdbb DB	88	* Routine: board_init
f904cdbb DB	89	* Description: Early hardware init.
58911517	90	*/
f904cdbb DB	91	int board_init(void)
f904cdbb DB	92	{
f904cdbb DB	93	gpmc_init(); /* in SRAM or SDRAM, finish GPMC */
	94	/* board id for Linux */
	95	gd->bd->bi_arch_number = MACH_TYPE_OMAP3_BEAGLE;
	96	/* boot param addr */
	97	gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100);
	98
2d8d190c UM	99	#if defined(CONFIG_LED_STATUS) && defined(CONFIG_LED_STATUS_BOOT_ENABLE)
2d8d190c UM	100	status_led_set(CONFIG_LED_STATUS_BOOT, CONFIG_LED_STATUS_ON);
70d8c944 JK	101	#endif
70d8c944 JK	102
f904cdbb DB	103	return 0;
	104	}
	105
58911517	106	/*
06b95bd5 SS	107	* Routine: get_board_revision
06b95bd5 SS	108	* Description: Detect if we are running on a Beagle revision Ax/Bx,
8ce4e5f9	109	* C1/2/3, C4, xM Ax/Bx or xM Cx. This can be done by reading
06b95bd5 SS	110	* the level of GPIO173, GPIO172 and GPIO171. This should
	111	* result in
	112	* GPIO173, GPIO172, GPIO171: 1 1 1 => Ax/Bx
	113	* GPIO173, GPIO172, GPIO171: 1 1 0 => C1/2/3
	114	* GPIO173, GPIO172, GPIO171: 1 0 1 => C4
8ce4e5f9 TR	115	* GPIO173, GPIO172, GPIO171: 0 1 0 => xM Cx
8ce4e5f9 TR	116	* GPIO173, GPIO172, GPIO171: 0 0 0 => xM Ax/Bx
58911517	117	*/
fff1a572	118	static int get_board_revision(void)
f956fd03	119	{
b3f4ca11	120	static int revision = -1;
f956fd03	121
b3f4ca11 SG	122	if (revision == -1) {
	123	if (!gpio_request(171, "rev0") &&
	124	!gpio_request(172, "rev1") &&
	125	!gpio_request(173, "rev2")) {
	126	gpio_direction_input(171);
	127	gpio_direction_input(172);
	128	gpio_direction_input(173);
718763c4	129
b3f4ca11 SG	130	revision = gpio_get_value(173) << 2 \|
	131	gpio_get_value(172) << 1 \|
	132	gpio_get_value(171);
	133	} else {
	134	printf("Error: unable to acquire board revision GPIOs\n");
	135	}
718763c4	136	}
f956fd03	137
06b95bd5	138	return revision;
f956fd03 DB	139	}
f956fd03 DB	140
75c57a35 TR	141	#ifdef CONFIG_SPL_BUILD
	142	/*
	143	* Routine: get_board_mem_timings
	144	* Description: If we use SPL then there is no x-loader nor config header
	145	* so we have to setup the DDR timings ourself on both banks.
	146	*/
8c4445d2	147	void get_board_mem_timings(struct board_sdrc_timings *timings)
75c57a35 TR	148	{
	149	int pop_mfr, pop_id;
	150
	151	/*
	152	* We need to identify what PoP memory is on the board so that
	153	* we know what timings to use. If we can't identify it then
	154	* we know it's an xM. To map the ID values please see nand_ids.c
	155	*/
	156	identify_nand_chip(&pop_mfr, &pop_id);
	157
8c4445d2	158	timings->mr = MICRON_V_MR_165;
75c57a35 TR	159	switch (get_board_revision()) {
	160	case REVISION_C4:
	161	if (pop_mfr == NAND_MFR_STMICRO && pop_id == 0xba) {
	162	/* 512MB DDR */
8c4445d2 PB	163	timings->mcfg = NUMONYX_V_MCFG_165(512 << 20);
	164	timings->ctrla = NUMONYX_V_ACTIMA_165;
	165	timings->ctrlb = NUMONYX_V_ACTIMB_165;
	166	timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz;
75c57a35	167	break;
223b8aa4	168	} else if (pop_mfr == NAND_MFR_MICRON && pop_id == 0xba) {
223b8aa4	169	/* Beagleboard Rev C4, 512MB Nand/256MB DDR*/
8c4445d2 PB	170	timings->mcfg = MICRON_V_MCFG_165(128 << 20);
	171	timings->ctrla = MICRON_V_ACTIMA_165;
	172	timings->ctrlb = MICRON_V_ACTIMB_165;
	173	timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz;
223b8aa4	174	break;
75c57a35 TR	175	} else if (pop_mfr == NAND_MFR_MICRON && pop_id == 0xbc) {
75c57a35 TR	176	/* Beagleboard Rev C5, 256MB DDR */
8c4445d2 PB	177	timings->mcfg = MICRON_V_MCFG_200(256 << 20);
	178	timings->ctrla = MICRON_V_ACTIMA_200;
	179	timings->ctrlb = MICRON_V_ACTIMB_200;
	180	timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_200MHz;
75c57a35 TR	181	break;
75c57a35 TR	182	}
af4d896f	183	case REVISION_XM_AB:
75c57a35 TR	184	case REVISION_XM_C:
	185	if (pop_mfr == 0) {
	186	/* 256MB DDR */
8c4445d2 PB	187	timings->mcfg = MICRON_V_MCFG_200(256 << 20);
	188	timings->ctrla = MICRON_V_ACTIMA_200;
	189	timings->ctrlb = MICRON_V_ACTIMB_200;
	190	timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_200MHz;
75c57a35 TR	191	} else {
75c57a35 TR	192	/* 512MB DDR */
8c4445d2 PB	193	timings->mcfg = NUMONYX_V_MCFG_165(512 << 20);
	194	timings->ctrla = NUMONYX_V_ACTIMA_165;
	195	timings->ctrlb = NUMONYX_V_ACTIMB_165;
	196	timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz;
75c57a35 TR	197	}
	198	break;
	199	default:
	200	/* Assume 128MB and Micron/165MHz timings to be safe */
8c4445d2 PB	201	timings->mcfg = MICRON_V_MCFG_165(128 << 20);
	202	timings->ctrla = MICRON_V_ACTIMA_165;
	203	timings->ctrlb = MICRON_V_ACTIMB_165;
	204	timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz;
75c57a35 TR	205	}
	206	}
	207	#endif
	208
ca5f80ae KK	209	/*
	210	* Routine: get_expansion_id
	211	* Description: This function checks for expansion board by checking I2C
	212	* bus 1 for the availability of an AT24C01B serial EEPROM.
	213	* returns the device_vendor field from the EEPROM
	214	*/
fff1a572	215	static unsigned int get_expansion_id(void)
ca5f80ae KK	216	{
	217	i2c_set_bus_num(EXPANSION_EEPROM_I2C_BUS);
	218
	219	/* return BEAGLE_NO_EEPROM if eeprom doesn't respond */
	220	if (i2c_probe(EXPANSION_EEPROM_I2C_ADDRESS) == 1) {
	221	i2c_set_bus_num(TWL4030_I2C_BUS);
	222	return BEAGLE_NO_EEPROM;
	223	}
	224
	225	/* read configuration data */
	226	i2c_read(EXPANSION_EEPROM_I2C_ADDRESS, 0, 1, (u8 *)&expansion_config,
	227	sizeof(expansion_config));
	228
ff229ecf	229	/* retry reading configuration data with 16bit addressing */
	230	if ((expansion_config.device_vendor == 0xFFFFFF00) \|\|
	231	(expansion_config.device_vendor == 0xFFFFFFFF)) {
	232	printf("EEPROM is blank or 8bit addressing failed: retrying with 16bit:\n");
	233	i2c_read(EXPANSION_EEPROM_I2C_ADDRESS, 0, 2, (u8 *)&expansion_config,
	234	sizeof(expansion_config));
	235	}
	236
ca5f80ae KK	237	i2c_set_bus_num(TWL4030_I2C_BUS);
	238
	239	return expansion_config.device_vendor;
	240	}
	241
2c30c184	242	#ifdef CONFIG_VIDEO_OMAP3
3f16ab91 JK	243	/*
	244	* Configure DSS to display background color on DVID
	245	* Configure VENC to display color bar on S-Video
	246	*/
fff1a572	247	static void beagle_display_init(void)
3f16ab91 JK	248	{
	249	omap3_dss_venc_config(&venc_config_std_tv, VENC_HEIGHT, VENC_WIDTH);
	250	switch (get_board_revision()) {
	251	case REVISION_AXBX:
	252	case REVISION_CX:
	253	case REVISION_C4:
	254	omap3_dss_panel_config(&dvid_cfg);
	255	break;
af4d896f	256	case REVISION_XM_AB:
3f16ab91 JK	257	case REVISION_XM_C:
	258	default:
	259	omap3_dss_panel_config(&dvid_cfg_xm);
	260	break;
	261	}
	262	}
	263
4258aa62 PM	264	/*
	265	* Enable DVI power
	266	*/
3fbc6931 AG	267	static void beagle_dvi_pup(void)
3fbc6931 AG	268	{
4258aa62 PM	269	uchar val;
	270
	271	switch (get_board_revision()) {
	272	case REVISION_AXBX:
	273	case REVISION_CX:
	274	case REVISION_C4:
b3f4ca11	275	gpio_request(170, "dvi");
4258aa62 PM	276	gpio_direction_output(170, 0);
	277	gpio_set_value(170, 1);
	278	break;
af4d896f	279	case REVISION_XM_AB:
4258aa62 PM	280	case REVISION_XM_C:
	281	default:
	282	#define GPIODATADIR1 (TWL4030_BASEADD_GPIO+3)
	283	#define GPIODATAOUT1 (TWL4030_BASEADD_GPIO+6)
	284
	285	i2c_read(TWL4030_CHIP_GPIO, GPIODATADIR1, 1, &val, 1);
	286	val \|= 4;
	287	i2c_write(TWL4030_CHIP_GPIO, GPIODATADIR1, 1, &val, 1);
	288
	289	i2c_read(TWL4030_CHIP_GPIO, GPIODATAOUT1, 1, &val, 1);
	290	val \|= 4;
	291	i2c_write(TWL4030_CHIP_GPIO, GPIODATAOUT1, 1, &val, 1);
	292	break;
	293	}
	294	}
2c30c184	295	#endif
4258aa62	296
c642b151 IY	297	#ifdef CONFIG_USB_MUSB_OMAP2PLUS
	298	static struct musb_hdrc_config musb_config = {
	299	.multipoint = 1,
	300	.dyn_fifo = 1,
	301	.num_eps = 16,
	302	.ram_bits = 12,
	303	};
	304
	305	static struct omap_musb_board_data musb_board_data = {
	306	.interface_type = MUSB_INTERFACE_ULPI,
	307	};
	308
	309	static struct musb_hdrc_platform_data musb_plat = {
95de1e2f	310	#if defined(CONFIG_USB_MUSB_HOST)
c642b151	311	.mode = MUSB_HOST,
95de1e2f	312	#elif defined(CONFIG_USB_MUSB_GADGET)
c642b151 IY	313	.mode = MUSB_PERIPHERAL,
c642b151 IY	314	#else
95de1e2f	315	#error "Please define either CONFIG_USB_MUSB_HOST or CONFIG_USB_MUSB_GADGET"
c642b151 IY	316	#endif
	317	.config = &musb_config,
	318	.power = 100,
	319	.platform_ops = &omap2430_ops,
	320	.board_data = &musb_board_data,
	321	};
	322	#endif
	323
58911517	324	/*
f904cdbb DB	325	* Routine: misc_init_r
f904cdbb DB	326	* Description: Configure board specific parts
58911517	327	*/
f904cdbb DB	328	int misc_init_r(void)
f904cdbb DB	329	{
97a099ea DB	330	struct gpio gpio5_base = (struct gpio )OMAP34XX_GPIO5_BASE;
97a099ea DB	331	struct gpio gpio6_base = (struct gpio )OMAP34XX_GPIO6_BASE;
f14a522a	332	struct control_prog_io prog_io_base = (struct control_prog_io )OMAP34XX_CTRL_BASE;
548a64d8	333	bool generate_fake_mac = false;
04e2a133	334	u32 value;
d4e53f06 SK	335
d4e53f06 SK	336	/* Enable i2c2 pullup resisters */
04e2a133 AK	337	value = readl(&prog_io_base->io1);
	338	value &= ~(PRG_I2C2_PULLUPRESX);
	339	writel(value, &prog_io_base->io1);
f904cdbb	340
06b95bd5 SS	341	switch (get_board_revision()) {
	342	case REVISION_AXBX:
	343	printf("Beagle Rev Ax/Bx\n");
382bee57	344	env_set("beaglerev", "AxBx");
06b95bd5 SS	345	break;
	346	case REVISION_CX:
	347	printf("Beagle Rev C1/C2/C3\n");
382bee57	348	env_set("beaglerev", "Cx");
06b95bd5 SS	349	MUX_BEAGLE_C();
	350	break;
	351	case REVISION_C4:
	352	printf("Beagle Rev C4\n");
382bee57	353	env_set("beaglerev", "C4");
06b95bd5 SS	354	MUX_BEAGLE_C();
06b95bd5 SS	355	/* Set VAUX2 to 1.8V for EHCI PHY */
08cbba2a SS	356	twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VAUX2_DEDICATED,
	357	TWL4030_PM_RECEIVER_VAUX2_VSEL_18,
	358	TWL4030_PM_RECEIVER_VAUX2_DEV_GRP,
	359	TWL4030_PM_RECEIVER_DEV_GRP_P1);
	360	break;
af4d896f NM	361	case REVISION_XM_AB:
af4d896f NM	362	printf("Beagle xM Rev A/B\n");
382bee57	363	env_set("beaglerev", "xMAB");
08cbba2a SS	364	MUX_BEAGLE_XM();
08cbba2a SS	365	/* Set VAUX2 to 1.8V for EHCI PHY */
1ffcb346 KK	366	twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VAUX2_DEDICATED,
	367	TWL4030_PM_RECEIVER_VAUX2_VSEL_18,
	368	TWL4030_PM_RECEIVER_VAUX2_DEV_GRP,
	369	TWL4030_PM_RECEIVER_DEV_GRP_P1);
548a64d8	370	generate_fake_mac = true;
1ffcb346 KK	371	break;
	372	case REVISION_XM_C:
	373	printf("Beagle xM Rev C\n");
382bee57	374	env_set("beaglerev", "xMC");
1ffcb346 KK	375	MUX_BEAGLE_XM();
1ffcb346 KK	376	/* Set VAUX2 to 1.8V for EHCI PHY */
06b95bd5 SS	377	twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VAUX2_DEDICATED,
	378	TWL4030_PM_RECEIVER_VAUX2_VSEL_18,
	379	TWL4030_PM_RECEIVER_VAUX2_DEV_GRP,
	380	TWL4030_PM_RECEIVER_DEV_GRP_P1);
548a64d8	381	generate_fake_mac = true;
06b95bd5 SS	382	break;
	383	default:
	384	printf("Beagle unknown 0x%02x\n", get_board_revision());
f6e593bb KK	385	MUX_BEAGLE_XM();
	386	/* Set VAUX2 to 1.8V for EHCI PHY */
	387	twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VAUX2_DEDICATED,
	388	TWL4030_PM_RECEIVER_VAUX2_VSEL_18,
	389	TWL4030_PM_RECEIVER_VAUX2_DEV_GRP,
	390	TWL4030_PM_RECEIVER_DEV_GRP_P1);
548a64d8	391	generate_fake_mac = true;
06b95bd5 SS	392	}
06b95bd5 SS	393
ca5f80ae KK	394	switch (get_expansion_id()) {
	395	case TINCANTOOLS_ZIPPY:
	396	printf("Recognized Tincantools Zippy board (rev %d %s)\n",
	397	expansion_config.revision,
	398	expansion_config.fab_revision);
	399	MUX_TINCANTOOLS_ZIPPY();
382bee57	400	env_set("buddy", "zippy");
ca5f80ae KK	401	break;
	402	case TINCANTOOLS_ZIPPY2:
	403	printf("Recognized Tincantools Zippy2 board (rev %d %s)\n",
	404	expansion_config.revision,
	405	expansion_config.fab_revision);
	406	MUX_TINCANTOOLS_ZIPPY();
382bee57	407	env_set("buddy", "zippy2");
ca5f80ae KK	408	break;
	409	case TINCANTOOLS_TRAINER:
	410	printf("Recognized Tincantools Trainer board (rev %d %s)\n",
	411	expansion_config.revision,
	412	expansion_config.fab_revision);
	413	MUX_TINCANTOOLS_ZIPPY();
	414	MUX_TINCANTOOLS_TRAINER();
382bee57	415	env_set("buddy", "trainer");
ca5f80ae KK	416	break;
	417	case TINCANTOOLS_SHOWDOG:
	418	printf("Recognized Tincantools Showdow board (rev %d %s)\n",
	419	expansion_config.revision,
	420	expansion_config.fab_revision);
	421	/* Place holder for DSS2 definition for showdog lcd */
382bee57 SG	422	env_set("defaultdisplay", "showdoglcd");
382bee57 SG	423	env_set("buddy", "showdog");
ca5f80ae KK	424	break;
	425	case KBADC_BEAGLEFPGA:
	426	printf("Recognized KBADC Beagle FPGA board\n");
	427	MUX_KBADC_BEAGLEFPGA();
382bee57	428	env_set("buddy", "beaglefpga");
ca5f80ae	429	break;
ee8485fd KK	430	case LW_BEAGLETOUCH:
ee8485fd KK	431	printf("Recognized Liquidware BeagleTouch board\n");
382bee57	432	env_set("buddy", "beagletouch");
ee8485fd KK	433	break;
	434	case BRAINMUX_LCDOG:
	435	printf("Recognized Brainmux LCDog board\n");
382bee57	436	env_set("buddy", "lcdog");
ee8485fd KK	437	break;
	438	case BRAINMUX_LCDOGTOUCH:
	439	printf("Recognized Brainmux LCDog Touch board\n");
382bee57	440	env_set("buddy", "lcdogtouch");
ee8485fd KK	441	break;
	442	case BBTOYS_WIFI:
	443	printf("Recognized BeagleBoardToys WiFi board\n");
	444	MUX_BBTOYS_WIFI()
382bee57	445	env_set("buddy", "bbtoys-wifi");
51855e89	446	break;
ee8485fd KK	447	case BBTOYS_VGA:
ee8485fd KK	448	printf("Recognized BeagleBoardToys VGA board\n");
51855e89	449	break;
ee8485fd KK	450	case BBTOYS_LCD:
ee8485fd KK	451	printf("Recognized BeagleBoardToys LCD board\n");
51855e89	452	break;
6cce5504	453	case BCT_BRETTL3:
ef88e609 PM	454	printf("Recognized bct electronic GmbH brettl3 board\n");
	455	break;
	456	case BCT_BRETTL4:
	457	printf("Recognized bct electronic GmbH brettl4 board\n");
	458	break;
8a1f2dc0	459	case LSR_COM6L_ADPT:
	460	printf("Recognized LSR COM6L Adapter Board\n");
	461	MUX_BBTOYS_WIFI()
382bee57	462	env_set("buddy", "lsr-com6l-adpt");
8a1f2dc0	463	break;
ca5f80ae KK	464	case BEAGLE_NO_EEPROM:
ca5f80ae KK	465	printf("No EEPROM on expansion board\n");
382bee57	466	env_set("buddy", "none");
ca5f80ae KK	467	break;
	468	default:
	469	printf("Unrecognized expansion board: %x\n",
	470	expansion_config.device_vendor);
382bee57	471	env_set("buddy", "unknown");
ca5f80ae KK	472	}
	473
	474	if (expansion_config.content == 1)
382bee57	475	env_set(expansion_config.env_var, expansion_config.env_setting);
ca5f80ae	476
2c155130	477	twl4030_power_init();
38a77c3a	478	switch (get_board_revision()) {
af4d896f	479	case REVISION_XM_AB:
38a77c3a CS	480	twl4030_led_init(TWL4030_LED_LEDEN_LEDBON);
	481	break;
	482	default:
	483	twl4030_led_init(TWL4030_LED_LEDEN_LEDAON \| TWL4030_LED_LEDEN_LEDBON);
	484	break;
	485	}
f904cdbb	486
52d82e40	487	/* Set GPIO states before they are made outputs */
f904cdbb DB	488	writel(GPIO23 \| GPIO10 \| GPIO8 \| GPIO2 \| GPIO1,
	489	&gpio6_base->setdataout);
	490	writel(GPIO31 \| GPIO30 \| GPIO29 \| GPIO28 \| GPIO22 \| GPIO21 \|
	491	GPIO15 \| GPIO14 \| GPIO13 \| GPIO12, &gpio5_base->setdataout);
	492
52d82e40 BF	493	/* Configure GPIOs to output */
	494	writel(~(GPIO23 \| GPIO10 \| GPIO8 \| GPIO2 \| GPIO1), &gpio6_base->oe);
	495	writel(~(GPIO31 \| GPIO30 \| GPIO29 \| GPIO28 \| GPIO22 \| GPIO21 \|
	496	GPIO15 \| GPIO14 \| GPIO13 \| GPIO12), &gpio5_base->oe);
	497
679f82c3	498	omap_die_id_display();
4258aa62	499
2c30c184	500	#ifdef CONFIG_VIDEO_OMAP3
4258aa62	501	beagle_dvi_pup();
3f16ab91 JK	502	beagle_display_init();
3f16ab91 JK	503	omap3_dss_enable();
2c30c184	504	#endif
e6a6a704	505
c642b151 IY	506	#ifdef CONFIG_USB_MUSB_OMAP2PLUS
	507	musb_register(&musb_plat, &musb_board_data, (void *)MUSB_BASE);
	508	#endif
	509
07815eb9 PK	510	if (generate_fake_mac)
07815eb9 PK	511	omap_die_id_usbethaddr();
548a64d8	512
f904cdbb DB	513	return 0;
	514	}
	515
58911517	516	/*
f904cdbb DB	517	* Routine: set_muxconf_regs
	518	* Description: Setting up the configuration Mux registers specific to the
	519	* hardware. Many pins need to be moved from protect to primary
	520	* mode.
58911517	521	*/
f904cdbb DB	522	void set_muxconf_regs(void)
	523	{
	524	MUX_BEAGLE();
	525	}
0cd31144	526
4aa2ba3a	527	#if defined(CONFIG_MMC)
0cd31144 SS	528	int board_mmc_init(bd_t *bis)
0cd31144 SS	529	{
e3913f56	530	return omap_mmc_init(0, 0, 0, -1, -1);
0cd31144 SS	531	}
0cd31144 SS	532	#endif
d90859a6	533
4aa2ba3a	534	#if defined(CONFIG_MMC)
aac5450e PK	535	void board_mmc_power_init(void)
	536	{
	537	twl4030_power_mmc_init(0);
	538	}
	539	#endif
	540
8850c5d5	541	#if defined(CONFIG_USB_EHCI_HCD) && !defined(CONFIG_SPL_BUILD)
d90859a6 AH	542	/* Call usb_stop() before starting the kernel */
	543	void show_boot_progress(int val)
	544	{
578ac1e9	545	if (val == BOOTSTAGE_ID_RUN_OS)
d90859a6 AH	546	usb_stop();
d90859a6 AH	547	}
43b62393 G	548
	549	static struct omap_usbhs_board_data usbhs_bdata = {
	550	.port_mode[0] = OMAP_EHCI_PORT_MODE_PHY,
	551	.port_mode[1] = OMAP_EHCI_PORT_MODE_PHY,
	552	.port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED
	553	};
	554
127efc4f TK	555	int ehci_hcd_init(int index, enum usb_init_type init,
127efc4f TK	556	struct ehci_hccr hccr, struct ehci_hcor hcor)
43b62393	557	{
16297cfb	558	return omap_ehci_hcd_init(index, &usbhs_bdata, hccr, hcor);
43b62393 G	559	}
43b62393 G	560
676ae068	561	int ehci_hcd_stop(int index)
43b62393 G	562	{
	563	return omap_ehci_hcd_stop();
	564	}
	565
8850c5d5	566	#endif /* CONFIG_USB_EHCI_HCD */
c642b151	567
95de1e2f	568	#if defined(CONFIG_USB_ETHER) && defined(CONFIG_USB_MUSB_GADGET)
c642b151 IY	569	int board_eth_init(bd_t *bis)
	570	{
	571	return usb_eth_initialize(bis);
	572	}
	573	#endif