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7ce134b7 MZ |
1 | // SPDX-License-Identifier: GPL-2.0+ |
2 | /* | |
3 | * Copyright 2019 Toradex | |
4 | */ | |
5 | ||
6 | #include <common.h> | |
9a3b4ceb | 7 | #include <cpu_func.h> |
5255932f | 8 | #include <init.h> |
401d1c4f | 9 | #include <asm/global_data.h> |
7ce134b7 MZ |
10 | |
11 | #include <asm/arch/clock.h> | |
12 | #include <asm/arch/imx8-pins.h> | |
13 | #include <asm/arch/iomux.h> | |
14 | #include <asm/arch/sci/sci.h> | |
15 | #include <asm/arch/sys_proto.h> | |
16 | #include <asm/gpio.h> | |
17 | #include <asm/io.h> | |
9fb625ce | 18 | #include <env.h> |
7ce134b7 MZ |
19 | #include <errno.h> |
20 | #include <linux/libfdt.h> | |
21 | ||
22 | #include "../common/tdx-cfg-block.h" | |
23 | ||
24 | DECLARE_GLOBAL_DATA_PTR; | |
25 | ||
26 | #define UART_PAD_CTRL ((SC_PAD_CONFIG_OUT_IN << PADRING_CONFIG_SHIFT) | \ | |
27 | (SC_PAD_ISO_OFF << PADRING_LPCONFIG_SHIFT) | \ | |
28 | (SC_PAD_28FDSOI_DSE_DV_HIGH << PADRING_DSE_SHIFT) | \ | |
29 | (SC_PAD_28FDSOI_PS_PU << PADRING_PULL_SHIFT)) | |
30 | ||
31 | static iomux_cfg_t uart3_pads[] = { | |
32 | SC_P_FLEXCAN2_RX | MUX_MODE_ALT(2) | MUX_PAD_CTRL(UART_PAD_CTRL), | |
33 | SC_P_FLEXCAN2_TX | MUX_MODE_ALT(2) | MUX_PAD_CTRL(UART_PAD_CTRL), | |
34 | /* Transceiver FORCEOFF# signal, mux to use pull-up */ | |
35 | SC_P_QSPI0B_DQS | MUX_MODE_ALT(4) | MUX_PAD_CTRL(UART_PAD_CTRL), | |
36 | }; | |
37 | ||
38 | static void setup_iomux_uart(void) | |
39 | { | |
40 | imx8_iomux_setup_multiple_pads(uart3_pads, ARRAY_SIZE(uart3_pads)); | |
41 | } | |
42 | ||
89f7d08b IO |
43 | void board_mem_get_layout(u64 *phys_sdram_1_start, |
44 | u64 *phys_sdram_1_size, | |
45 | u64 *phys_sdram_2_start, | |
46 | u64 *phys_sdram_2_size) | |
47 | { | |
48 | u32 is_dualx = 0, val = 0; | |
49 | sc_err_t scierr = sc_misc_otp_fuse_read(-1, 6, &val); | |
50 | ||
51 | if (scierr == SC_ERR_NONE) { | |
52 | /* DX has two A35 cores disabled */ | |
53 | is_dualx = (val & 0xf) != 0x0; | |
54 | } | |
55 | ||
56 | *phys_sdram_1_start = PHYS_SDRAM_1; | |
57 | if (is_dualx) | |
58 | /* Our DX based SKUs only have 1 GB RAM */ | |
59 | *phys_sdram_1_size = SZ_1G; | |
60 | else | |
61 | *phys_sdram_1_size = PHYS_SDRAM_1_SIZE; | |
62 | *phys_sdram_2_start = PHYS_SDRAM_2; | |
63 | *phys_sdram_2_size = PHYS_SDRAM_2_SIZE; | |
64 | } | |
65 | ||
7ce134b7 MZ |
66 | int board_early_init_f(void) |
67 | { | |
68 | sc_pm_clock_rate_t rate; | |
69 | sc_err_t err = 0; | |
70 | ||
71 | /* | |
72 | * This works around that having only UART3 up the baudrate is 1.2M | |
73 | * instead of 115.2k. Set UART0 clock root to 80 MHz | |
74 | */ | |
75 | rate = 80000000; | |
76 | err = sc_pm_set_clock_rate(-1, SC_R_UART_0, SC_PM_CLK_PER, &rate); | |
77 | if (err != SC_ERR_NONE) | |
78 | return 0; | |
79 | ||
64b5f469 AG |
80 | /* Set UART3 clock root to 80 MHz and enable it */ |
81 | rate = SC_80MHZ; | |
82 | err = sc_pm_setup_uart(SC_R_UART_3, rate); | |
7ce134b7 MZ |
83 | if (err != SC_ERR_NONE) |
84 | return 0; | |
85 | ||
86 | setup_iomux_uart(); | |
87 | ||
88 | return 0; | |
89 | } | |
90 | ||
91 | #if IS_ENABLED(CONFIG_DM_GPIO) | |
92 | static void board_gpio_init(void) | |
93 | { | |
94 | /* TODO */ | |
95 | } | |
96 | #else | |
97 | static inline void board_gpio_init(void) {} | |
98 | #endif | |
99 | ||
100 | #if IS_ENABLED(CONFIG_FEC_MXC) | |
101 | #include <miiphy.h> | |
102 | ||
103 | int board_phy_config(struct phy_device *phydev) | |
104 | { | |
105 | if (phydev->drv->config) | |
106 | phydev->drv->config(phydev); | |
107 | ||
108 | return 0; | |
109 | } | |
110 | #endif | |
111 | ||
7ce134b7 MZ |
112 | int checkboard(void) |
113 | { | |
114 | puts("Model: Toradex Colibri iMX8X\n"); | |
115 | ||
116 | build_info(); | |
117 | print_bootinfo(); | |
118 | ||
119 | return 0; | |
120 | } | |
121 | ||
122 | int board_init(void) | |
123 | { | |
124 | board_gpio_init(); | |
125 | ||
126 | return 0; | |
127 | } | |
128 | ||
7ce134b7 MZ |
129 | /* |
130 | * Board specific reset that is system reset. | |
131 | */ | |
35b65dd8 | 132 | void reset_cpu(void) |
7ce134b7 MZ |
133 | { |
134 | /* TODO */ | |
135 | } | |
136 | ||
137 | #if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) | |
b75d8dc5 | 138 | int ft_board_setup(void *blob, struct bd_info *bd) |
7ce134b7 MZ |
139 | { |
140 | return ft_common_board_setup(blob, bd); | |
141 | } | |
142 | #endif | |
143 | ||
144 | int board_mmc_get_env_dev(int devno) | |
145 | { | |
146 | return devno; | |
147 | } | |
148 | ||
149 | int board_late_init(void) | |
150 | { | |
151 | #ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG | |
152 | /* TODO move to common */ | |
153 | env_set("board_name", "Colibri iMX8QXP"); | |
154 | env_set("board_rev", "v1.0"); | |
155 | #endif | |
156 | ||
157 | return 0; | |
158 | } |