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83d290c5 | 1 | // SPDX-License-Identifier: GPL-2.0+ |
6bbda883 LS |
2 | /* |
3 | * Copyright (C) 2012 Lucas Stach | |
6bbda883 LS |
4 | */ |
5 | ||
d678a59d | 6 | #include <common.h> |
8f27bf11 | 7 | #include <env.h> |
c1d9020c | 8 | #include <fdt_support.h> |
691d719d | 9 | #include <init.h> |
f7ae49fc | 10 | #include <log.h> |
6bbda883 LS |
11 | #include <asm/arch/clock.h> |
12 | #include <asm/arch/funcmux.h> | |
13 | #include <asm/arch/pinmux.h> | |
a5825625 | 14 | #include <asm/arch-tegra/ap.h> |
6bbda883 | 15 | #include <asm/arch-tegra/board.h> |
a5825625 | 16 | #include <asm/arch-tegra/tegra.h> |
401d1c4f | 17 | #include <asm/global_data.h> |
d1db97aa | 18 | #include <asm/gpio.h> |
a5825625 | 19 | #include <asm/io.h> |
10ef82d3 | 20 | #include <i2c.h> |
b891d010 | 21 | #include <nand.h> |
c05ed00a | 22 | #include <linux/delay.h> |
37fa4125 | 23 | #include "../common/tdx-common.h" |
b891d010 MZ |
24 | |
25 | DECLARE_GLOBAL_DATA_PTR; | |
10ef82d3 MZ |
26 | |
27 | #define PMU_I2C_ADDRESS 0x34 | |
28 | #define MAX_I2C_RETRY 3 | |
29 | #define PMU_SUPPLYENE 0x14 | |
30 | #define PMU_SUPPLYENE_SYSINEN (1<<5) | |
31 | #define PMU_SUPPLYENE_EXITSLREQ (1<<1) | |
a5825625 MZ |
32 | |
33 | int arch_misc_init(void) | |
34 | { | |
10ef82d3 MZ |
35 | /* Disable PMIC sleep mode on low supply voltage */ |
36 | struct udevice *dev; | |
37 | u8 addr, data[1]; | |
38 | int err; | |
39 | ||
40 | err = i2c_get_chip_for_busnum(0, PMU_I2C_ADDRESS, 1, &dev); | |
41 | if (err) { | |
42 | debug("%s: Cannot find PMIC I2C chip\n", __func__); | |
43 | return err; | |
44 | } | |
45 | ||
46 | addr = PMU_SUPPLYENE; | |
47 | ||
48 | err = dm_i2c_read(dev, addr, data, 1); | |
49 | if (err) { | |
50 | debug("failed to get PMU_SUPPLYENE\n"); | |
51 | return err; | |
52 | } | |
53 | ||
54 | data[0] &= ~PMU_SUPPLYENE_SYSINEN; | |
55 | data[0] |= PMU_SUPPLYENE_EXITSLREQ; | |
56 | ||
57 | err = dm_i2c_write(dev, addr, data, 1); | |
58 | if (err) { | |
59 | debug("failed to set PMU_SUPPLYENE\n"); | |
60 | return err; | |
61 | } | |
62 | ||
b7b20670 MZ |
63 | /* make sure SODIMM pin 87 nRESET_OUT is released properly */ |
64 | pinmux_set_func(PMUX_PINGRP_ATA, PMUX_FUNC_GMI); | |
65 | ||
a5825625 MZ |
66 | if (readl(NV_PA_BASE_SRAM + NVBOOTINFOTABLE_BOOTTYPE) == |
67 | NVBOOTTYPE_RECOVERY) | |
68 | printf("USB recovery mode\n"); | |
69 | ||
70 | return 0; | |
71 | } | |
6bbda883 | 72 | |
37fa4125 | 73 | #if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) |
b75d8dc5 | 74 | int ft_board_setup(void *blob, struct bd_info *bd) |
37fa4125 | 75 | { |
8f27bf11 MZ |
76 | u8 enetaddr[6]; |
77 | ||
78 | /* MAC addr */ | |
79 | if (eth_env_get_enetaddr("ethaddr", enetaddr)) { | |
80 | int err = fdt_find_and_setprop(blob, | |
81 | "/usb@7d004000/ethernet@1", | |
82 | "local-mac-address", enetaddr, 6, 0); | |
83 | ||
84 | /* Older device trees might have used a different node name */ | |
85 | if (err < 0) | |
86 | err = fdt_find_and_setprop(blob, | |
87 | "/usb@7d004000/asix@1", | |
88 | "local-mac-address", enetaddr, 6, 0); | |
89 | ||
90 | if (err >= 0) | |
91 | puts(" MAC address updated...\n"); | |
92 | } | |
93 | ||
37fa4125 SA |
94 | return ft_common_board_setup(blob, bd); |
95 | } | |
96 | #endif | |
97 | ||
1d2c0506 | 98 | #ifdef CONFIG_MMC_SDHCI_TEGRA |
c9aa831e TW |
99 | /* |
100 | * Routine: pin_mux_mmc | |
101 | * Description: setup the pin muxes/tristate values for the SDMMC(s) | |
102 | */ | |
103 | void pin_mux_mmc(void) | |
6bbda883 LS |
104 | { |
105 | funcmux_select(PERIPH_ID_SDMMC4, FUNCMUX_SDMMC4_ATB_GMA_4_BIT); | |
70ad375e | 106 | pinmux_tristate_disable(PMUX_PINGRP_GMB); |
6bbda883 LS |
107 | } |
108 | #endif | |
d1db97aa MZ |
109 | |
110 | #ifdef CONFIG_TEGRA_NAND | |
111 | void pin_mux_nand(void) | |
112 | { | |
113 | funcmux_select(PERIPH_ID_NDFLASH, FUNCMUX_NDFLASH_KBC_8_BIT); | |
76a30fed MZ |
114 | |
115 | /* | |
116 | * configure pingroup ATC to something unrelated to | |
117 | * avoid ATC overriding KBC | |
118 | */ | |
119 | pinmux_set_func(PMUX_PINGRP_ATC, PMUX_FUNC_GMI); | |
d1db97aa MZ |
120 | } |
121 | #endif | |
122 | ||
123 | #ifdef CONFIG_USB_EHCI_TEGRA | |
124 | void pin_mux_usb(void) | |
125 | { | |
126 | /* module internal USB bus to connect ethernet chipset */ | |
127 | funcmux_select(PERIPH_ID_USB2, FUNCMUX_USB2_ULPI); | |
128 | ||
129 | /* ULPI reference clock output */ | |
130 | pinmux_set_func(PMUX_PINGRP_CDEV2, PMUX_FUNC_PLLP_OUT4); | |
131 | pinmux_tristate_disable(PMUX_PINGRP_CDEV2); | |
132 | ||
133 | /* PHY reset GPIO */ | |
134 | pinmux_tristate_disable(PMUX_PINGRP_UAC); | |
135 | ||
136 | /* VBus GPIO */ | |
137 | pinmux_tristate_disable(PMUX_PINGRP_DTE); | |
138 | ||
00a5270b | 139 | /* Reset ASIX using LAN_RESET */ |
01a97a11 SW |
140 | gpio_request(TEGRA_GPIO(V, 4), "LAN_RESET"); |
141 | gpio_direction_output(TEGRA_GPIO(V, 4), 0); | |
00a5270b MZ |
142 | pinmux_tristate_disable(PMUX_PINGRP_GPV); |
143 | udelay(5); | |
01a97a11 | 144 | gpio_set_value(TEGRA_GPIO(V, 4), 1); |
00a5270b MZ |
145 | |
146 | /* USBH_PEN: USB 1 aka Tegra USB port 3 VBus */ | |
d1db97aa MZ |
147 | pinmux_tristate_disable(PMUX_PINGRP_SPIG); |
148 | } | |
149 | #endif | |
b2ea19b5 | 150 | |
d2f90650 | 151 | #ifdef CONFIG_VIDEO_TEGRA20 |
b2ea19b5 MZ |
152 | /* |
153 | * Routine: pin_mux_display | |
154 | * Description: setup the pin muxes/tristate values for the LCD interface) | |
155 | */ | |
156 | void pin_mux_display(void) | |
157 | { | |
158 | /* | |
159 | * Manually untristate BL_ON (PT4 - SODIMM 71) as specified through | |
160 | * device-tree | |
161 | */ | |
162 | pinmux_tristate_disable(PMUX_PINGRP_DTA); | |
163 | ||
164 | pinmux_set_func(PMUX_PINGRP_SDC, PMUX_FUNC_PWM); | |
165 | pinmux_tristate_disable(PMUX_PINGRP_SDC); | |
166 | } | |
a3c90217 GS |
167 | |
168 | /* | |
169 | * Backlight off before OS handover | |
170 | */ | |
171 | void board_preboot_os(void) | |
172 | { | |
173 | gpio_request(TEGRA_GPIO(T, 4), "BL_ON"); | |
174 | gpio_direction_output(TEGRA_GPIO(T, 4), 0); | |
175 | } | |
b2ea19b5 | 176 | #endif |