[thirdparty/u-boot.git] / board / toradex / verdin-imx8mm / spl.c

// SPDX-License-Identifier: GPL-2.0+
/*
 * Copyright 2020 Toradex
 */

#include <common.h>
#include <command.h>
#include <image.h>
#include <init.h>
#include <log.h>
#include <asm/arch/clock.h>
#include <asm/arch/ddr.h>
#include <asm/arch/imx8mm_pins.h>
#include <asm/arch/sys_proto.h>
#include <asm/global_data.h>
#include <asm/io.h>
#include <asm/mach-imx/boot_mode.h>
#include <asm/mach-imx/iomux-v3.h>
#include <asm/sections.h>
#include <cpu_func.h>
#include <dm/device.h>
#include <dm/device-internal.h>
#include <dm/uclass.h>
#include <dm/uclass-internal.h>
#include <hang.h>
#include <i2c.h>
#include <power/pca9450.h>
#include <power/pmic.h>
#include <spl.h>

DECLARE_GLOBAL_DATA_PTR;

#define I2C_PMIC_BUS_ID        1

int spl_board_boot_device(enum boot_device boot_dev_spl)
{
	switch (boot_dev_spl) {
	case MMC1_BOOT: /* eMMC */
		return BOOT_DEVICE_MMC1;
	case SD2_BOOT: /* SD card */
	case MMC2_BOOT:
		return BOOT_DEVICE_MMC2;
	case USB_BOOT:
		return BOOT_DEVICE_BOARD;
	default:
		return BOOT_DEVICE_NONE;
	}
}

void spl_dram_init(void)
{
	ddr_init(&dram_timing);
}

void spl_board_init(void)
{
	arch_misc_init();
}

#ifdef CONFIG_SPL_LOAD_FIT
int board_fit_config_name_match(const char *name)
{
	/* Just empty function now - can't decide what to choose */
	debug("%s: %s\n", __func__, name);

	return 0;
}
#endif

__weak void board_early_init(void)
{
	init_uart_clk(0);
}

int power_init_board(void)
{
	struct udevice *dev;
	int ret;

	if (IS_ENABLED(CONFIG_SPL_DM_PMIC_PCA9450)) {
		ret = pmic_get("pmic@25", &dev);
		if (ret == -ENODEV) {
			puts("No pmic found\n");
			return ret;
		}

		if (ret != 0)
			return ret;

		/* BUCKxOUT_DVS0/1 control BUCK123 output, clear PRESET_EN */
		pmic_reg_write(dev, PCA9450_BUCK123_DVS, 0x29);

		/* increase VDD_DRAM to 0.975v for 1.5Ghz DDR */
		pmic_reg_write(dev, PCA9450_BUCK3OUT_DVS0, 0x1c);

		pmic_reg_write(dev, PCA9450_CONFIG2, 0x1);

		return 0;
	}

	return 0;
}

void board_init_f(ulong dummy)
{
	struct udevice *dev;
	int ret;

	arch_cpu_init();

	board_early_init();

	timer_init();

	/* Clear the BSS. */
	memset(__bss_start, 0, __bss_end - __bss_start);

	ret = spl_early_init();
	if (ret) {
		debug("spl_early_init() failed: %d\n", ret);
		hang();
	}

	ret = uclass_get_device_by_name(UCLASS_CLK,
					"clock-controller@30380000",
					&dev);
	if (ret < 0) {
		printf("Failed to find clock node. Check device tree\n");
		hang();
	}

	preloader_console_init();

	enable_tzc380();

	power_init_board();

	/* DDR initialization */
	spl_dram_init();

	board_init_r(NULL, 0);
}
Commit	Line	Data
14d5aeff IO	1	// SPDX-License-Identifier: GPL-2.0+
	2	/*
	3	* Copyright 2020 Toradex
	4	*/
	5
d678a59d	6	#include <common.h>
09140113	7	#include <command.h>
4d72caa5	8	#include <image.h>
691d719d	9	#include <init.h>
f7ae49fc	10	#include <log.h>
14d5aeff IO	11	#include <asm/arch/clock.h>
	12	#include <asm/arch/ddr.h>
	13	#include <asm/arch/imx8mm_pins.h>
	14	#include <asm/arch/sys_proto.h>
401d1c4f	15	#include <asm/global_data.h>
14d5aeff IO	16	#include <asm/io.h>
	17	#include <asm/mach-imx/boot_mode.h>
	18	#include <asm/mach-imx/iomux-v3.h>
506df9dc	19	#include <asm/sections.h>
14d5aeff IO	20	#include <cpu_func.h>
	21	#include <dm/device.h>
	22	#include <dm/device-internal.h>
	23	#include <dm/uclass.h>
	24	#include <dm/uclass-internal.h>
	25	#include <hang.h>
7d43807d	26	#include <i2c.h>
7d43807d	27	#include <power/pca9450.h>
14d5aeff IO	28	#include <power/pmic.h>
	29	#include <spl.h>
	30
	31	DECLARE_GLOBAL_DATA_PTR;
	32
7d43807d MK	33	#define I2C_PMIC_BUS_ID 1
7d43807d MK	34
14d5aeff IO	35	int spl_board_boot_device(enum boot_device boot_dev_spl)
	36	{
	37	switch (boot_dev_spl) {
cc34e9cb	38	case MMC1_BOOT: /* eMMC */
14d5aeff	39	return BOOT_DEVICE_MMC1;
cc34e9cb	40	case SD2_BOOT: /* SD card */
14d5aeff IO	41	case MMC2_BOOT:
14d5aeff IO	42	return BOOT_DEVICE_MMC2;
14d5aeff IO	43	case USB_BOOT:
	44	return BOOT_DEVICE_BOARD;
	45	default:
	46	return BOOT_DEVICE_NONE;
	47	}
	48	}
	49
	50	void spl_dram_init(void)
	51	{
	52	ddr_init(&dram_timing);
	53	}
	54
	55	void spl_board_init(void)
	56	{
1f908b18	57	arch_misc_init();
14d5aeff IO	58	}
	59
	60	#ifdef CONFIG_SPL_LOAD_FIT
	61	int board_fit_config_name_match(const char *name)
	62	{
	63	/* Just empty function now - can't decide what to choose */
	64	debug("%s: %s\n", __func__, name);
	65
	66	return 0;
	67	}
	68	#endif
	69
34694f1a	70	__weak void board_early_init(void)
14d5aeff	71	{
34694f1a	72	init_uart_clk(0);
14d5aeff IO	73	}
	74
	75	int power_init_board(void)
	76	{
	77	struct udevice *dev;
	78	int ret;
	79
7d43807d	80	if (IS_ENABLED(CONFIG_SPL_DM_PMIC_PCA9450)) {
a68bad0a	81	ret = pmic_get("pmic@25", &dev);
7d43807d MK	82	if (ret == -ENODEV) {
	83	puts("No pmic found\n");
	84	return ret;
	85	}
14d5aeff	86
7d43807d MK	87	if (ret != 0)
7d43807d MK	88	return ret;
14d5aeff	89
7d43807d MK	90	/* BUCKxOUT_DVS0/1 control BUCK123 output, clear PRESET_EN */
7d43807d MK	91	pmic_reg_write(dev, PCA9450_BUCK123_DVS, 0x29);
14d5aeff	92
7d43807d MK	93	/* increase VDD_DRAM to 0.975v for 1.5Ghz DDR */
7d43807d MK	94	pmic_reg_write(dev, PCA9450_BUCK3OUT_DVS0, 0x1c);
14d5aeff	95
b8eecbac MK	96	pmic_reg_write(dev, PCA9450_CONFIG2, 0x1);
b8eecbac MK	97
7d43807d MK	98	return 0;
7d43807d MK	99	}
14d5aeff IO	100
	101	return 0;
	102	}
	103
	104	void board_init_f(ulong dummy)
	105	{
	106	struct udevice *dev;
	107	int ret;
	108
	109	arch_cpu_init();
	110
34694f1a	111	board_early_init();
14d5aeff IO	112
	113	timer_init();
	114
14d5aeff IO	115	/* Clear the BSS. */
	116	memset(__bss_start, 0, __bss_end - __bss_start);
	117
	118	ret = spl_early_init();
	119	if (ret) {
	120	debug("spl_early_init() failed: %d\n", ret);
	121	hang();
	122	}
	123
	124	ret = uclass_get_device_by_name(UCLASS_CLK,
	125	"clock-controller@30380000",
	126	&dev);
	127	if (ret < 0) {
	128	printf("Failed to find clock node. Check device tree\n");
	129	hang();
	130	}
	131
c898b537 MZ	132	preloader_console_init();
c898b537 MZ	133
14d5aeff IO	134	enable_tzc380();
	135
	136	power_init_board();
	137
	138	/* DDR initialization */
	139	spl_dram_init();
	140
	141	board_init_r(NULL, 0);
	142	}