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MIPS: Split I & D cache line size config
[people/ms/u-boot.git] / board / tplink / wdr4300 / Kconfig
CommitLineData
400df309
MV
1if BOARD_TPLINK_WDR4300
2
3config SYS_VENDOR
4 default "tplink"
5
6config SYS_SOC
7 default "ath79"
8
9config SYS_BOARD
10 default "wdr4300"
11
12config SYS_CONFIG_NAME
13 default "tplink_wdr4300"
14
ec35e123
PB
15config SYS_TEXT_BASE
16 default 0xa1000000
17
ace3be4f
PB
18config SYS_DCACHE_SIZE
19 default 32768
20
37228621
PB
21config SYS_DCACHE_LINE_SIZE
22 default 32
23
ace3be4f
PB
24config SYS_ICACHE_SIZE
25 default 65536
26
37228621 27config SYS_ICACHE_LINE_SIZE
ace3be4f
PB
28 default 32
29
400df309 30endif