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c609719b WD |
1 | /* |
2 | * (C) Copyright 2001 | |
3 | * Wolfgang Denk, DENX Software Engineering -- wd@denx.de | |
4 | * | |
5 | * See file CREDITS for list of people who contributed to this | |
6 | * project. | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or | |
9 | * modify it under the terms of the GNU General Public License as | |
10 | * published by the Free Software Foundation; either version 2 of | |
11 | * the License, or (at your option) any later version. | |
12 | * | |
13 | * This program is distributed in the hope that it will be useful, | |
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | * GNU General Public License for more details. | |
17 | * | |
18 | * You should have received a copy of the GNU General Public License | |
19 | * along with this program; if not, write to the Free Software | |
20 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, | |
21 | * MA 02111-1307 USA | |
22 | */ | |
23 | ||
24 | /************************************************************************/ | |
25 | /* ** DEBUG SETTINGS */ | |
26 | /************************************************************************/ | |
27 | ||
28 | /* #define DEBUG */ | |
29 | ||
30 | /************************************************************************/ | |
31 | /* ** HEADER FILES */ | |
32 | /************************************************************************/ | |
33 | ||
34 | #include <config.h> | |
35 | #include <common.h> | |
36 | #include <version.h> | |
37 | #include <stdarg.h> | |
38 | #include <linux/types.h> | |
52cb4d4f | 39 | #include <stdio_dev.h> |
ac67804f | 40 | #include <asm/arch/s3c24x0_cpu.h> |
c609719b | 41 | |
d87080b7 WD |
42 | DECLARE_GLOBAL_DATA_PTR; |
43 | ||
c609719b WD |
44 | #ifdef CONFIG_VFD |
45 | ||
46 | /************************************************************************/ | |
47 | /* ** CONFIG STUFF -- should be moved to board config file */ | |
48 | /************************************************************************/ | |
49 | ||
50 | /************************************************************************/ | |
51 | ||
52 | #ifndef PAGE_SIZE | |
53 | #define PAGE_SIZE 4096 | |
54 | #endif | |
55 | ||
56 | #define ROT 0x09 | |
57 | #define BLAU 0x0C | |
58 | #define VIOLETT 0X0D | |
59 | ||
3bac3513 WD |
60 | /* MAGIC */ |
61 | #define FRAME_BUF_SIZE ((256*4*56)/8) | |
c609719b WD |
62 | #define frame_buf_offs 4 |
63 | ||
06d01dbe WD |
64 | /* defines for starting Timer3 as CPLD-Clk */ |
65 | #define START3 (1 << 16) | |
66 | #define UPDATE3 (1 << 17) | |
67 | #define INVERT3 (1 << 18) | |
68 | #define RELOAD3 (1 << 19) | |
69 | ||
70 | /* CPLD-Register for controlling vfd-blank-signal */ | |
71 | #define VFD_DISABLE (*(volatile uchar *)0x04038000=0x0000) | |
72 | #define VFD_ENABLE (*(volatile uchar *)0x04038000=0x0001) | |
73 | ||
6069ff26 WD |
74 | /* Supported VFD Types */ |
75 | #define VFD_TYPE_T119C 1 /* Noritake T119C VFD */ | |
76 | #define VFD_TYPE_MN11236 2 | |
77 | ||
06d01dbe WD |
78 | /*#define NEW_CPLD_CLK*/ |
79 | ||
80 | int vfd_board_id; | |
81 | ||
c609719b | 82 | /* taken from armboot/common/vfd.c */ |
6069ff26 | 83 | unsigned long adr_vfd_table[112][18][2][4][2]; |
c609719b WD |
84 | unsigned char bit_vfd_table[112][18][2][4][2]; |
85 | ||
86 | /* | |
87 | * initialize the values for the VFD-grid-control in the framebuffer | |
88 | */ | |
89 | void init_grid_ctrl(void) | |
90 | { | |
91 | ulong adr, grid_cycle; | |
92 | unsigned int bit, display; | |
93 | unsigned char temp, bit_nr; | |
94 | ||
6069ff26 WD |
95 | /* |
96 | * clear frame buffer (logical clear => set to "black") | |
97 | */ | |
06d01dbe | 98 | memset ((void *)(gd->fb_base), 0, FRAME_BUF_SIZE); |
6069ff26 WD |
99 | |
100 | switch (gd->vfd_type) { | |
101 | case VFD_TYPE_T119C: | |
102 | for (display=0; display<4; display++) { | |
103 | for(grid_cycle=0; grid_cycle<56; grid_cycle++) { | |
104 | bit = grid_cycle * 256 * 4 + | |
105 | (grid_cycle + 200) * 4 + | |
106 | frame_buf_offs + display; | |
53677ef1 | 107 | /* wrap arround if offset (see manual S3C2400) */ |
3bac3513 WD |
108 | if (bit>=FRAME_BUF_SIZE*8) |
109 | bit = bit - (FRAME_BUF_SIZE * 8); | |
1cb8e980 | 110 | adr = gd->fb_base + (bit/32) * 4 + (3 - (bit%32) / 8); |
6069ff26 WD |
111 | bit_nr = bit % 8; |
112 | bit_nr = (bit_nr > 3) ? bit_nr-4 : bit_nr+4; | |
c609719b | 113 | temp=(*(volatile unsigned char*)(adr)); |
06d01dbe | 114 | temp |= (1<<bit_nr); |
c609719b WD |
115 | (*(volatile unsigned char*)(adr))=temp; |
116 | ||
117 | if(grid_cycle<55) | |
118 | bit = grid_cycle*256*4+(grid_cycle+201)*4+frame_buf_offs+display; | |
119 | else | |
53677ef1 | 120 | bit = grid_cycle*256*4+200*4+frame_buf_offs+display-4; /* grid nr. 0 */ |
c609719b | 121 | /* wrap arround if offset (see manual S3C2400) */ |
3bac3513 WD |
122 | if (bit>=FRAME_BUF_SIZE*8) |
123 | bit = bit-(FRAME_BUF_SIZE*8); | |
1cb8e980 | 124 | adr = gd->fb_base+(bit/32)*4+(3-(bit%32)/8); |
c609719b WD |
125 | bit_nr = bit%8; |
126 | bit_nr = (bit_nr>3)?bit_nr-4:bit_nr+4; | |
127 | temp=(*(volatile unsigned char*)(adr)); | |
06d01dbe | 128 | temp |= (1<<bit_nr); |
6069ff26 WD |
129 | (*(volatile unsigned char*)(adr))=temp; |
130 | } | |
131 | } | |
132 | break; | |
133 | case VFD_TYPE_MN11236: | |
134 | for (display=0; display<4; display++) { | |
135 | for (grid_cycle=0; grid_cycle<38; grid_cycle++) { | |
136 | bit = grid_cycle * 256 * 4 + | |
137 | (253 - grid_cycle) * 4 + | |
138 | frame_buf_offs + display; | |
139 | /* wrap arround if offset (see manual S3C2400) */ | |
3bac3513 WD |
140 | if (bit>=FRAME_BUF_SIZE*8) |
141 | bit = bit - (FRAME_BUF_SIZE * 8); | |
1cb8e980 | 142 | adr = gd->fb_base + (bit/32) * 4 + (3 - (bit%32) / 8); |
6069ff26 WD |
143 | bit_nr = bit % 8; |
144 | bit_nr = (bit_nr > 3) ? bit_nr-4 : bit_nr+4; | |
145 | temp=(*(volatile unsigned char*)(adr)); | |
06d01dbe | 146 | temp |= (1<<bit_nr); |
6069ff26 WD |
147 | (*(volatile unsigned char*)(adr))=temp; |
148 | ||
149 | if(grid_cycle<37) | |
150 | bit = grid_cycle*256*4+(252-grid_cycle)*4+frame_buf_offs+display; | |
151 | ||
152 | /* wrap arround if offset (see manual S3C2400) */ | |
3bac3513 WD |
153 | if (bit>=FRAME_BUF_SIZE*8) |
154 | bit = bit-(FRAME_BUF_SIZE*8); | |
1cb8e980 | 155 | adr = gd->fb_base+(bit/32)*4+(3-(bit%32)/8); |
6069ff26 WD |
156 | bit_nr = bit%8; |
157 | bit_nr = (bit_nr>3)?bit_nr-4:bit_nr+4; | |
158 | temp=(*(volatile unsigned char*)(adr)); | |
06d01dbe | 159 | temp |= (1<<bit_nr); |
c609719b WD |
160 | (*(volatile unsigned char*)(adr))=temp; |
161 | } | |
6069ff26 WD |
162 | } |
163 | break; | |
164 | default: | |
165 | printf ("Warning: unknown display type\n"); | |
166 | break; | |
c609719b WD |
167 | } |
168 | } | |
169 | ||
170 | /* | |
171 | *create translation table for getting easy the right position in the | |
172 | *physical framebuffer for some x/y-coordinates of the VFDs | |
173 | */ | |
174 | void create_vfd_table(void) | |
175 | { | |
6069ff26 WD |
176 | unsigned long vfd_table[112][18][2][4][2]; |
177 | unsigned int x, y, color, display, entry, pixel; | |
178 | unsigned int x_abcdef = 0; | |
179 | ||
180 | switch (gd->vfd_type) { | |
181 | case VFD_TYPE_T119C: | |
182 | for(y=0; y<=17; y++) { /* Line */ | |
183 | for(x=0; x<=111; x++) { /* Column */ | |
184 | for(display=0; display <=3; display++) { | |
185 | ||
186 | /* Display 0 blue pixels */ | |
187 | vfd_table[x][y][0][display][0] = | |
188 | (x==0) ? y*16+display | |
189 | : (x%4)*4+y*16+((x-1)/2)*1024+display; | |
190 | /* Display 0 red pixels */ | |
191 | vfd_table[x][y][1][display][0] = | |
192 | (x==0) ? y*16+512+display | |
53677ef1 | 193 | : (x%4)*4+y*16+((x-1)/2)*1024+512+display; |
6069ff26 WD |
194 | } |
195 | } | |
196 | } | |
197 | break; | |
198 | case VFD_TYPE_MN11236: | |
199 | for(y=0; y<=17; y++) { /* Line */ | |
200 | for(x=0; x<=111; x++) { /* Column */ | |
201 | for(display=0; display <=3; display++) { | |
202 | ||
203 | vfd_table[x][y][0][display][0]=0; | |
204 | vfd_table[x][y][0][display][1]=0; | |
205 | vfd_table[x][y][1][display][0]=0; | |
206 | vfd_table[x][y][1][display][1]=0; | |
207 | ||
208 | switch (x%6) { | |
209 | case 0: x_abcdef=0; break; /* a -> a */ | |
210 | case 1: x_abcdef=2; break; /* b -> c */ | |
211 | case 2: x_abcdef=4; break; /* c -> e */ | |
212 | case 3: x_abcdef=5; break; /* d -> f */ | |
213 | case 4: x_abcdef=3; break; /* e -> d */ | |
214 | case 5: x_abcdef=1; break; /* f -> b */ | |
215 | } | |
216 | ||
217 | /* blue pixels */ | |
218 | vfd_table[x][y][0][display][0] = | |
219 | (x>1) ? x_abcdef*4+((x-1)/3)*1024+y*48+display | |
220 | : x_abcdef*4+ 0+y*48+display; | |
221 | /* blue pixels */ | |
222 | if (x>1 && (x-1)%3) | |
223 | vfd_table[x][y][0][display][1] = x_abcdef*4+((x-1)/3+1)*1024+y*48+display; | |
224 | ||
225 | /* red pixels */ | |
226 | vfd_table[x][y][1][display][0] = | |
227 | (x>1) ? x_abcdef*4+24+((x-1)/3)*1024+y*48+display | |
228 | : x_abcdef*4+24+ 0+y*48+display; | |
229 | /* red pixels */ | |
230 | if (x>1 && (x-1)%3) | |
231 | vfd_table[x][y][1][display][1] = x_abcdef*4+24+((x-1)/3+1)*1024+y*48+display; | |
232 | } | |
c609719b | 233 | } |
6069ff26 WD |
234 | } |
235 | break; | |
236 | default: | |
237 | /* do nothing */ | |
238 | return; | |
c609719b WD |
239 | } |
240 | ||
241 | /* | |
c609719b WD |
242 | * Create table with entries for physical byte adresses and |
243 | * bit-number within the byte | |
244 | * from table with bit-numbers within the total framebuffer | |
245 | */ | |
6069ff26 WD |
246 | for(y=0;y<18;y++) { |
247 | for(x=0;x<112;x++) { | |
248 | for(color=0;color<2;color++) { | |
249 | for(display=0;display<4;display++) { | |
250 | for(entry=0;entry<2;entry++) { | |
1cb8e980 | 251 | unsigned long adr = gd->fb_base; |
6069ff26 | 252 | unsigned int bit_nr = 0; |
06d01dbe | 253 | |
d053ce62 WD |
254 | pixel = vfd_table[x][y][color][display][entry] + frame_buf_offs; |
255 | /* | |
256 | * wrap arround if offset | |
257 | * (see manual S3C2400) | |
258 | */ | |
259 | if (pixel>=FRAME_BUF_SIZE*8) | |
260 | pixel = pixel-(FRAME_BUF_SIZE*8); | |
261 | adr = gd->fb_base+(pixel/32)*4+(3-(pixel%32)/8); | |
262 | bit_nr = pixel%8; | |
263 | bit_nr = (bit_nr>3)?bit_nr-4:bit_nr+4; | |
264 | ||
6069ff26 WD |
265 | adr_vfd_table[x][y][color][display][entry] = adr; |
266 | bit_vfd_table[x][y][color][display][entry] = bit_nr; | |
c609719b | 267 | } |
6069ff26 | 268 | } |
c609719b | 269 | } |
6069ff26 | 270 | } |
c609719b WD |
271 | } |
272 | } | |
273 | ||
274 | /* | |
275 | * Set/clear pixel of the VFDs | |
276 | */ | |
6069ff26 WD |
277 | void set_vfd_pixel(unsigned char x, unsigned char y, |
278 | unsigned char color, unsigned char display, | |
279 | unsigned char value) | |
c609719b WD |
280 | { |
281 | ulong adr; | |
282 | unsigned char bit_nr, temp; | |
283 | ||
6069ff26 WD |
284 | if (! gd->vfd_type) { |
285 | /* Unknown type. */ | |
286 | return; | |
c609719b | 287 | } |
6069ff26 WD |
288 | |
289 | /* Pixel-Eintrag Nr. 1 */ | |
290 | adr = adr_vfd_table[x][y][color][display][0]; | |
291 | /* Pixel-Eintrag Nr. 1 */ | |
292 | bit_nr = bit_vfd_table[x][y][color][display][0]; | |
293 | temp=(*(volatile unsigned char*)(adr)); | |
294 | ||
06d01dbe WD |
295 | if (value) |
296 | temp |= (1<<bit_nr); | |
297 | else | |
298 | temp &= ~(1<<bit_nr); | |
299 | ||
6069ff26 | 300 | (*(volatile unsigned char*)(adr))=temp; |
c609719b WD |
301 | } |
302 | ||
303 | /* | |
304 | * transfer image from BMP-File | |
305 | */ | |
306 | void transfer_pic(int display, unsigned char *adr, int height, int width) | |
307 | { | |
308 | int x, y; | |
309 | unsigned char temp; | |
310 | ||
311 | for (; height > 0; height -= 18) | |
312 | { | |
313 | if (height > 18) | |
314 | y = 18; | |
315 | else | |
316 | y = height; | |
317 | for (; y > 0; y--) | |
318 | { | |
319 | for (x = 0; x < width; x += 2) | |
320 | { | |
321 | temp = *adr++; | |
322 | set_vfd_pixel(x, y-1, 0, display, 0); | |
323 | set_vfd_pixel(x, y-1, 1, display, 0); | |
324 | if ((temp >> 4) == BLAU) | |
325 | set_vfd_pixel(x, y-1, 0, display, 1); | |
326 | else if ((temp >> 4) == ROT) | |
327 | set_vfd_pixel(x, y-1, 1, display, 1); | |
328 | else if ((temp >> 4) == VIOLETT) | |
329 | { | |
330 | set_vfd_pixel(x, y-1, 0, display, 1); | |
331 | set_vfd_pixel(x, y-1, 1, display, 1); | |
332 | } | |
333 | set_vfd_pixel(x+1, y-1, 0, display, 0); | |
334 | set_vfd_pixel(x+1, y-1, 1, display, 0); | |
335 | if ((temp & 0x0F) == BLAU) | |
336 | set_vfd_pixel(x+1, y-1, 0, display, 1); | |
337 | else if ((temp & 0x0F) == ROT) | |
338 | set_vfd_pixel(x+1, y-1, 1, display, 1); | |
339 | else if ((temp & 0x0F) == VIOLETT) | |
340 | { | |
341 | set_vfd_pixel(x+1, y-1, 0, display, 1); | |
342 | set_vfd_pixel(x+1, y-1, 1, display, 1); | |
343 | } | |
344 | } | |
345 | } | |
c8c3a8be WD |
346 | if (display > 0) |
347 | display--; | |
348 | else | |
349 | display = 3; | |
c609719b WD |
350 | } |
351 | } | |
352 | ||
6069ff26 WD |
353 | /* |
354 | * This function initializes VFD clock that is needed for the CPLD that | |
355 | * manages the keyboard. | |
356 | */ | |
06d01dbe | 357 | int vfd_init_clocks (void) |
6069ff26 | 358 | { |
3e9a2992 WD |
359 | int i; |
360 | ||
eb0ae7f5 | 361 | struct s3c24x0_gpio * const gpio = s3c24x0_get_base_gpio(); |
362 | struct s3c24x0_timers * const timers = s3c24x0_get_base_timers(); | |
363 | struct s3c24x0_lcd * const lcd = s3c24x0_get_base_lcd(); | |
6069ff26 | 364 | |
06d01dbe WD |
365 | /* try to determine display type from the value |
366 | * defined by pull-ups | |
367 | */ | |
d9abba82 N |
368 | gpio->pcup = (gpio->pcup & 0xFFF0); /* activate GPC0...GPC3 pullups */ |
369 | gpio->pccon = (gpio->pccon & 0xFFFFFF00); /* cfg GPC0...GPC3 inputs */ | |
3e9a2992 WD |
370 | /* allow signals to settle */ |
371 | for (i=0; i<10000; i++) /* udelay isn't working yet at this point! */ | |
54e822f9 | 372 | __asm__("NOP"); |
d9abba82 | 373 | vfd_board_id = (~gpio->pcdat) & 0x000F; /* read GPC0...GPC3 port pins */ |
06d01dbe WD |
374 | |
375 | VFD_DISABLE; /* activate blank for the vfd */ | |
376 | ||
377 | #define NEW_CPLD_CLK | |
378 | ||
379 | #ifdef NEW_CPLD_CLK | |
380 | if (vfd_board_id) { | |
381 | /* If new board revision, then use PWM 3 as cpld-clock */ | |
382 | /* Enable 500 Hz timer for fill level sensor to operate properly */ | |
383 | /* Configure TOUT3 as functional pin, disable pull-up */ | |
d9abba82 N |
384 | gpio->pdcon &= ~0x30000; |
385 | gpio->pdcon |= 0x20000; | |
386 | gpio->pdup |= (1 << 8); | |
06d01dbe WD |
387 | |
388 | /* Configure the prescaler */ | |
d9abba82 N |
389 | timers->tcfg0 &= ~0xff00; |
390 | timers->tcfg0 |= 0x0f00; | |
06d01dbe WD |
391 | |
392 | /* Select MUX input (divider) for timer3 (1/16) */ | |
d9abba82 N |
393 | timers->tcfg1 &= ~0xf000; |
394 | timers->tcfg1 |= 0x3000; | |
06d01dbe WD |
395 | |
396 | /* Enable autoreload and set the counter and compare | |
397 | * registers to values for the 500 Hz clock | |
398 | * (for a given prescaler (15) and divider (16)): | |
399 | * counter = (66000000 / 500) >> 9; | |
400 | */ | |
d9abba82 N |
401 | timers->ch[3].tcntb = 0x101; |
402 | timers->ch[3].tcmpb = 0x101 / 2; | |
06d01dbe WD |
403 | |
404 | /* Start timer */ | |
d9abba82 N |
405 | timers->tcon = (timers->tcon | UPDATE3 | RELOAD3) & ~INVERT3; |
406 | timers->tcon = (timers->tcon | START3) & ~UPDATE3; | |
06d01dbe WD |
407 | } |
408 | #endif | |
409 | /* If old board revision, then use vm-signal as cpld-clock */ | |
d9abba82 N |
410 | lcd->lcdcon2 = 0x00FFC000; |
411 | lcd->lcdcon3 = 0x0007FF00; | |
412 | lcd->lcdcon4 = 0x00000000; | |
413 | lcd->lcdcon5 = 0x00000400; | |
414 | lcd->lcdcon1 = 0x00000B75; | |
06d01dbe | 415 | /* VM (GPD1) is used as clock for the CPLD */ |
d9abba82 | 416 | gpio->pdcon = (gpio->pdcon & 0xFFFFFFF3) | 0x00000008; |
1cb8e980 WD |
417 | |
418 | return 0; | |
6069ff26 WD |
419 | } |
420 | ||
c609719b WD |
421 | /* |
422 | * initialize LCD-Controller of the S3C2400 for using VFDs | |
1cb8e980 WD |
423 | * |
424 | * VFD detection depends on the board revision: | |
425 | * starting from Rev. 200 a type code can be read from the data pins, | |
426 | * driven by some pull-up resistors; all earlier systems must be | |
427 | * manually configured. The type is set in the "vfd_type" environment | |
428 | * variable. | |
c609719b WD |
429 | */ |
430 | int drv_vfd_init(void) | |
431 | { | |
eb0ae7f5 | 432 | struct s3c24x0_lcd * const lcd = s3c24x0_get_base_lcd(); |
433 | struct s3c24x0_gpio * const gpio = s3c24x0_get_base_gpio(); | |
6069ff26 | 434 | char *tmp; |
c609719b | 435 | ulong palette; |
a6c7ad2f | 436 | static int vfd_init_done = 0; |
06d01dbe | 437 | int vfd_inv_data = 0; |
c609719b | 438 | |
a6c7ad2f | 439 | if (vfd_init_done != 0) |
7c7a23bd | 440 | return (0); |
a6c7ad2f WD |
441 | vfd_init_done = 1; |
442 | ||
06d01dbe | 443 | debug("Detecting Revison of WA4-VFD: ID=0x%X\n", vfd_board_id); |
6069ff26 | 444 | |
06d01dbe | 445 | switch (vfd_board_id) { |
1cb8e980 | 446 | case 0: /* board revision < Rev.200 */ |
6069ff26 WD |
447 | if ((tmp = getenv ("vfd_type")) == NULL) { |
448 | break; | |
449 | } | |
450 | if (strcmp(tmp, "T119C") == 0) { | |
451 | gd->vfd_type = VFD_TYPE_T119C; | |
452 | } else if (strcmp(tmp, "MN11236") == 0) { | |
453 | gd->vfd_type = VFD_TYPE_MN11236; | |
454 | } else { | |
455 | /* cannot use printf for a warning here */ | |
456 | gd->vfd_type = 0; /* unknown */ | |
457 | } | |
6069ff26 WD |
458 | |
459 | break; | |
1cb8e980 | 460 | default: /* default to MN11236, data inverted */ |
6069ff26 | 461 | gd->vfd_type = VFD_TYPE_MN11236; |
06d01dbe | 462 | vfd_inv_data = 1; |
6069ff26 WD |
463 | setenv ("vfd_type", "MN11236"); |
464 | } | |
465 | debug ("VFD type: %s%s\n", | |
466 | (gd->vfd_type == VFD_TYPE_T119C) ? "T119C" : | |
467 | (gd->vfd_type == VFD_TYPE_MN11236) ? "MN11236" : | |
468 | "unknown", | |
06d01dbe | 469 | vfd_inv_data ? ", inverted data" : ""); |
6069ff26 | 470 | |
1cb8e980 | 471 | gd->fb_base = gd->fb_base; |
c609719b WD |
472 | create_vfd_table(); |
473 | init_grid_ctrl(); | |
474 | ||
6069ff26 WD |
475 | for (palette=0; palette < 16; palette++) |
476 | (*(volatile unsigned int*)(PALETTE+(palette*4)))=palette; | |
477 | for (palette=16; palette < 256; palette++) | |
478 | (*(volatile unsigned int*)(PALETTE+(palette*4)))=0x00; | |
479 | ||
c609719b WD |
480 | /* |
481 | * Hinweis: Der Framebuffer ist um genau ein Nibble verschoben | |
482 | * Das erste angezeigte Pixel wird aus dem zweiten Nibble geholt | |
483 | * das letzte angezeigte Pixel wird aus dem ersten Nibble geholt | |
484 | * (wrap around) | |
485 | * see manual S3C2400 | |
486 | */ | |
06d01dbe | 487 | /* Stopp LCD-Controller */ |
d9abba82 | 488 | lcd->lcdcon1 = 0x00000000; |
c609719b | 489 | /* frame buffer startadr */ |
d9abba82 | 490 | lcd->lcdsaddr1 = gd->fb_base >> 1; |
53677ef1 | 491 | /* frame buffer endadr */ |
d9abba82 N |
492 | lcd->lcdsaddr2 = (gd->fb_base + FRAME_BUF_SIZE) >> 1; |
493 | lcd->lcdsaddr3 = ((256/4)); | |
494 | lcd->lcdcon2 = 0x000DC000; | |
4a6fd34b | 495 | if(gd->vfd_type == VFD_TYPE_MN11236) |
d9abba82 | 496 | lcd->lcdcon2 = 37 << 14; /* MN11236: 38 lines */ |
4a6fd34b | 497 | else |
d9abba82 N |
498 | lcd->lcdcon2 = 55 << 14; /* T119C: 56 lines */ |
499 | lcd->lcdcon3 = 0x0051000A; | |
500 | lcd->lcdcon4 = 0x00000001; | |
06d01dbe | 501 | if (gd->vfd_type && vfd_inv_data) |
d9abba82 | 502 | lcd->lcdcon5 = 0x000004C0; |
06d01dbe | 503 | else |
d9abba82 | 504 | lcd->lcdcon5 = 0x00000440; |
06d01dbe WD |
505 | |
506 | /* Port pins as LCD output */ | |
d9abba82 N |
507 | gpio->pccon = (gpio->pccon & 0xFFFFFF00) | 0x000000AA; |
508 | gpio->pdcon = (gpio->pdcon & 0xFFFFFF03) | 0x000000A8; | |
06d01dbe WD |
509 | |
510 | /* Synchronize VFD enable with LCD controller to avoid flicker */ | |
d9abba82 N |
511 | lcd->lcdcon1 = 0x00000B75; /* Start LCD-Controller */ |
512 | while ((lcd->lcdcon5 & 0x180000) != 0x100000) /* Wait for VSYNC end */ | |
513 | ; | |
514 | while ((lcd->lcdcon5 & 0x060000) != 0x040000) /* Wait for next HSYNC */ | |
515 | ; | |
516 | while ((lcd->lcdcon5 & 0x060000) == 0x040000) | |
517 | ; | |
518 | while ((lcd->lcdcon5 & 0x060000) != 0x000000) | |
519 | ; | |
06d01dbe WD |
520 | if(gd->vfd_type) |
521 | VFD_ENABLE; | |
c609719b | 522 | |
d9abba82 N |
523 | debug("LCDSADDR1: %lX\n", lcd->lcdsaddr1); |
524 | debug("LCDSADDR2: %lX\n", lcd->lcdsaddr2); | |
525 | debug("LCDSADDR3: %lX\n", lcd->lcdsaddr3); | |
c609719b | 526 | |
c609719b WD |
527 | return 0; |
528 | } | |
529 | ||
06d01dbe WD |
530 | /* |
531 | * Disable VFD: should be run before resetting the system: | |
532 | * disable VM, enable pull-up | |
533 | */ | |
534 | void disable_vfd (void) | |
535 | { | |
eb0ae7f5 | 536 | struct s3c24x0_gpio * const gpio = s3c24x0_get_base_gpio(); |
48b42616 | 537 | |
06d01dbe | 538 | VFD_DISABLE; |
d9abba82 N |
539 | gpio->pdcon &= ~0xC; |
540 | gpio->pdup &= ~0x2; | |
06d01dbe WD |
541 | } |
542 | ||
c609719b WD |
543 | /************************************************************************/ |
544 | /* ** ROM capable initialization part - needed to reserve FB memory */ | |
545 | /************************************************************************/ | |
546 | ||
547 | /* | |
548 | * This is called early in the system initialization to grab memory | |
549 | * for the VFD controller. | |
550 | * | |
551 | * Note that this is running from ROM, so no write access to global data. | |
552 | */ | |
553 | ulong vfd_setmem (ulong addr) | |
554 | { | |
555 | ulong size; | |
556 | ||
c609719b | 557 | /* Round up to nearest full page */ |
3bac3513 | 558 | size = (FRAME_BUF_SIZE + (PAGE_SIZE - 1)) & ~(PAGE_SIZE - 1); |
c609719b WD |
559 | |
560 | debug ("Reserving %ldk for VFD Framebuffer at: %08lx\n", size>>10, addr); | |
561 | ||
562 | return (size); | |
563 | } | |
564 | ||
f325e18b WD |
565 | /* |
566 | * Calculate fb size for VIDEOLFB_ATAG. Size returned contains fb, | |
567 | * descriptors and palette areas. | |
568 | */ | |
569 | ulong calc_fbsize (void) | |
570 | { | |
571 | return FRAME_BUF_SIZE; | |
572 | } | |
573 | ||
c609719b | 574 | #endif /* CONFIG_VFD */ |