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PXA: pxa-regs.h cleanup
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1/*
2 * (C) Copyright 2007
3 * Stefano Babic, DENX Gmbh, sbabic@denx.de
4 *
5 * (C) Copyright 2004
6 * Robert Whaley, Applied Data Systems, Inc. rwhaley@applieddata.net
7 *
8 * (C) Copyright 2002
9 * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net
10 *
11 * (C) Copyright 2002
12 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
13 * Marius Groeger <mgroeger@sysgo.de>
14 *
15 * See file CREDITS for list of people who contributed to this
16 * project.
17 *
18 * This program is free software; you can redistribute it and/or
19 * modify it under the terms of the GNU General Public License as
20 * published by the Free Software Foundation; either version 2 of
21 * the License, or (at your option) any later version.
22 *
23 * This program is distributed in the hope that it will be useful,
24 * but WITHOUT ANY WARRANTY; without even the implied warranty of
25 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
26 * GNU General Public License for more details.
27 *
28 * You should have received a copy of the GNU General Public License
29 * along with this program; if not, write to the Free Software
30 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
31 * MA 02111-1307 USA
32 */
33
34#include <common.h>
35#include <asm/arch/pxa-regs.h>
60f61e6d 36#include <netdev.h>
3ba8bf7c 37#include <asm/io.h>
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38
39DECLARE_GLOBAL_DATA_PTR;
40
41#define RH_A_PSM (1 << 8) /* power switching mode */
42#define RH_A_NPS (1 << 9) /* no power switching */
43
44extern struct serial_device serial_ffuart_device;
45extern struct serial_device serial_btuart_device;
46extern struct serial_device serial_stuart_device;
47
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48#if CONFIG_POLARIS
49#define BOOT_CONSOLE "serial_stuart"
50#else
51#define BOOT_CONSOLE "serial_ffuart"
52#endif
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53/* ------------------------------------------------------------------------- */
54
55/*
56 * Miscelaneous platform dependent initialisations
57 */
58
88bd9750 59int usb_board_init(void)
5e5803e1 60{
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61 writel((readl(UHCHR) | UHCHR_PCPL | UHCHR_PSPL) &
62 ~(UHCHR_SSEP0 | UHCHR_SSEP1 | UHCHR_SSEP2 | UHCHR_SSE),
63 UHCHR);
5e5803e1 64
3ba8bf7c 65 writel(readl(UHCHR) | UHCHR_FSBIR, UHCHR);
5e5803e1 66
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67 while (readl(UHCHR) & UHCHR_FSBIR)
68 ;
5e5803e1 69
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70 writel(readl(UHCHR) & ~UHCHR_SSE, UHCHR);
71 writel((UHCHIE_UPRIE | UHCHIE_RWIE), UHCHIE);
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72
73 /* Clear any OTG Pin Hold */
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74 if (readl(PSSR) & PSSR_OTGPH)
75 writel(readl(PSSR) | PSSR_OTGPH, PSSR);
5e5803e1 76
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77 writel(readl(UHCRHDA) & ~(RH_A_NPS), UHCRHDA);
78 writel(readl(UHCRHDA) | RH_A_PSM, UHCRHDA);
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79
80 /* Set port power control mask bits, only 3 ports. */
3ba8bf7c 81 writel(readl(UHCRHDB) | (0x7<<17), UHCRHDB);
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82
83 return 0;
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84}
85
86void usb_board_init_fail(void)
87{
88 return;
89}
90
91void usb_board_stop(void)
92{
3ba8bf7c 93 writel(readl(UHCHR) | UHCHR_FHR, UHCHR);
5e5803e1 94 udelay(11);
3ba8bf7c 95 writel(readl(UHCHR) & ~UHCHR_FHR, UHCHR);
5e5803e1 96
3ba8bf7c 97 writel(readl(UHCCOMS) | 1, UHCCOMS);
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98 udelay(10);
99
3ba8bf7c 100 writel(readl(CKEN) & ~CKEN10_USBHOST, CKEN);
5e5803e1 101
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102 return;
103}
104
105int board_init (void)
106{
107 /* memory and cpu-speed are setup before relocation */
108 /* so we do _nothing_ here */
109
110 /* arch number of ConXS Board */
111 gd->bd->bi_arch_number = 776;
112
113 /* adress of boot parameters */
114 gd->bd->bi_boot_params = 0xa000003c;
115
116 return 0;
117}
118
119int board_late_init(void)
120{
121#if defined(CONFIG_SERIAL_MULTI)
122 char *console=getenv("boot_console");
123
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124 if ((console == NULL) || (strcmp(console,"serial_btuart") &&
125 strcmp(console,"serial_stuart") &&
126 strcmp(console,"serial_ffuart"))) {
127 console = BOOT_CONSOLE;
5e5803e1 128 }
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129 setenv("stdout",console);
130 setenv("stdin", console);
131 setenv("stderr",console);
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132#endif
133 return 0;
134}
135
136struct serial_device *default_serial_console (void)
137{
138 return &serial_ffuart_device;
139}
140
141int dram_init (void)
142{
143 gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
144 gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
145 gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
146 gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE;
147 gd->bd->bi_dram[2].start = PHYS_SDRAM_3;
148 gd->bd->bi_dram[2].size = PHYS_SDRAM_3_SIZE;
149 gd->bd->bi_dram[3].start = PHYS_SDRAM_4;
150 gd->bd->bi_dram[3].size = PHYS_SDRAM_4_SIZE;
151
152 return 0;
153}
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154
155#ifdef CONFIG_DRIVER_DM9000
156int board_eth_init(bd_t *bis)
157{
158 return dm9000_initialize(bis);
159}
160#endif