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rename CFG_ macros to CONFIG_SYS
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fe8c2806
WD
1/*
2 * (C) Copyright 2001
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * (C) Copyright 2002
6 * Gregory E. Allen, gallen@arlut.utexas.edu
7 * Matthew E. Karger, karger@arlut.utexas.edu
8 * Applied Research Laboratories, The University of Texas at Austin
9 *
10 * See file CREDITS for list of people who contributed to this
11 * project.
12 *
13 * This program is free software; you can redistribute it and/or
14 * modify it under the terms of the GNU General Public License as
15 * published by the Free Software Foundation; either version 2 of
16 * the License, or (at your option) any later version.
17 *
18 * This program is distributed in the hope that it will be useful,
19 * but WITHOUT ANY WARRANTY; without even the implied warranty of
20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 * GNU General Public License for more details.
22 *
23 * You should have received a copy of the GNU General Public License
24 * along with this program; if not, write to the Free Software
25 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
26 * MA 02111-1307 USA
27 */
28
29#include <common.h>
30#include <mpc824x.h>
31#include <asm/processor.h>
32
33#define ROM_CS0_START 0xFF800000
34#define ROM_CS1_START 0xFF000000
35
5a1aceb0 36#if defined(CONFIG_ENV_IS_IN_FLASH)
0e8d1586 37# ifndef CONFIG_ENV_ADDR
6d0f6bcf 38# define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_ENV_OFFSET)
fe8c2806 39# endif
0e8d1586
JCPV
40# ifndef CONFIG_ENV_SIZE
41# define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE
fe8c2806 42# endif
0e8d1586
JCPV
43# ifndef CONFIG_ENV_SECT_SIZE
44# define CONFIG_ENV_SECT_SIZE CONFIG_ENV_SIZE
fe8c2806
WD
45# endif
46#endif
47
7a8e9bed 48#define FLASH_BANK_SIZE ((uint)(16 * 1024 * 1024)) /* max 16Mbyte */
53677ef1 49#define MAIN_SECT_SIZE 0x10000
fe8c2806
WD
50#define SECT_SIZE_32KB 0x8000
51#define SECT_SIZE_8KB 0x2000
52
6d0f6bcf 53flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS];
fe8c2806 54
7a8e9bed
WD
55static int write_word (flash_info_t * info, ulong dest, ulong data);
56#if 0
57static void write_via_fpu (vu_long * addr, ulong * data);
58#endif
59static __inline__ unsigned long get_msr (void);
60static __inline__ void set_msr (unsigned long msr);
fe8c2806
WD
61
62/*flash command address offsets*/
63#define ADDR0 (0x555)
64#define ADDR1 (0xAAA)
65#define ADDR3 (0x001)
66
67#define FLASH_WORD_SIZE unsigned char
68
69/*---------------------------------------------------------------------*/
70/*#define DEBUG_FLASH 1 */
71
72/*---------------------------------------------------------------------*/
73
7a8e9bed 74unsigned long flash_init (void)
fe8c2806 75{
7a8e9bed
WD
76 int i; /* flash bank counter */
77 int j; /* flash device sector counter */
78 int k; /* flash size calculation loop counter */
79 int N; /* pow(2,N) is flash size, but we don't have <math.h> */
80 ulong total_size = 0, device_size = 1;
fe8c2806
WD
81 unsigned char manuf_id, device_id;
82
6d0f6bcf
JCPV
83 for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) {
84 vu_char *addr = (vu_char *) (CONFIG_SYS_FLASH_BASE + i * FLASH_BANK_SIZE);
7a8e9bed
WD
85
86 addr[0x555] = 0xAA; /* get manuf/device info command */
87 addr[0x2AA] = 0x55; /* 3-cycle command */
88 addr[0x555] = 0x90;
89
90 manuf_id = addr[0]; /* read back manuf/device info */
91 device_id = addr[1];
fe8c2806 92
7a8e9bed
WD
93 addr[0x55] = 0x98; /* CFI command */
94 N = addr[0x27]; /* read back device_size = pow(2,N) */
fe8c2806 95
7a8e9bed
WD
96 for (k = 0; k < N; k++) /* calculate device_size = pow(2,N) */
97 device_size *= 2;
98
99 flash_info[i].size = device_size;
6d0f6bcf 100 flash_info[i].sector_count = CONFIG_SYS_MAX_FLASH_SECT;
fe8c2806
WD
101
102#if defined DEBUG_FLASH
7a8e9bed 103 printf ("manuf_id = %x, device_id = %x\n", manuf_id, device_id);
fe8c2806 104#endif
7a8e9bed
WD
105 /* find out what kind of flash we are using */
106 if ((manuf_id == (uchar) (AMD_MANUFACT))
107 && (device_id == AMD_ID_LV033C)) {
108 flash_info[i].flash_id =
109 ((FLASH_MAN_AMD & FLASH_VENDMASK) << 16) |
110 (FLASH_AM033C & FLASH_TYPEMASK);
111
112 /* set individual sector start addresses */
113 for (j = 0; j < flash_info[i].sector_count; j++) {
114 flash_info[i].start[j] =
6d0f6bcf 115 (CONFIG_SYS_FLASH_BASE + i * FLASH_BANK_SIZE +
7a8e9bed
WD
116 j * MAIN_SECT_SIZE);
117 }
118 }
fe8c2806 119
7a8e9bed
WD
120 else if ((manuf_id == (uchar) (AMD_MANUFACT)) &&
121 (device_id == AMD_ID_LV116DT)) {
122 flash_info[i].flash_id =
123 ((FLASH_MAN_AMD & FLASH_VENDMASK) << 16) |
124 (FLASH_AM160T & FLASH_TYPEMASK);
125
126 /* set individual sector start addresses */
127 for (j = 0; j < flash_info[i].sector_count; j++) {
128 flash_info[i].start[j] =
6d0f6bcf 129 (CONFIG_SYS_FLASH_BASE + i * FLASH_BANK_SIZE +
7a8e9bed
WD
130 j * MAIN_SECT_SIZE);
131
6d0f6bcf 132 if (j < (CONFIG_SYS_MAX_FLASH_SECT - 3)) {
7a8e9bed 133 flash_info[i].start[j] =
6d0f6bcf 134 (CONFIG_SYS_FLASH_BASE + i * FLASH_BANK_SIZE +
7a8e9bed 135 j * MAIN_SECT_SIZE);
6d0f6bcf 136 } else if (j == (CONFIG_SYS_MAX_FLASH_SECT - 3)) {
7a8e9bed
WD
137 flash_info[i].start[j] =
138 (flash_info[i].start[j - 1] + SECT_SIZE_32KB);
139
140 } else {
141 flash_info[i].start[j] =
142 (flash_info[i].start[j - 1] + SECT_SIZE_8KB);
143 }
144 }
145 }
146
147 else {
148 flash_info[i].flash_id = FLASH_UNKNOWN;
149 addr[0] = 0xFF;
150 goto Done;
fe8c2806
WD
151 }
152
153#if defined DEBUG_FLASH
154 printf ("flash_id = 0x%08lX\n", flash_info[i].flash_id);
155#endif
156
7a8e9bed 157 addr[0] = 0xFF;
fe8c2806 158
6d0f6bcf 159 memset (flash_info[i].protect, 0, CONFIG_SYS_MAX_FLASH_SECT);
fe8c2806 160
7a8e9bed
WD
161 total_size += flash_info[i].size;
162 }
fe8c2806 163
7a8e9bed
WD
164 /* Protect monitor and environment sectors
165 */
6d0f6bcf
JCPV
166#if CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE
167 flash_protect (FLAG_PROTECT_SET, CONFIG_SYS_MONITOR_BASE,
168 CONFIG_SYS_MONITOR_BASE + monitor_flash_len - 1,
7a8e9bed 169 &flash_info[0]);
fe8c2806
WD
170#endif
171
0e8d1586
JCPV
172#if defined(CONFIG_ENV_IS_IN_FLASH) && defined(CONFIG_ENV_ADDR)
173 flash_protect (FLAG_PROTECT_SET, CONFIG_ENV_ADDR,
174 CONFIG_ENV_ADDR + CONFIG_ENV_SIZE - 1, &flash_info[0]);
fe8c2806
WD
175#endif
176
7a8e9bed
WD
177 Done:
178 return total_size;
fe8c2806
WD
179}
180
181/*-----------------------------------------------------------------------
182 */
7a8e9bed 183void flash_print_info (flash_info_t * info)
fe8c2806 184{
7a8e9bed
WD
185 static const char unk[] = "Unknown";
186 const char *mfct = unk, *type = unk;
187 unsigned int i;
188
189 if (info->flash_id != FLASH_UNKNOWN) {
190 switch (info->flash_id & FLASH_VENDMASK) {
191 case FLASH_MAN_AMD:
192 mfct = "AMD";
193 break;
194 case FLASH_MAN_FUJ:
195 mfct = "FUJITSU";
196 break;
197 case FLASH_MAN_STM:
198 mfct = "STM";
199 break;
200 case FLASH_MAN_SST:
201 mfct = "SST";
202 break;
203 case FLASH_MAN_BM:
204 mfct = "Bright Microelectonics";
205 break;
206 case FLASH_MAN_INTEL:
207 mfct = "Intel";
208 break;
209 }
210
211 switch (info->flash_id & FLASH_TYPEMASK) {
212 case FLASH_AM033C:
213 type = "AM29LV033C (32 Mbit, uniform sector size)";
214 break;
215 case FLASH_AM160T:
216 type = "AM29LV160T (16 Mbit, top boot sector)";
217 break;
218 case FLASH_AM040:
219 type = "AM29F040B (512K * 8, uniform sector size)";
220 break;
221 case FLASH_AM400B:
222 type = "AM29LV400B (4 Mbit, bottom boot sect)";
223 break;
224 case FLASH_AM400T:
225 type = "AM29LV400T (4 Mbit, top boot sector)";
226 break;
227 case FLASH_AM800B:
228 type = "AM29LV800B (8 Mbit, bottom boot sect)";
229 break;
230 case FLASH_AM800T:
231 type = "AM29LV800T (8 Mbit, top boot sector)";
232 break;
233 case FLASH_AM320B:
234 type = "AM29LV320B (32 Mbit, bottom boot sect)";
235 break;
236 case FLASH_AM320T:
237 type = "AM29LV320T (32 Mbit, top boot sector)";
238 break;
239 case FLASH_STM800AB:
240 type = "M29W800AB (8 Mbit, bottom boot sect)";
241 break;
242 case FLASH_SST800A:
243 type = "SST39LF/VF800 (8 Mbit, uniform sector size)";
244 break;
245 case FLASH_SST160A:
246 type = "SST39LF/VF160 (16 Mbit, uniform sector size)";
247 break;
248 }
249 }
250
251 printf ("\n Brand: %s Type: %s\n"
252 " Size: %lu KB in %d Sectors\n",
253 mfct, type, info->size >> 10, info->sector_count);
254
255 printf (" Sector Start Addresses:");
256
257 for (i = 0; i < info->sector_count; i++) {
258 unsigned long size;
259 unsigned int erased;
260 unsigned long *flash = (unsigned long *) info->start[i];
261
262 /*
263 * Check if whole sector is erased
264 */
265 size = (i != (info->sector_count - 1)) ?
266 (info->start[i + 1] - info->start[i]) >> 2 :
267 (info->start[0] + info->size - info->start[i]) >> 2;
268
269 for (flash = (unsigned long *) info->start[i], erased = 1;
270 (flash != (unsigned long *) info->start[i] + size) && erased;
271 flash++)
272 erased = *flash == ~0x0UL;
273
274 printf ("%s %08lX %s %s",
275 (i % 5) ? "" : "\n ",
276 info->start[i],
277 erased ? "E" : " ", info->protect[i] ? "RO" : " ");
278 }
279
280 puts ("\n");
281 return;
fe8c2806
WD
282}
283
284/*-----------------------------------------------------------------------
285 */
286
7a8e9bed 287int flash_erase (flash_info_t * info, int s_first, int s_last)
fe8c2806 288{
7a8e9bed
WD
289 volatile FLASH_WORD_SIZE *addr = (FLASH_WORD_SIZE *) (info->start[0]);
290 int flag, prot, sect, l_sect;
291 ulong start, now, last;
292 unsigned char sh8b;
293
294 if ((s_first < 0) || (s_first > s_last)) {
295 if (info->flash_id == FLASH_UNKNOWN) {
296 printf ("- missing\n");
297 } else {
298 printf ("- no sectors to erase\n");
299 }
300 return 1;
301 }
302
303 if ((info->flash_id == FLASH_UNKNOWN) ||
304 (info->flash_id > (FLASH_MAN_STM | FLASH_AMD_COMP))) {
305 printf ("Can't erase unknown flash type - aborted\n");
306 return 1;
307 }
308
309 prot = 0;
310 for (sect = s_first; sect <= s_last; ++sect) {
311 if (info->protect[sect]) {
312 prot++;
313 }
314 }
315
316 if (prot) {
317 printf ("- Warning: %d protected sectors will not be erased!\n",
318 prot);
319 } else {
320 printf ("\n");
321 }
322
323 l_sect = -1;
324
325 /* Check the ROM CS */
326 if ((info->start[0] >= ROM_CS1_START)
327 && (info->start[0] < ROM_CS0_START))
328 sh8b = 3;
329 else
330 sh8b = 0;
fe8c2806
WD
331
332 /* Disable interrupts which might cause a timeout here */
7a8e9bed
WD
333 flag = disable_interrupts ();
334
335 addr[ADDR0 << sh8b] = (FLASH_WORD_SIZE) 0x00AA00AA;
336 addr[ADDR1 << sh8b] = (FLASH_WORD_SIZE) 0x00550055;
337 addr[ADDR0 << sh8b] = (FLASH_WORD_SIZE) 0x00800080;
338 addr[ADDR0 << sh8b] = (FLASH_WORD_SIZE) 0x00AA00AA;
339 addr[ADDR1 << sh8b] = (FLASH_WORD_SIZE) 0x00550055;
340
341 /* Start erase on unprotected sectors */
342 for (sect = s_first; sect <= s_last; sect++) {
343 if (info->protect[sect] == 0) { /* not protected */
344 addr = (FLASH_WORD_SIZE *) (info->start[0] + ((info->
345 start[sect] -
346 info->
347 start[0]) <<
348 sh8b));
349
350 if (info->flash_id & FLASH_MAN_SST) {
351 addr[ADDR0 << sh8b] = (FLASH_WORD_SIZE) 0x00AA00AA;
352 addr[ADDR1 << sh8b] = (FLASH_WORD_SIZE) 0x00550055;
353 addr[ADDR0 << sh8b] = (FLASH_WORD_SIZE) 0x00800080;
354 addr[ADDR0 << sh8b] = (FLASH_WORD_SIZE) 0x00AA00AA;
355 addr[ADDR1 << sh8b] = (FLASH_WORD_SIZE) 0x00550055;
356 addr[0] = (FLASH_WORD_SIZE) 0x00500050; /* block erase */
357 udelay (30000); /* wait 30 ms */
358 } else {
359 addr[0] = (FLASH_WORD_SIZE) 0x00300030; /* sector erase */
fe8c2806
WD
360 }
361
fe8c2806 362 l_sect = sect;
7a8e9bed
WD
363 }
364 }
365
366 /* re-enable interrupts if necessary */
367 if (flag)
368 enable_interrupts ();
369
370 /* wait at least 80us - let's wait 1 ms */
371 udelay (1000);
372
373 /*
374 * We wait for the last triggered sector
375 */
376 if (l_sect < 0)
377 goto DONE;
378
379 start = get_timer (0);
380 last = start;
381 addr = (FLASH_WORD_SIZE *) (info->start[0] + ((info->start[l_sect] -
382 info->
383 start[0]) << sh8b));
384 while ((addr[0] & (FLASH_WORD_SIZE) 0x00800080) !=
385 (FLASH_WORD_SIZE) 0x00800080) {
6d0f6bcf 386 if ((now = get_timer (start)) > CONFIG_SYS_FLASH_ERASE_TOUT) {
7a8e9bed
WD
387 printf ("Timeout\n");
388 return 1;
389 }
390 /* show that we're waiting */
391 if ((now - last) > 1000) { /* every second */
392 serial_putc ('.');
393 last = now;
394 }
395 }
396
397 DONE:
398 /* reset to read mode */
399 addr = (FLASH_WORD_SIZE *) info->start[0];
400 addr[0] = (FLASH_WORD_SIZE) 0x00F000F0; /* reset bank */
401
402 printf (" done\n");
403 return 0;
fe8c2806
WD
404}
405
406
407/*-----------------------------------------------------------------------
408 * Copy memory to flash, returns:
409 * 0 - OK
410 * 1 - write timeout
411 * 2 - Flash not erased
412 */
413
7a8e9bed 414int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
fe8c2806 415{
7a8e9bed
WD
416 ulong cp, wp, data;
417 int i, l, rc;
418
419 wp = (addr & ~3); /* get lower word aligned address */
420
421 /*
422 * handle unaligned start bytes
423 */
424 if ((l = addr - wp) != 0) {
425 data = 0;
426 for (i = 0, cp = wp; i < l; ++i, ++cp) {
427 data = (data << 8) | (*(uchar *) cp);
428 }
429 for (; i < 4 && cnt > 0; ++i) {
430 data = (data << 8) | *src++;
431 --cnt;
432 ++cp;
433 }
434 for (; cnt == 0 && i < 4; ++i, ++cp) {
435 data = (data << 8) | (*(uchar *) cp);
436 }
437
438 if ((rc = write_word (info, wp, data)) != 0) {
439 return (rc);
440 }
441 wp += 4;
442 }
443
444 /*
445 * handle word aligned part
446 */
447 while (cnt >= 4) {
448 data = 0;
449 for (i = 0; i < 4; ++i) {
450 data = (data << 8) | *src++;
451 }
452 if ((rc = write_word (info, wp, data)) != 0) {
453 return (rc);
454 }
455 wp += 4;
456 cnt -= 4;
457 }
458
459 if (cnt == 0) {
460 return (0);
461 }
462
463 /*
464 * handle unaligned tail bytes
465 */
466 data = 0;
467 for (i = 0, cp = wp; i < 4 && cnt > 0; ++i, ++cp) {
468 data = (data << 8) | *src++;
469 --cnt;
470 }
471 for (; i < 4; ++i, ++cp) {
472 data = (data << 8) | (*(uchar *) cp);
473 }
474
475 return (write_word (info, wp, data));
fe8c2806
WD
476}
477
478
479/*-----------------------------------------------------------------------
480 * Write a word to Flash, returns:
481 * 0 - OK
482 * 1 - write timeout
483 * 2 - Flash not erased
484 */
7a8e9bed 485static int write_word (flash_info_t * info, ulong dest, ulong data)
fe8c2806 486{
7a8e9bed 487 volatile FLASH_WORD_SIZE *addr2 = (FLASH_WORD_SIZE *) info->start[0];
fe8c2806 488 volatile FLASH_WORD_SIZE *dest2;
7a8e9bed 489 volatile FLASH_WORD_SIZE *data2 = (FLASH_WORD_SIZE *) & data;
fe8c2806
WD
490 ulong start;
491 int flag;
492 int i;
493 unsigned char sh8b;
494
7a8e9bed
WD
495 /* Check the ROM CS */
496 if ((info->start[0] >= ROM_CS1_START)
497 && (info->start[0] < ROM_CS0_START))
498 sh8b = 3;
499 else
500 sh8b = 0;
501
502 dest2 = (FLASH_WORD_SIZE *) (((dest - info->start[0]) << sh8b) +
503 info->start[0]);
504
505 /* Check if Flash is (sufficiently) erased */
506 if ((*dest2 & (FLASH_WORD_SIZE) data) != (FLASH_WORD_SIZE) data) {
507 return (2);
508 }
509 /* Disable interrupts which might cause a timeout here */
510 flag = disable_interrupts ();
511
512 for (i = 0; i < 4 / sizeof (FLASH_WORD_SIZE); i++) {
513 addr2[ADDR0 << sh8b] = (FLASH_WORD_SIZE) 0x00AA00AA;
514 addr2[ADDR1 << sh8b] = (FLASH_WORD_SIZE) 0x00550055;
515 addr2[ADDR0 << sh8b] = (FLASH_WORD_SIZE) 0x00A000A0;
516
517 dest2[i << sh8b] = data2[i];
518
519 /* re-enable interrupts if necessary */
520 if (flag)
521 enable_interrupts ();
522
523 /* data polling for D7 */
524 start = get_timer (0);
525 while ((dest2[i << sh8b] & (FLASH_WORD_SIZE) 0x00800080) !=
526 (data2[i] & (FLASH_WORD_SIZE) 0x00800080)) {
6d0f6bcf 527 if (get_timer (start) > CONFIG_SYS_FLASH_WRITE_TOUT) {
7a8e9bed
WD
528 return (1);
529 }
530 }
531 }
532
533 return (0);
534}
535
536/*-----------------------------------------------------------------------
537 */
538#if 0
539static void write_via_fpu (vu_long * addr, ulong * data)
540{
541 __asm__ __volatile__ ("lfd 1, 0(%0)"::"r" (data));
542 __asm__ __volatile__ ("stfd 1, 0(%0)"::"r" (addr));
fe8c2806 543}
7a8e9bed
WD
544#endif
545
fe8c2806
WD
546/*-----------------------------------------------------------------------
547 */
7a8e9bed
WD
548static __inline__ unsigned long get_msr (void)
549{
550 unsigned long msr;
551
552 __asm__ __volatile__ ("mfmsr %0":"=r" (msr):);
553
554 return msr;
555}
556
557static __inline__ void set_msr (unsigned long msr)
558{
559 __asm__ __volatile__ ("mtmsr %0"::"r" (msr));
560}