[thirdparty/u-boot.git] / board / warp7 / warp7.c

// SPDX-License-Identifier: GPL-2.0+
/*
 * Copyright (C) 2016 NXP Semiconductors
 * Author: Fabio Estevam <fabio.estevam@nxp.com>
 */

#include <init.h>
#include <net.h>
#include <asm/arch/clock.h>
#include <asm/arch/imx-regs.h>
#include <asm/arch/mx7-pins.h>
#include <asm/arch/sys_proto.h>
#include <asm/global_data.h>
#include <asm/gpio.h>
#include <asm/mach-imx/hab.h>
#include <asm/mach-imx/iomux-v3.h>
#include <asm/io.h>
#include <common.h>
#include <env.h>
#include <asm/arch/crm_regs.h>
#include <netdev.h>
#include <power/pmic.h>
#include <power/pfuze3000_pmic.h>
#include "../freescale/common/pfuze.h"
#include <asm/setup.h>
#include <asm/bootm.h>

DECLARE_GLOBAL_DATA_PTR;

int dram_init(void)
{
	gd->ram_size = PHYS_SDRAM_SIZE;

	/* Subtract the defined OPTEE runtime firmware length */
#ifdef CONFIG_OPTEE_TZDRAM_SIZE
		gd->ram_size -= CONFIG_OPTEE_TZDRAM_SIZE;
#endif

	return 0;
}

static iomux_v3_cfg_t const wdog_pads[] = {
	MX7D_PAD_GPIO1_IO00__WDOG1_WDOG_B | MUX_PAD_CTRL(NO_PAD_CTRL),
};

#ifdef CONFIG_DM_PMIC
int power_init_board(void)
{
	struct udevice *dev;
	int ret, dev_id, rev_id;

	ret = pmic_get("pfuze3000@8", &dev);
	if (ret == -ENODEV)
		return 0;
	if (ret != 0)
		return ret;

	dev_id = pmic_reg_read(dev, PFUZE3000_DEVICEID);
	rev_id = pmic_reg_read(dev, PFUZE3000_REVID);
	printf("PMIC: PFUZE3000 DEV_ID=0x%x REV_ID=0x%x\n", dev_id, rev_id);

	/* disable Low Power Mode during standby mode */
	pmic_reg_write(dev, PFUZE3000_LDOGCTL, 1);

	return 0;
}
#endif

int board_init(void)
{
	/* address of boot parameters */
	gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;

	return 0;
}

int checkboard(void)
{
	char *mode;

	if (IS_ENABLED(CONFIG_ARMV7_BOOT_SEC_DEFAULT))
		mode = "secure";
	else
		mode = "non-secure";

#ifdef CONFIG_OPTEE_TZDRAM_SIZE
	unsigned long optee_start, optee_end;

	optee_end = PHYS_SDRAM + PHYS_SDRAM_SIZE;
	optee_start = optee_end - CONFIG_OPTEE_TZDRAM_SIZE;

	printf("Board: WARP7 in %s mode OPTEE DRAM 0x%08lx-0x%08lx\n",
	       mode, optee_start, optee_end);
#else
	printf("Board: WARP7 in %s mode\n", mode);
#endif

	return 0;
}

int board_late_init(void)
{
	struct wdog_regs *wdog = (struct wdog_regs *)WDOG1_BASE_ADDR;
#ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
	struct tag_serialnr serialnr;
	char serial_string[0x20];
#endif

	imx_iomux_v3_setup_multiple_pads(wdog_pads, ARRAY_SIZE(wdog_pads));

	set_wdog_reset(wdog);

	/*
	 * Do not assert internal WDOG_RESET_B_DEB(controlled by bit 4),
	 * since we use PMIC_PWRON to reset the board.
	 */
	clrsetbits_le16(&wdog->wcr, 0, 0x10);

#ifdef CONFIG_IMX_HAB
	/* Determine HAB state */
	env_set_ulong(HAB_ENABLED_ENVNAME, imx_hab_is_enabled());
#else
	env_set_ulong(HAB_ENABLED_ENVNAME, 0);
#endif

#ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
	/* Set serial# standard environment variable based on OTP settings */
	get_board_serial(&serialnr);
	snprintf(serial_string, sizeof(serial_string), "WaRP7-0x%08x%08x",
		 serialnr.low, serialnr.high);
	env_set("serial#", serial_string);
#endif

	return 0;
}
Commit	Line	Data
83d290c5	1	// SPDX-License-Identifier: GPL-2.0+
47173483 FE	2	/*
	3	* Copyright (C) 2016 NXP Semiconductors
	4	* Author: Fabio Estevam <fabio.estevam@nxp.com>
47173483 FE	5	*/
47173483 FE	6
5255932f	7	#include <init.h>
90526e9f	8	#include <net.h>
47173483 FE	9	#include <asm/arch/clock.h>
	10	#include <asm/arch/imx-regs.h>
	11	#include <asm/arch/mx7-pins.h>
	12	#include <asm/arch/sys_proto.h>
401d1c4f	13	#include <asm/global_data.h>
47173483	14	#include <asm/gpio.h>
a2accd84	15	#include <asm/mach-imx/hab.h>
552a848e	16	#include <asm/mach-imx/iomux-v3.h>
47173483	17	#include <asm/io.h>
d678a59d	18	#include <common.h>
168068fb	19	#include <env.h>
47173483	20	#include <asm/arch/crm_regs.h>
25aaebdb	21	#include <netdev.h>
7d301a59 VM	22	#include <power/pmic.h>
	23	#include <power/pfuze3000_pmic.h>
	24	#include "../freescale/common/pfuze.h"
852cc548 BD	25	#include <asm/setup.h>
852cc548 BD	26	#include <asm/bootm.h>
47173483 FE	27
	28	DECLARE_GLOBAL_DATA_PTR;
	29
47173483 FE	30	int dram_init(void)
	31	{
	32	gd->ram_size = PHYS_SDRAM_SIZE;
	33
7175ef4a BD	34	/* Subtract the defined OPTEE runtime firmware length */
	35	#ifdef CONFIG_OPTEE_TZDRAM_SIZE
	36	gd->ram_size -= CONFIG_OPTEE_TZDRAM_SIZE;
	37	#endif
	38
47173483 FE	39	return 0;
	40	}
	41
0a35cc93 MF	42	static iomux_v3_cfg_t const wdog_pads[] = {
	43	MX7D_PAD_GPIO1_IO00__WDOG1_WDOG_B \| MUX_PAD_CTRL(NO_PAD_CTRL),
	44	};
	45
8ba37732	46	#ifdef CONFIG_DM_PMIC
7d301a59 VM	47	int power_init_board(void)
7d301a59 VM	48	{
8ba37732 BD	49	struct udevice *dev;
8ba37732 BD	50	int ret, dev_id, rev_id;
7d301a59	51
80dae36b	52	ret = pmic_get("pfuze3000@8", &dev);
8ba37732 BD	53	if (ret == -ENODEV)
	54	return 0;
	55	if (ret != 0)
7d301a59 VM	56	return ret;
7d301a59 VM	57
8ba37732 BD	58	dev_id = pmic_reg_read(dev, PFUZE3000_DEVICEID);
	59	rev_id = pmic_reg_read(dev, PFUZE3000_REVID);
	60	printf("PMIC: PFUZE3000 DEV_ID=0x%x REV_ID=0x%x\n", dev_id, rev_id);
7d301a59 VM	61
7d301a59 VM	62	/* disable Low Power Mode during standby mode */
e077b3ba	63	pmic_reg_write(dev, PFUZE3000_LDOGCTL, 1);
7d301a59 VM	64
	65	return 0;
	66	}
	67	#endif
	68
47173483 FE	69	int board_init(void)
	70	{
	71	/* address of boot parameters */
	72	gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
	73
	74	return 0;
	75	}
	76
	77	int checkboard(void)
	78	{
d4ee5043 FE	79	char *mode;
	80
	81	if (IS_ENABLED(CONFIG_ARMV7_BOOT_SEC_DEFAULT))
	82	mode = "secure";
	83	else
	84	mode = "non-secure";
	85
fbbf44af BD	86	#ifdef CONFIG_OPTEE_TZDRAM_SIZE
	87	unsigned long optee_start, optee_end;
	88
	89	optee_end = PHYS_SDRAM + PHYS_SDRAM_SIZE;
	90	optee_start = optee_end - CONFIG_OPTEE_TZDRAM_SIZE;
	91
	92	printf("Board: WARP7 in %s mode OPTEE DRAM 0x%08lx-0x%08lx\n",
	93	mode, optee_start, optee_end);
	94	#else
d4ee5043	95	printf("Board: WARP7 in %s mode\n", mode);
fbbf44af	96	#endif
47173483 FE	97
	98	return 0;
	99	}
	100
0a35cc93 MF	101	int board_late_init(void)
	102	{
	103	struct wdog_regs wdog = (struct wdog_regs )WDOG1_BASE_ADDR;
b9d66a06	104	#ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
852cc548 BD	105	struct tag_serialnr serialnr;
	106	char serial_string[0x20];
	107	#endif
0a35cc93 MF	108
	109	imx_iomux_v3_setup_multiple_pads(wdog_pads, ARRAY_SIZE(wdog_pads));
	110
	111	set_wdog_reset(wdog);
	112
	113	/*
	114	* Do not assert internal WDOG_RESET_B_DEB(controlled by bit 4),
	115	* since we use PMIC_PWRON to reset the board.
	116	*/
	117	clrsetbits_le16(&wdog->wcr, 0, 0x10);
	118
d714a75f	119	#ifdef CONFIG_IMX_HAB
a2accd84 BD	120	/* Determine HAB state */
	121	env_set_ulong(HAB_ENABLED_ENVNAME, imx_hab_is_enabled());
	122	#else
	123	env_set_ulong(HAB_ENABLED_ENVNAME, 0);
	124	#endif
	125
b9d66a06	126	#ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
852cc548 BD	127	/* Set serial# standard environment variable based on OTP settings */
	128	get_board_serial(&serialnr);
	129	snprintf(serial_string, sizeof(serial_string), "WaRP7-0x%08x%08x",
	130	serialnr.low, serialnr.high);
	131	env_set("serial#", serial_string);
	132	#endif
	133
0a35cc93 MF	134	return 0;
0a35cc93 MF	135	}