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c609719b 1/*
1a344f29 2 * (C) Copyright 2000-2005
c609719b
WD
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 *
23 */
24
25/*
26 * IDE support
27 */
28#include <common.h>
29#include <config.h>
30#include <watchdog.h>
31#include <command.h>
32#include <image.h>
33#include <asm/byteorder.h>
f98984cb 34#include <asm/io.h>
735dd97b 35
c609719b
WD
36#if defined(CONFIG_IDE_8xx_DIRECT) || defined(CONFIG_IDE_PCMCIA)
37# include <pcmcia.h>
38#endif
735dd97b 39
c609719b
WD
40#ifdef CONFIG_8xx
41# include <mpc8xx.h>
42#endif
735dd97b 43
132ba5fd
WD
44#ifdef CONFIG_MPC5xxx
45#include <mpc5xxx.h>
46#endif
735dd97b 47
c609719b
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48#include <ide.h>
49#include <ata.h>
735dd97b 50
c609719b
WD
51#ifdef CONFIG_STATUS_LED
52# include <status_led.h>
53#endif
735dd97b 54
d87080b7
WD
55#ifdef CONFIG_IDE_8xx_DIRECT
56DECLARE_GLOBAL_DATA_PTR;
57#endif
58
5cf91d6b
WD
59#ifdef __PPC__
60# define EIEIO __asm__ volatile ("eieio")
1a344f29 61# define SYNC __asm__ volatile ("sync")
5cf91d6b
WD
62#else
63# define EIEIO /* nothing */
1a344f29 64# define SYNC /* nothing */
c609719b
WD
65#endif
66
15647dc7 67#ifdef CONFIG_IDE_8xx_DIRECT
c609719b
WD
68/* Timings for IDE Interface
69 *
70 * SETUP / LENGTH / HOLD - cycles valid for 50 MHz clk
71 * 70 165 30 PIO-Mode 0, [ns]
72 * 4 9 2 [Cycles]
73 * 50 125 20 PIO-Mode 1, [ns]
74 * 3 7 2 [Cycles]
75 * 30 100 15 PIO-Mode 2, [ns]
76 * 2 6 1 [Cycles]
77 * 30 80 10 PIO-Mode 3, [ns]
78 * 2 5 1 [Cycles]
79 * 25 70 10 PIO-Mode 4, [ns]
80 * 2 4 1 [Cycles]
81 */
82
83const static pio_config_t pio_config_ns [IDE_MAX_PIO_MODE+1] =
84{
85 /* Setup Length Hold */
86 { 70, 165, 30 }, /* PIO-Mode 0, [ns] */
87 { 50, 125, 20 }, /* PIO-Mode 1, [ns] */
88 { 30, 101, 15 }, /* PIO-Mode 2, [ns] */
89 { 30, 80, 10 }, /* PIO-Mode 3, [ns] */
90 { 25, 70, 10 }, /* PIO-Mode 4, [ns] */
91};
92
93static pio_config_t pio_config_clk [IDE_MAX_PIO_MODE+1];
94
6d0f6bcf
JCPV
95#ifndef CONFIG_SYS_PIO_MODE
96#define CONFIG_SYS_PIO_MODE 0 /* use a relaxed default */
c609719b 97#endif
6d0f6bcf 98static int pio_mode = CONFIG_SYS_PIO_MODE;
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99
100/* Make clock cycles and always round up */
101
102#define PCMCIA_MK_CLKS( t, T ) (( (t) * (T) + 999U ) / 1000U )
103
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104#endif /* CONFIG_IDE_8xx_DIRECT */
105
c609719b
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106/* ------------------------------------------------------------------------- */
107
108/* Current I/O Device */
109static int curr_device = -1;
110
111/* Current offset for IDE0 / IDE1 bus access */
6d0f6bcf
JCPV
112ulong ide_bus_offset[CONFIG_SYS_IDE_MAXBUS] = {
113#if defined(CONFIG_SYS_ATA_IDE0_OFFSET)
114 CONFIG_SYS_ATA_IDE0_OFFSET,
c609719b 115#endif
6d0f6bcf
JCPV
116#if defined(CONFIG_SYS_ATA_IDE1_OFFSET) && (CONFIG_SYS_IDE_MAXBUS > 1)
117 CONFIG_SYS_ATA_IDE1_OFFSET,
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118#endif
119};
120
15647dc7 121
c7de829c 122#ifndef CONFIG_AMIGAONEG3SE
6d0f6bcf 123static int ide_bus_ok[CONFIG_SYS_IDE_MAXBUS];
c7de829c 124#else
6d0f6bcf 125static int ide_bus_ok[CONFIG_SYS_IDE_MAXBUS] = {0,};
c7de829c 126#endif
c609719b 127
6d0f6bcf 128block_dev_desc_t ide_dev_desc[CONFIG_SYS_IDE_MAXDEVICE];
c609719b
WD
129/* ------------------------------------------------------------------------- */
130
131#ifdef CONFIG_IDE_LED
e2ffd59b 132#if !defined(CONFIG_KUP4K) && !defined(CONFIG_KUP4X) &&!defined(CONFIG_BMS2003) &&!defined(CONFIG_CPC45)
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WD
133static void ide_led (uchar led, uchar status);
134#else
1f53a416
WD
135extern void ide_led (uchar led, uchar status);
136#endif
137#else
c7de829c 138#ifndef CONFIG_AMIGAONEG3SE
c609719b 139#define ide_led(a,b) /* dummy */
c7de829c
WD
140#else
141extern void ide_led(uchar led, uchar status);
142#define LED_IDE1 1
143#define LED_IDE2 2
144#define CONFIG_IDE_LED 1
145#define DEVICE_LED(x) 1
146#endif
c609719b
WD
147#endif
148
149#ifdef CONFIG_IDE_RESET
150static void ide_reset (void);
151#else
152#define ide_reset() /* dummy */
153#endif
154
155static void ide_ident (block_dev_desc_t *dev_desc);
156static uchar ide_wait (int dev, ulong t);
157
158#define IDE_TIME_OUT 2000 /* 2 sec timeout */
159
160#define ATAPI_TIME_OUT 7000 /* 7 sec timeout (5 sec seems to work...) */
161
162#define IDE_SPIN_UP_TIME_OUT 5000 /* 5 sec spin-up timeout */
163
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164static void input_data(int dev, ulong *sect_buf, int words);
165static void output_data(int dev, ulong *sect_buf, int words);
166static void ident_cpy (unsigned char *dest, unsigned char *src, unsigned int len);
167
6d0f6bcf
JCPV
168#ifndef CONFIG_SYS_ATA_PORT_ADDR
169#define CONFIG_SYS_ATA_PORT_ADDR(port) (port)
566a494f 170#endif
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171
172#ifdef CONFIG_ATAPI
173static void atapi_inquiry(block_dev_desc_t *dev_desc);
eb867a76 174ulong atapi_read (int device, lbaint_t blknr, ulong blkcnt, void *buffer);
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175#endif
176
177
178#ifdef CONFIG_IDE_8xx_DIRECT
179static void set_pcmcia_timing (int pmode);
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180#endif
181
182/* ------------------------------------------------------------------------- */
183
184int do_ide (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
185{
186 int rcode = 0;
187
188 switch (argc) {
189 case 0:
190 case 1:
191 printf ("Usage:\n%s\n", cmdtp->usage);
192 return 1;
193 case 2:
194 if (strncmp(argv[1],"res",3) == 0) {
195 puts ("\nReset IDE"
196#ifdef CONFIG_IDE_8xx_DIRECT
197 " on PCMCIA " PCMCIA_SLOT_MSG
198#endif
199 ": ");
200
201 ide_init ();
202 return 0;
203 } else if (strncmp(argv[1],"inf",3) == 0) {
204 int i;
205
206 putc ('\n');
207
6d0f6bcf 208 for (i=0; i<CONFIG_SYS_IDE_MAXDEVICE; ++i) {
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WD
209 if (ide_dev_desc[i].type==DEV_TYPE_UNKNOWN)
210 continue; /* list only known devices */
211 printf ("IDE device %d: ", i);
212 dev_print(&ide_dev_desc[i]);
213 }
214 return 0;
215
216 } else if (strncmp(argv[1],"dev",3) == 0) {
6d0f6bcf 217 if ((curr_device < 0) || (curr_device >= CONFIG_SYS_IDE_MAXDEVICE)) {
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WD
218 puts ("\nno IDE devices available\n");
219 return 1;
220 }
221 printf ("\nIDE device %d: ", curr_device);
222 dev_print(&ide_dev_desc[curr_device]);
223 return 0;
224 } else if (strncmp(argv[1],"part",4) == 0) {
225 int dev, ok;
226
6d0f6bcf 227 for (ok=0, dev=0; dev<CONFIG_SYS_IDE_MAXDEVICE; ++dev) {
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WD
228 if (ide_dev_desc[dev].part_type!=PART_TYPE_UNKNOWN) {
229 ++ok;
230 if (dev)
231 putc ('\n');
232 print_part(&ide_dev_desc[dev]);
233 }
234 }
235 if (!ok) {
236 puts ("\nno IDE devices available\n");
237 rcode ++;
238 }
239 return rcode;
240 }
241 printf ("Usage:\n%s\n", cmdtp->usage);
242 return 1;
243 case 3:
244 if (strncmp(argv[1],"dev",3) == 0) {
245 int dev = (int)simple_strtoul(argv[2], NULL, 10);
246
247 printf ("\nIDE device %d: ", dev);
6d0f6bcf 248 if (dev >= CONFIG_SYS_IDE_MAXDEVICE) {
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249 puts ("unknown device\n");
250 return 1;
251 }
252 dev_print(&ide_dev_desc[dev]);
253 /*ide_print (dev);*/
254
255 if (ide_dev_desc[dev].type == DEV_TYPE_UNKNOWN) {
256 return 1;
257 }
258
259 curr_device = dev;
260
261 puts ("... is now current device\n");
262
263 return 0;
264 } else if (strncmp(argv[1],"part",4) == 0) {
265 int dev = (int)simple_strtoul(argv[2], NULL, 10);
266
267 if (ide_dev_desc[dev].part_type!=PART_TYPE_UNKNOWN) {
268 print_part(&ide_dev_desc[dev]);
269 } else {
270 printf ("\nIDE device %d not available\n", dev);
271 rcode = 1;
272 }
273 return rcode;
274#if 0
275 } else if (strncmp(argv[1],"pio",4) == 0) {
276 int mode = (int)simple_strtoul(argv[2], NULL, 10);
277
278 if ((mode >= 0) && (mode <= IDE_MAX_PIO_MODE)) {
279 puts ("\nSetting ");
280 pio_mode = mode;
281 ide_init ();
282 } else {
283 printf ("\nInvalid PIO mode %d (0 ... %d only)\n",
284 mode, IDE_MAX_PIO_MODE);
285 }
286 return;
287#endif
288 }
289
290 printf ("Usage:\n%s\n", cmdtp->usage);
291 return 1;
292 default:
293 /* at least 4 args */
294
295 if (strcmp(argv[1],"read") == 0) {
296 ulong addr = simple_strtoul(argv[2], NULL, 16);
c609719b
WD
297 ulong cnt = simple_strtoul(argv[4], NULL, 16);
298 ulong n;
6d0f6bcf 299#ifdef CONFIG_SYS_64BIT_LBA
42dfe7a1 300 lbaint_t blk = simple_strtoull(argv[3], NULL, 16);
c609719b 301
c40b2956 302 printf ("\nIDE read: device %d block # %qd, count %ld ... ",
c609719b 303 curr_device, blk, cnt);
42dfe7a1
WD
304#else
305 lbaint_t blk = simple_strtoul(argv[3], NULL, 16);
306
307 printf ("\nIDE read: device %d block # %ld, count %ld ... ",
308 curr_device, blk, cnt);
309#endif
c609719b
WD
310
311 n = ide_dev_desc[curr_device].block_read (curr_device,
312 blk, cnt,
313 (ulong *)addr);
314 /* flush cache after read */
315 flush_cache (addr, cnt*ide_dev_desc[curr_device].blksz);
316
317 printf ("%ld blocks read: %s\n",
318 n, (n==cnt) ? "OK" : "ERROR");
319 if (n==cnt) {
320 return 0;
321 } else {
322 return 1;
323 }
324 } else if (strcmp(argv[1],"write") == 0) {
325 ulong addr = simple_strtoul(argv[2], NULL, 16);
c609719b
WD
326 ulong cnt = simple_strtoul(argv[4], NULL, 16);
327 ulong n;
6d0f6bcf 328#ifdef CONFIG_SYS_64BIT_LBA
42dfe7a1 329 lbaint_t blk = simple_strtoull(argv[3], NULL, 16);
c609719b 330
c40b2956 331 printf ("\nIDE write: device %d block # %qd, count %ld ... ",
c609719b 332 curr_device, blk, cnt);
42dfe7a1
WD
333#else
334 lbaint_t blk = simple_strtoul(argv[3], NULL, 16);
335
336 printf ("\nIDE write: device %d block # %ld, count %ld ... ",
337 curr_device, blk, cnt);
338#endif
c609719b
WD
339
340 n = ide_write (curr_device, blk, cnt, (ulong *)addr);
341
342 printf ("%ld blocks written: %s\n",
343 n, (n==cnt) ? "OK" : "ERROR");
344 if (n==cnt) {
345 return 0;
346 } else {
347 return 1;
348 }
349 } else {
350 printf ("Usage:\n%s\n", cmdtp->usage);
351 rcode = 1;
352 }
353
354 return rcode;
355 }
356}
357
358int do_diskboot (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
359{
360 char *boot_device = NULL;
361 char *ep;
362 int dev, part = 0;
b97a2a0a 363 ulong addr, cnt;
c609719b
WD
364 disk_partition_t info;
365 image_header_t *hdr;
366 int rcode = 0;
09475f75 367#if defined(CONFIG_FIT)
3bab76a2 368 const void *fit_hdr = NULL;
09475f75 369#endif
c609719b 370
fad63407 371 show_boot_progress (41);
c609719b
WD
372 switch (argc) {
373 case 1:
6d0f6bcf 374 addr = CONFIG_SYS_LOAD_ADDR;
c609719b
WD
375 boot_device = getenv ("bootdevice");
376 break;
377 case 2:
378 addr = simple_strtoul(argv[1], NULL, 16);
379 boot_device = getenv ("bootdevice");
380 break;
381 case 3:
382 addr = simple_strtoul(argv[1], NULL, 16);
383 boot_device = argv[2];
384 break;
385 default:
386 printf ("Usage:\n%s\n", cmdtp->usage);
fad63407 387 show_boot_progress (-42);
c609719b
WD
388 return 1;
389 }
fad63407 390 show_boot_progress (42);
c609719b
WD
391
392 if (!boot_device) {
393 puts ("\n** No boot device **\n");
fad63407 394 show_boot_progress (-43);
c609719b
WD
395 return 1;
396 }
fad63407 397 show_boot_progress (43);
c609719b
WD
398
399 dev = simple_strtoul(boot_device, &ep, 16);
400
401 if (ide_dev_desc[dev].type==DEV_TYPE_UNKNOWN) {
402 printf ("\n** Device %d not available\n", dev);
fad63407 403 show_boot_progress (-44);
c609719b
WD
404 return 1;
405 }
fad63407 406 show_boot_progress (44);
c609719b
WD
407
408 if (*ep) {
409 if (*ep != ':') {
410 puts ("\n** Invalid boot device, use `dev[:part]' **\n");
fad63407 411 show_boot_progress (-45);
c609719b
WD
412 return 1;
413 }
414 part = simple_strtoul(++ep, NULL, 16);
415 }
fad63407 416 show_boot_progress (45);
7882751c 417 if (get_partition_info (&ide_dev_desc[dev], part, &info)) {
fad63407 418 show_boot_progress (-46);
c609719b
WD
419 return 1;
420 }
fad63407 421 show_boot_progress (46);
77ddac94
WD
422 if ((strncmp((char *)info.type, BOOT_PART_TYPE, sizeof(info.type)) != 0) &&
423 (strncmp((char *)info.type, BOOT_PART_COMP, sizeof(info.type)) != 0)) {
c609719b
WD
424 printf ("\n** Invalid partition type \"%.32s\""
425 " (expect \"" BOOT_PART_TYPE "\")\n",
426 info.type);
fad63407 427 show_boot_progress (-47);
c609719b
WD
428 return 1;
429 }
fad63407 430 show_boot_progress (47);
c609719b
WD
431
432 printf ("\nLoading from IDE device %d, partition %d: "
433 "Name: %.32s Type: %.32s\n",
434 dev, part, info.name, info.type);
435
1a344f29 436 debug ("First Block: %ld, # of blocks: %ld, Block Size: %ld\n",
c609719b
WD
437 info.start, info.size, info.blksz);
438
439 if (ide_dev_desc[dev].block_read (dev, info.start, 1, (ulong *)addr) != 1) {
440 printf ("** Read error on %d:%d\n", dev, part);
fad63407 441 show_boot_progress (-48);
c609719b
WD
442 return 1;
443 }
fad63407 444 show_boot_progress (48);
c609719b 445
9a4daad0 446 switch (genimg_get_format ((void *)addr)) {
d5934ad7
MB
447 case IMAGE_FORMAT_LEGACY:
448 hdr = (image_header_t *)addr;
c609719b 449
d5934ad7
MB
450 show_boot_progress (49);
451
452 if (!image_check_hcrc (hdr)) {
453 puts ("\n** Bad Header Checksum **\n");
454 show_boot_progress (-50);
455 return 1;
456 }
457 show_boot_progress (50);
c609719b 458
d5934ad7
MB
459 image_print_contents (hdr);
460
461 cnt = image_get_image_size (hdr);
462 break;
463#if defined(CONFIG_FIT)
464 case IMAGE_FORMAT_FIT:
09475f75 465 fit_hdr = (const void *)addr;
09475f75
MB
466 puts ("Fit image detected...\n");
467
468 cnt = fit_get_size (fit_hdr);
469 break;
d5934ad7
MB
470#endif
471 default:
09475f75 472 show_boot_progress (-49);
d5934ad7 473 puts ("** Unknown image type\n");
1a344f29
WD
474 return 1;
475 }
1a344f29 476
1a344f29
WD
477 cnt += info.blksz - 1;
478 cnt /= info.blksz;
479 cnt -= 1;
480
c609719b
WD
481 if (ide_dev_desc[dev].block_read (dev, info.start+1, cnt,
482 (ulong *)(addr+info.blksz)) != cnt) {
483 printf ("** Read error on %d:%d\n", dev, part);
fad63407 484 show_boot_progress (-51);
c609719b
WD
485 return 1;
486 }
fad63407 487 show_boot_progress (51);
c609719b 488
09475f75
MB
489#if defined(CONFIG_FIT)
490 /* This cannot be done earlier, we need complete FIT image in RAM first */
3bab76a2
MB
491 if (genimg_get_format ((void *)addr) == IMAGE_FORMAT_FIT) {
492 if (!fit_check_format (fit_hdr)) {
493 show_boot_progress (-140);
494 puts ("** Bad FIT image format\n");
495 return 1;
496 }
497 show_boot_progress (141);
498 fit_print_contents (fit_hdr);
499 }
09475f75 500#endif
c609719b
WD
501
502 /* Loading ok, update default load address */
503
504 load_addr = addr;
505
506 /* Check if we should attempt an auto-start */
507 if (((ep = getenv("autostart")) != NULL) && (strcmp(ep,"yes") == 0)) {
508 char *local_args[2];
509 extern int do_bootm (cmd_tbl_t *, int, int, char *[]);
510
511 local_args[0] = argv[0];
512 local_args[1] = NULL;
513
514 printf ("Automatic boot of image at addr 0x%08lX ...\n", addr);
515
516 do_bootm (cmdtp, 0, 1, local_args);
517 rcode = 1;
518 }
519 return rcode;
520}
521
522/* ------------------------------------------------------------------------- */
523
f2302d44
SR
524void inline
525__ide_outb(int dev, int port, unsigned char val)
526{
527 debug ("ide_outb (dev= %d, port= 0x%x, val= 0x%02x) : @ 0x%08lx\n",
6d0f6bcf
JCPV
528 dev, port, val, (ATA_CURR_BASE(dev)+CONFIG_SYS_ATA_PORT_ADDR(port)));
529 outb(val, (ATA_CURR_BASE(dev)+CONFIG_SYS_ATA_PORT_ADDR(port)));
f2302d44
SR
530}
531void inline ide_outb (int dev, int port, unsigned char val)
532 __attribute__((weak, alias("__ide_outb")));
533
534unsigned char inline
535__ide_inb(int dev, int port)
536{
537 uchar val;
6d0f6bcf 538 val = inb((ATA_CURR_BASE(dev)+CONFIG_SYS_ATA_PORT_ADDR(port)));
f2302d44 539 debug ("ide_inb (dev= %d, port= 0x%x) : @ 0x%08lx -> 0x%02x\n",
6d0f6bcf 540 dev, port, (ATA_CURR_BASE(dev)+CONFIG_SYS_ATA_PORT_ADDR(port)), val);
f2302d44
SR
541 return val;
542}
543unsigned char inline ide_inb(int dev, int port)
544 __attribute__((weak, alias("__ide_inb")));
545
36c2d306
SF
546#ifdef CONFIG_TUNE_PIO
547int inline
548__ide_set_piomode(int pio_mode)
549{
550 return 0;
551}
552int inline ide_set_piomode(int pio_mode)
553 __attribute__((weak, alias("__ide_set_piomode")));
554#endif
555
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WD
556void ide_init (void)
557{
c609719b
WD
558
559#ifdef CONFIG_IDE_8xx_DIRECT
6d0f6bcf 560 volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
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WD
561 volatile pcmconf8xx_t *pcmp = &(immr->im_pcmcia);
562#endif
563 unsigned char c;
564 int i, bus;
51056dd9 565#if defined(CONFIG_AMIGAONEG3SE) || defined(CONFIG_SC3)
9045f33c
WD
566 unsigned int ata_reset_time = ATA_RESET_TIME;
567 char *s;
51056dd9 568#endif
c7de829c
WD
569#ifdef CONFIG_AMIGAONEG3SE
570 unsigned int max_bus_scan;
c7de829c 571#endif
9fd5e31f
WD
572#ifdef CONFIG_IDE_8xx_PCCARD
573 extern int pcmcia_on (void);
574 extern int ide_devices_found; /* Initialized in check_ide_device() */
575#endif /* CONFIG_IDE_8xx_PCCARD */
576
577#ifdef CONFIG_IDE_PREINIT
4d13cbad 578 extern int ide_preinit (void);
9fd5e31f
WD
579 WATCHDOG_RESET();
580
581 if (ide_preinit ()) {
582 puts ("ide_preinit failed\n");
583 return;
584 }
585#endif /* CONFIG_IDE_PREINIT */
c609719b
WD
586
587#ifdef CONFIG_IDE_8xx_PCCARD
588 extern int pcmcia_on (void);
6069ff26 589 extern int ide_devices_found; /* Initialized in check_ide_device() */
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WD
590
591 WATCHDOG_RESET();
592
6069ff26 593 ide_devices_found = 0;
c609719b 594 /* initialize the PCMCIA IDE adapter card */
6069ff26
WD
595 pcmcia_on();
596 if (!ide_devices_found)
c609719b
WD
597 return;
598 udelay (1000000); /* 1 s */
599#endif /* CONFIG_IDE_8xx_PCCARD */
600
601 WATCHDOG_RESET();
602
15647dc7 603#ifdef CONFIG_IDE_8xx_DIRECT
c609719b
WD
604 /* Initialize PIO timing tables */
605 for (i=0; i <= IDE_MAX_PIO_MODE; ++i) {
1a344f29
WD
606 pio_config_clk[i].t_setup = PCMCIA_MK_CLKS(pio_config_ns[i].t_setup,
607 gd->bus_clk);
608 pio_config_clk[i].t_length = PCMCIA_MK_CLKS(pio_config_ns[i].t_length,
609 gd->bus_clk);
610 pio_config_clk[i].t_hold = PCMCIA_MK_CLKS(pio_config_ns[i].t_hold,
611 gd->bus_clk);
612 debug ( "PIO Mode %d: setup=%2d ns/%d clk"
613 " len=%3d ns/%d clk"
614 " hold=%2d ns/%d clk\n",
615 i,
616 pio_config_ns[i].t_setup, pio_config_clk[i].t_setup,
617 pio_config_ns[i].t_length, pio_config_clk[i].t_length,
618 pio_config_ns[i].t_hold, pio_config_clk[i].t_hold);
c609719b 619 }
15647dc7 620#endif /* CONFIG_IDE_8xx_DIRECT */
c609719b
WD
621
622 /* Reset the IDE just to be sure.
623 * Light LED's to show
624 */
625 ide_led ((LED_IDE1 | LED_IDE2), 1); /* LED's on */
626 ide_reset (); /* ATAPI Drives seems to need a proper IDE Reset */
627
628#ifdef CONFIG_IDE_8xx_DIRECT
629 /* PCMCIA / IDE initialization for common mem space */
630 pcmp->pcmc_pgcrb = 0;
c609719b
WD
631
632 /* start in PIO mode 0 - most relaxed timings */
633 pio_mode = 0;
634 set_pcmcia_timing (pio_mode);
15647dc7 635#endif /* CONFIG_IDE_8xx_DIRECT */
c609719b
WD
636
637 /*
638 * Wait for IDE to get ready.
639 * According to spec, this can take up to 31 seconds!
640 */
c7de829c 641#ifndef CONFIG_AMIGAONEG3SE
6d0f6bcf
JCPV
642 for (bus=0; bus<CONFIG_SYS_IDE_MAXBUS; ++bus) {
643 int dev = bus * (CONFIG_SYS_IDE_MAXDEVICE / CONFIG_SYS_IDE_MAXBUS);
c7de829c
WD
644#else
645 s = getenv("ide_maxbus");
646 if (s)
1a344f29 647 max_bus_scan = simple_strtol(s, NULL, 10);
c7de829c 648 else
6d0f6bcf 649 max_bus_scan = CONFIG_SYS_IDE_MAXBUS;
c7de829c
WD
650
651 for (bus=0; bus<max_bus_scan; ++bus) {
6d0f6bcf 652 int dev = bus * (CONFIG_SYS_IDE_MAXDEVICE / max_bus_scan);
c7de829c 653#endif
c609719b 654
6069ff26
WD
655#ifdef CONFIG_IDE_8xx_PCCARD
656 /* Skip non-ide devices from probing */
657 if ((ide_devices_found & (1 << bus)) == 0) {
658 ide_led ((LED_IDE1 | LED_IDE2), 0); /* LED's off */
659 continue;
660 }
661#endif
c609719b
WD
662 printf ("Bus %d: ", bus);
663
664 ide_bus_ok[bus] = 0;
665
666 /* Select device
667 */
668 udelay (100000); /* 100 ms */
2262cfee 669 ide_outb (dev, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(dev));
c609719b 670 udelay (100000); /* 100 ms */
51056dd9
WD
671#if defined(CONFIG_AMIGAONEG3SE) || defined(CONFIG_SC3)
672 if ((s = getenv("ide_reset_timeout")) != NULL)
673 ata_reset_time = simple_strtol(s, NULL, 10);
c7de829c 674#endif
c609719b
WD
675 i = 0;
676 do {
677 udelay (10000); /* 10 ms */
678
2262cfee 679 c = ide_inb (dev, ATA_STATUS);
c609719b 680 i++;
51056dd9 681#if defined(CONFIG_AMIGAONEG3SE) || defined(CONFIG_SC3)
c7de829c
WD
682 if (i > (ata_reset_time * 100)) {
683#else
c609719b 684 if (i > (ATA_RESET_TIME * 100)) {
c7de829c 685#endif
c609719b
WD
686 puts ("** Timeout **\n");
687 ide_led ((LED_IDE1 | LED_IDE2), 0); /* LED's off */
c7de829c
WD
688#ifdef CONFIG_AMIGAONEG3SE
689 /* If this is the second bus, the first one was OK */
c40b2956 690 if (bus != 0) {
1a344f29
WD
691 ide_bus_ok[bus] = 0;
692 goto skip_bus;
c7de829c
WD
693 }
694#endif
c609719b
WD
695 return;
696 }
697 if ((i >= 100) && ((i%100)==0)) {
698 putc ('.');
699 }
700 } while (c & ATA_STAT_BUSY);
701
702 if (c & (ATA_STAT_BUSY | ATA_STAT_FAULT)) {
703 puts ("not available ");
1a344f29 704 debug ("Status = 0x%02X ", c);
c609719b
WD
705#ifndef CONFIG_ATAPI /* ATAPI Devices do not set DRDY */
706 } else if ((c & ATA_STAT_READY) == 0) {
707 puts ("not available ");
1a344f29 708 debug ("Status = 0x%02X ", c);
c609719b
WD
709#endif
710 } else {
711 puts ("OK ");
712 ide_bus_ok[bus] = 1;
713 }
714 WATCHDOG_RESET();
715 }
c7de829c
WD
716
717#ifdef CONFIG_AMIGAONEG3SE
718 skip_bus:
719#endif
c609719b
WD
720 putc ('\n');
721
722 ide_led ((LED_IDE1 | LED_IDE2), 0); /* LED's off */
723
724 curr_device = -1;
6d0f6bcf 725 for (i=0; i<CONFIG_SYS_IDE_MAXDEVICE; ++i) {
c609719b
WD
726#ifdef CONFIG_IDE_LED
727 int led = (IDE_BUS(i) == 0) ? LED_IDE1 : LED_IDE2;
728#endif
5cf9da48 729 ide_dev_desc[i].type=DEV_TYPE_UNKNOWN;
c609719b
WD
730 ide_dev_desc[i].if_type=IF_TYPE_IDE;
731 ide_dev_desc[i].dev=i;
732 ide_dev_desc[i].part_type=PART_TYPE_UNKNOWN;
733 ide_dev_desc[i].blksz=0;
734 ide_dev_desc[i].lba=0;
735 ide_dev_desc[i].block_read=ide_read;
736 if (!ide_bus_ok[IDE_BUS(i)])
737 continue;
738 ide_led (led, 1); /* LED on */
739 ide_ident(&ide_dev_desc[i]);
740 ide_led (led, 0); /* LED off */
741 dev_print(&ide_dev_desc[i]);
742/* ide_print (i); */
743 if ((ide_dev_desc[i].lba > 0) && (ide_dev_desc[i].blksz > 0)) {
744 init_part (&ide_dev_desc[i]); /* initialize partition type */
745 if (curr_device < 0)
746 curr_device = i;
747 }
748 }
749 WATCHDOG_RESET();
750}
751
752/* ------------------------------------------------------------------------- */
753
754block_dev_desc_t * ide_get_dev(int dev)
755{
6d0f6bcf 756 return (dev < CONFIG_SYS_IDE_MAXDEVICE) ? &ide_dev_desc[dev] : NULL;
c609719b
WD
757}
758
759
760#ifdef CONFIG_IDE_8xx_DIRECT
761
762static void
763set_pcmcia_timing (int pmode)
764{
6d0f6bcf 765 volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
c609719b
WD
766 volatile pcmconf8xx_t *pcmp = &(immr->im_pcmcia);
767 ulong timings;
768
1a344f29 769 debug ("Set timing for PIO Mode %d\n", pmode);
c609719b
WD
770
771 timings = PCMCIA_SHT(pio_config_clk[pmode].t_hold)
772 | PCMCIA_SST(pio_config_clk[pmode].t_setup)
773 | PCMCIA_SL (pio_config_clk[pmode].t_length)
774 ;
775
776 /* IDE 0
777 */
6d0f6bcf
JCPV
778 pcmp->pcmc_pbr0 = CONFIG_SYS_PCMCIA_PBR0;
779 pcmp->pcmc_por0 = CONFIG_SYS_PCMCIA_POR0
780#if (CONFIG_SYS_PCMCIA_POR0 != 0)
c609719b
WD
781 | timings
782#endif
783 ;
1a344f29 784 debug ("PBR0: %08x POR0: %08x\n", pcmp->pcmc_pbr0, pcmp->pcmc_por0);
c609719b 785
6d0f6bcf
JCPV
786 pcmp->pcmc_pbr1 = CONFIG_SYS_PCMCIA_PBR1;
787 pcmp->pcmc_por1 = CONFIG_SYS_PCMCIA_POR1
788#if (CONFIG_SYS_PCMCIA_POR1 != 0)
c609719b
WD
789 | timings
790#endif
791 ;
1a344f29 792 debug ("PBR1: %08x POR1: %08x\n", pcmp->pcmc_pbr1, pcmp->pcmc_por1);
c609719b 793
6d0f6bcf
JCPV
794 pcmp->pcmc_pbr2 = CONFIG_SYS_PCMCIA_PBR2;
795 pcmp->pcmc_por2 = CONFIG_SYS_PCMCIA_POR2
796#if (CONFIG_SYS_PCMCIA_POR2 != 0)
c609719b
WD
797 | timings
798#endif
799 ;
1a344f29 800 debug ("PBR2: %08x POR2: %08x\n", pcmp->pcmc_pbr2, pcmp->pcmc_por2);
c609719b 801
6d0f6bcf
JCPV
802 pcmp->pcmc_pbr3 = CONFIG_SYS_PCMCIA_PBR3;
803 pcmp->pcmc_por3 = CONFIG_SYS_PCMCIA_POR3
804#if (CONFIG_SYS_PCMCIA_POR3 != 0)
c609719b
WD
805 | timings
806#endif
807 ;
1a344f29 808 debug ("PBR3: %08x POR3: %08x\n", pcmp->pcmc_pbr3, pcmp->pcmc_por3);
c609719b
WD
809
810 /* IDE 1
811 */
6d0f6bcf
JCPV
812 pcmp->pcmc_pbr4 = CONFIG_SYS_PCMCIA_PBR4;
813 pcmp->pcmc_por4 = CONFIG_SYS_PCMCIA_POR4
814#if (CONFIG_SYS_PCMCIA_POR4 != 0)
c609719b
WD
815 | timings
816#endif
817 ;
1a344f29 818 debug ("PBR4: %08x POR4: %08x\n", pcmp->pcmc_pbr4, pcmp->pcmc_por4);
c609719b 819
6d0f6bcf
JCPV
820 pcmp->pcmc_pbr5 = CONFIG_SYS_PCMCIA_PBR5;
821 pcmp->pcmc_por5 = CONFIG_SYS_PCMCIA_POR5
822#if (CONFIG_SYS_PCMCIA_POR5 != 0)
c609719b
WD
823 | timings
824#endif
825 ;
1a344f29 826 debug ("PBR5: %08x POR5: %08x\n", pcmp->pcmc_pbr5, pcmp->pcmc_por5);
c609719b 827
6d0f6bcf
JCPV
828 pcmp->pcmc_pbr6 = CONFIG_SYS_PCMCIA_PBR6;
829 pcmp->pcmc_por6 = CONFIG_SYS_PCMCIA_POR6
830#if (CONFIG_SYS_PCMCIA_POR6 != 0)
c609719b
WD
831 | timings
832#endif
833 ;
1a344f29 834 debug ("PBR6: %08x POR6: %08x\n", pcmp->pcmc_pbr6, pcmp->pcmc_por6);
c609719b 835
6d0f6bcf
JCPV
836 pcmp->pcmc_pbr7 = CONFIG_SYS_PCMCIA_PBR7;
837 pcmp->pcmc_por7 = CONFIG_SYS_PCMCIA_POR7
838#if (CONFIG_SYS_PCMCIA_POR7 != 0)
c609719b
WD
839 | timings
840#endif
841 ;
1a344f29 842 debug ("PBR7: %08x POR7: %08x\n", pcmp->pcmc_pbr7, pcmp->pcmc_por7);
c609719b
WD
843
844}
845
846#endif /* CONFIG_IDE_8xx_DIRECT */
847
848/* ------------------------------------------------------------------------- */
849
2262cfee 850#ifdef __PPC__
cceb871f 851# ifdef CONFIG_AMIGAONEG3SE
c7de829c
WD
852static void
853output_data_short(int dev, ulong *sect_buf, int words)
854{
855 ushort *dbuf;
856 volatile ushort *pbuf;
8bde7f77 857
c7de829c
WD
858 pbuf = (ushort *)(ATA_CURR_BASE(dev)+ATA_DATA_REG);
859 dbuf = (ushort *)sect_buf;
860 while (words--) {
5cf91d6b 861 EIEIO;
c7de829c 862 *pbuf = *dbuf++;
5cf91d6b 863 EIEIO;
c7de829c
WD
864 }
865
866 if (words&1)
1a344f29 867 *pbuf = 0;
c7de829c 868}
cceb871f 869# endif /* CONFIG_AMIGAONEG3SE */
5da627a4 870#endif /* __PPC_ */
c7de829c 871
5da627a4
WD
872/* We only need to swap data if we are running on a big endian cpu. */
873/* But Au1x00 cpu:s already swaps data in big endian mode! */
0c32d96d 874#if defined(__LITTLE_ENDIAN) || ( defined(CONFIG_AU1X00) && !defined(CONFIG_GTH2) )
5da627a4
WD
875#define input_swap_data(x,y,z) input_data(x,y,z)
876#else
c609719b
WD
877static void
878input_swap_data(int dev, ulong *sect_buf, int words)
879{
1a344f29 880#if defined(CONFIG_HMI10) || defined(CONFIG_CPC45)
a522fa0e
WD
881 uchar i;
882 volatile uchar *pbuf_even = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_EVEN);
883 volatile uchar *pbuf_odd = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_ODD);
884 ushort *dbuf = (ushort *)sect_buf;
885
886 while (words--) {
887 for (i=0; i<2; i++) {
888 *(((uchar *)(dbuf)) + 1) = *pbuf_even;
889 *(uchar *)dbuf = *pbuf_odd;
890 dbuf+=1;
891 }
892 }
f4733a07 893#else
1a344f29
WD
894 volatile ushort *pbuf = (ushort *)(ATA_CURR_BASE(dev)+ATA_DATA_REG);
895 ushort *dbuf = (ushort *)sect_buf;
896
897 debug("in input swap data base for read is %lx\n", (unsigned long) pbuf);
898
899 while (words--) {
0c32d96d
WD
900#ifdef __MIPS__
901 *dbuf++ = swab16p((u16*)pbuf);
902 *dbuf++ = swab16p((u16*)pbuf);
566a494f
HS
903#elif defined(CONFIG_PCS440EP)
904 *dbuf++ = *pbuf;
905 *dbuf++ = *pbuf;
0c32d96d 906#else
1a344f29
WD
907 *dbuf++ = ld_le16(pbuf);
908 *dbuf++ = ld_le16(pbuf);
0c32d96d 909#endif /* !MIPS */
1a344f29
WD
910 }
911#endif
c609719b 912}
5da627a4 913#endif /* __LITTLE_ENDIAN || CONFIG_AU1X00 */
2262cfee
WD
914
915
eda3e1e6 916#if defined(__PPC__) || defined(CONFIG_PXA_PCMCIA) || defined(CONFIG_SH)
c609719b
WD
917static void
918output_data(int dev, ulong *sect_buf, int words)
919{
1a344f29 920#if defined(CONFIG_HMI10) || defined(CONFIG_CPC45)
a522fa0e
WD
921 uchar *dbuf;
922 volatile uchar *pbuf_even;
923 volatile uchar *pbuf_odd;
924
925 pbuf_even = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_EVEN);
926 pbuf_odd = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_ODD);
927 dbuf = (uchar *)sect_buf;
928 while (words--) {
5cf91d6b 929 EIEIO;
a522fa0e 930 *pbuf_even = *dbuf++;
5cf91d6b 931 EIEIO;
a522fa0e 932 *pbuf_odd = *dbuf++;
5cf91d6b 933 EIEIO;
a522fa0e 934 *pbuf_even = *dbuf++;
5cf91d6b 935 EIEIO;
a522fa0e
WD
936 *pbuf_odd = *dbuf++;
937 }
1a344f29
WD
938#else
939 ushort *dbuf;
940 volatile ushort *pbuf;
941
942 pbuf = (ushort *)(ATA_CURR_BASE(dev)+ATA_DATA_REG);
943 dbuf = (ushort *)sect_buf;
944 while (words--) {
566a494f
HS
945#if defined(CONFIG_PCS440EP)
946 /* not tested, because CF was write protected */
947 EIEIO;
948 *pbuf = ld_le16(dbuf++);
949 EIEIO;
950 *pbuf = ld_le16(dbuf++);
951#else
1a344f29
WD
952 EIEIO;
953 *pbuf = *dbuf++;
954 EIEIO;
955 *pbuf = *dbuf++;
566a494f 956#endif
1a344f29
WD
957 }
958#endif
c609719b 959}
2262cfee
WD
960#else /* ! __PPC__ */
961static void
962output_data(int dev, ulong *sect_buf, int words)
963{
15647dc7 964 outsw(ATA_CURR_BASE(dev)+ATA_DATA_REG, sect_buf, words<<1);
2262cfee
WD
965}
966#endif /* __PPC__ */
c609719b 967
eda3e1e6 968#if defined(__PPC__) || defined(CONFIG_PXA_PCMCIA) || defined(CONFIG_SH)
c609719b
WD
969static void
970input_data(int dev, ulong *sect_buf, int words)
971{
1a344f29 972#if defined(CONFIG_HMI10) || defined(CONFIG_CPC45)
a522fa0e
WD
973 uchar *dbuf;
974 volatile uchar *pbuf_even;
975 volatile uchar *pbuf_odd;
976
977 pbuf_even = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_EVEN);
978 pbuf_odd = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_ODD);
979 dbuf = (uchar *)sect_buf;
980 while (words--) {
1a344f29 981 *dbuf++ = *pbuf_even;
cd172b71 982 EIEIO;
1a344f29
WD
983 SYNC;
984 *dbuf++ = *pbuf_odd;
5cf91d6b 985 EIEIO;
1a344f29 986 SYNC;
a522fa0e 987 *dbuf++ = *pbuf_even;
5cf91d6b 988 EIEIO;
1a344f29 989 SYNC;
a522fa0e 990 *dbuf++ = *pbuf_odd;
5cf91d6b 991 EIEIO;
1a344f29
WD
992 SYNC;
993 }
994#else
995 ushort *dbuf;
996 volatile ushort *pbuf;
997
998 pbuf = (ushort *)(ATA_CURR_BASE(dev)+ATA_DATA_REG);
999 dbuf = (ushort *)sect_buf;
1000
1001 debug("in input data base for read is %lx\n", (unsigned long) pbuf);
1002
1003 while (words--) {
566a494f
HS
1004#if defined(CONFIG_PCS440EP)
1005 EIEIO;
1006 *dbuf++ = ld_le16(pbuf);
1007 EIEIO;
1008 *dbuf++ = ld_le16(pbuf);
1009#else
cd172b71 1010 EIEIO;
1a344f29 1011 *dbuf++ = *pbuf;
cd172b71 1012 EIEIO;
1a344f29 1013 *dbuf++ = *pbuf;
566a494f 1014#endif
a522fa0e 1015 }
1a344f29 1016#endif
c609719b 1017}
2262cfee
WD
1018#else /* ! __PPC__ */
1019static void
1020input_data(int dev, ulong *sect_buf, int words)
1021{
15647dc7 1022 insw(ATA_CURR_BASE(dev)+ATA_DATA_REG, sect_buf, words << 1);
2262cfee
WD
1023}
1024
1025#endif /* __PPC__ */
c609719b 1026
c7de829c
WD
1027#ifdef CONFIG_AMIGAONEG3SE
1028static void
1029input_data_short(int dev, ulong *sect_buf, int words)
1030{
1031 ushort *dbuf;
1032 volatile ushort *pbuf;
1033
1034 pbuf = (ushort *)(ATA_CURR_BASE(dev)+ATA_DATA_REG);
1035 dbuf = (ushort *)sect_buf;
1036 while (words--) {
5cf91d6b 1037 EIEIO;
c7de829c 1038 *dbuf++ = *pbuf;
5cf91d6b 1039 EIEIO;
c7de829c
WD
1040 }
1041
c40b2956 1042 if (words&1) {
1a344f29
WD
1043 ushort dummy;
1044 dummy = *pbuf;
c7de829c
WD
1045 }
1046}
1047#endif
1048
c609719b
WD
1049/* -------------------------------------------------------------------------
1050 */
1051static void ide_ident (block_dev_desc_t *dev_desc)
1052{
1053 ulong iobuf[ATA_SECTORWORDS];
1054 unsigned char c;
1055 hd_driveid_t *iop = (hd_driveid_t *)iobuf;
1056
c7de829c
WD
1057#ifdef CONFIG_AMIGAONEG3SE
1058 int max_bus_scan;
c7de829c 1059 char *s;
64f70bed
WD
1060#endif
1061#ifdef CONFIG_ATAPI
1062 int retries = 0;
c7de829c
WD
1063 int do_retry = 0;
1064#endif
1065
36c2d306
SF
1066#ifdef CONFIG_TUNE_PIO
1067 int pio_mode;
1068#endif
1069
c609719b
WD
1070#if 0
1071 int mode, cycle_time;
1072#endif
1073 int device;
1074 device=dev_desc->dev;
1075 printf (" Device %d: ", device);
1076
c7de829c
WD
1077#ifdef CONFIG_AMIGAONEG3SE
1078 s = getenv("ide_maxbus");
1079 if (s) {
1080 max_bus_scan = simple_strtol(s, NULL, 10);
1081 } else {
6d0f6bcf 1082 max_bus_scan = CONFIG_SYS_IDE_MAXBUS;
c7de829c
WD
1083 }
1084 if (device >= max_bus_scan*2) {
1085 dev_desc->type=DEV_TYPE_UNKNOWN;
1086 return;
1087 }
1088#endif
1089
c609719b
WD
1090 ide_led (DEVICE_LED(device), 1); /* LED on */
1091 /* Select device
1092 */
2262cfee 1093 ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
c609719b
WD
1094 dev_desc->if_type=IF_TYPE_IDE;
1095#ifdef CONFIG_ATAPI
c7de829c 1096
c7de829c
WD
1097 do_retry = 0;
1098 retries = 0;
1099
1100 /* Warning: This will be tricky to read */
c40b2956 1101 while (retries <= 1) {
c609719b 1102 /* check signature */
2262cfee
WD
1103 if ((ide_inb(device,ATA_SECT_CNT) == 0x01) &&
1104 (ide_inb(device,ATA_SECT_NUM) == 0x01) &&
1105 (ide_inb(device,ATA_CYL_LOW) == 0x14) &&
1106 (ide_inb(device,ATA_CYL_HIGH) == 0xEB)) {
c609719b
WD
1107 /* ATAPI Signature found */
1108 dev_desc->if_type=IF_TYPE_ATAPI;
1109 /* Start Ident Command
1110 */
2262cfee 1111 ide_outb (device, ATA_COMMAND, ATAPI_CMD_IDENT);
c609719b
WD
1112 /*
1113 * Wait for completion - ATAPI devices need more time
1114 * to become ready
1115 */
1116 c = ide_wait (device, ATAPI_TIME_OUT);
c40b2956 1117 } else
c609719b
WD
1118#endif
1119 {
1120 /* Start Ident Command
1121 */
2262cfee 1122 ide_outb (device, ATA_COMMAND, ATA_CMD_IDENT);
c609719b
WD
1123
1124 /* Wait for completion
1125 */
1126 c = ide_wait (device, IDE_TIME_OUT);
1127 }
1128 ide_led (DEVICE_LED(device), 0); /* LED off */
1129
1130 if (((c & ATA_STAT_DRQ) == 0) ||
1131 ((c & (ATA_STAT_FAULT|ATA_STAT_ERR)) != 0) ) {
64f70bed 1132#ifdef CONFIG_ATAPI
c7de829c 1133#ifdef CONFIG_AMIGAONEG3SE
64f70bed
WD
1134 s = getenv("ide_doreset");
1135 if (s && strcmp(s, "on") == 0)
1136#endif
1a344f29
WD
1137 {
1138 /* Need to soft reset the device in case it's an ATAPI... */
1139 debug ("Retrying...\n");
1140 ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
1141 udelay(100000);
1142 ide_outb (device, ATA_COMMAND, 0x08);
1143 udelay (500000); /* 500 ms */
1144 }
64f70bed
WD
1145 /* Select device
1146 */
c7de829c 1147 ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
c7de829c 1148 retries++;
64f70bed
WD
1149#else
1150 return;
1151#endif
c609719b 1152 }
64f70bed
WD
1153#ifdef CONFIG_ATAPI
1154 else
1155 break;
c7de829c 1156 } /* see above - ugly to read */
64f70bed
WD
1157
1158 if (retries == 2) /* Not found */
1159 return;
1160#endif
c609719b
WD
1161
1162 input_swap_data (device, iobuf, ATA_SECTORWORDS);
1163
7a60ee7c
JCPV
1164 ident_cpy ((unsigned char*)dev_desc->revision, iop->fw_rev, sizeof(dev_desc->revision));
1165 ident_cpy ((unsigned char*)dev_desc->vendor, iop->model, sizeof(dev_desc->vendor));
1166 ident_cpy ((unsigned char*)dev_desc->product, iop->serial_no, sizeof(dev_desc->product));
c3f9d493
WD
1167#ifdef __LITTLE_ENDIAN
1168 /*
1169 * firmware revision and model number have Big Endian Byte
1170 * order in Word. Convert both to little endian.
1171 *
1172 * See CF+ and CompactFlash Specification Revision 2.0:
1173 * 6.2.1.6: Identfy Drive, Table 39 for more details
1174 */
1175
1176 strswab (dev_desc->revision);
1177 strswab (dev_desc->vendor);
1178#endif /* __LITTLE_ENDIAN */
c609719b
WD
1179
1180 if ((iop->config & 0x0080)==0x0080)
1181 dev_desc->removable = 1;
1182 else
1183 dev_desc->removable = 0;
1184
36c2d306
SF
1185#ifdef CONFIG_TUNE_PIO
1186 /* Mode 0 - 2 only, are directly determined by word 51. */
1187 pio_mode = iop->tPIO;
1188 if (pio_mode > 2) {
1189 printf("WARNING: Invalid PIO (word 51 = %d).\n", pio_mode);
1190 pio_mode = 0; /* Force it to dead slow, and hope for the best... */
1191 }
1192
1193 /* Any CompactFlash Storage Card that supports PIO mode 3 or above
1194 * shall set bit 1 of word 53 to one and support the fields contained
1195 * in words 64 through 70.
1196 */
1197 if (iop->field_valid & 0x02) {
1198 /* Mode 3 and above are possible. Check in order from slow
1199 * to fast, so we wind up with the highest mode allowed.
1200 */
1201 if (iop->eide_pio_modes & 0x01)
1202 pio_mode = 3;
1203 if (iop->eide_pio_modes & 0x02)
1204 pio_mode = 4;
1205 if (ata_id_is_cfa((u16 *)iop)) {
1206 if ((iop->cf_advanced_caps & 0x07) == 0x01)
1207 pio_mode = 5;
1208 if ((iop->cf_advanced_caps & 0x07) == 0x02)
1209 pio_mode = 6;
1210 }
1211 }
1212
1213 /* System-specific, depends on bus speeds, etc. */
1214 ide_set_piomode(pio_mode);
1215#endif /* CONFIG_TUNE_PIO */
1216
c609719b
WD
1217#if 0
1218 /*
1219 * Drive PIO mode autoselection
1220 */
1221 mode = iop->tPIO;
1222
1223 printf ("tPIO = 0x%02x = %d\n",mode, mode);
1224 if (mode > 2) { /* 2 is maximum allowed tPIO value */
1225 mode = 2;
1a344f29 1226 debug ("Override tPIO -> 2\n");
c609719b
WD
1227 }
1228 if (iop->field_valid & 2) { /* drive implements ATA2? */
1a344f29 1229 debug ("Drive implements ATA2\n");
c609719b
WD
1230 if (iop->capability & 8) { /* drive supports use_iordy? */
1231 cycle_time = iop->eide_pio_iordy;
1232 } else {
1233 cycle_time = iop->eide_pio;
1234 }
1a344f29 1235 debug ("cycle time = %d\n", cycle_time);
c609719b
WD
1236 mode = 4;
1237 if (cycle_time > 120) mode = 3; /* 120 ns for PIO mode 4 */
1238 if (cycle_time > 180) mode = 2; /* 180 ns for PIO mode 3 */
1239 if (cycle_time > 240) mode = 1; /* 240 ns for PIO mode 4 */
1240 if (cycle_time > 383) mode = 0; /* 383 ns for PIO mode 4 */
1241 }
1242 printf ("PIO mode to use: PIO %d\n", mode);
1243#endif /* 0 */
1244
1245#ifdef CONFIG_ATAPI
1246 if (dev_desc->if_type==IF_TYPE_ATAPI) {
1247 atapi_inquiry(dev_desc);
1248 return;
1249 }
1250#endif /* CONFIG_ATAPI */
1251
c3f9d493 1252#ifdef __BIG_ENDIAN
c609719b
WD
1253 /* swap shorts */
1254 dev_desc->lba = (iop->lba_capacity << 16) | (iop->lba_capacity >> 16);
c3f9d493
WD
1255#else /* ! __BIG_ENDIAN */
1256 /*
1257 * do not swap shorts on little endian
1258 *
1259 * See CF+ and CompactFlash Specification Revision 2.0:
1260 * 6.2.1.6: Identfy Drive, Table 39, Word Address 57-58 for details.
1261 */
1262 dev_desc->lba = iop->lba_capacity;
1263#endif /* __BIG_ENDIAN */
c40b2956 1264
42dfe7a1 1265#ifdef CONFIG_LBA48
c40b2956 1266 if (iop->command_set_2 & 0x0400) { /* LBA 48 support */
6e592385
WD
1267 dev_desc->lba48 = 1;
1268 dev_desc->lba = (unsigned long long)iop->lba48_capacity[0] |
c40b2956
WD
1269 ((unsigned long long)iop->lba48_capacity[1] << 16) |
1270 ((unsigned long long)iop->lba48_capacity[2] << 32) |
1271 ((unsigned long long)iop->lba48_capacity[3] << 48);
1272 } else {
c40b2956
WD
1273 dev_desc->lba48 = 0;
1274 }
1275#endif /* CONFIG_LBA48 */
c609719b
WD
1276 /* assuming HD */
1277 dev_desc->type=DEV_TYPE_HARDDISK;
1278 dev_desc->blksz=ATA_BLOCKSIZE;
1279 dev_desc->lun=0; /* just to fill something in... */
1280
53677ef1 1281#if 0 /* only used to test the powersaving mode,
c609719b
WD
1282 * if enabled, the drive goes after 5 sec
1283 * in standby mode */
2262cfee 1284 ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
c609719b 1285 c = ide_wait (device, IDE_TIME_OUT);
2262cfee
WD
1286 ide_outb (device, ATA_SECT_CNT, 1);
1287 ide_outb (device, ATA_LBA_LOW, 0);
1288 ide_outb (device, ATA_LBA_MID, 0);
1289 ide_outb (device, ATA_LBA_HIGH, 0);
1a344f29 1290 ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
2262cfee 1291 ide_outb (device, ATA_COMMAND, 0xe3);
c609719b
WD
1292 udelay (50);
1293 c = ide_wait (device, IDE_TIME_OUT); /* can't take over 500 ms */
1294#endif
1295}
1296
1297
1298/* ------------------------------------------------------------------------- */
1299
eb867a76 1300ulong ide_read (int device, lbaint_t blknr, ulong blkcnt, void *buffer)
c609719b
WD
1301{
1302 ulong n = 0;
1303 unsigned char c;
1304 unsigned char pwrsave=0; /* power save */
42dfe7a1 1305#ifdef CONFIG_LBA48
c40b2956 1306 unsigned char lba48 = 0;
c609719b 1307
413bf586 1308 if (blknr & 0x0000fffff0000000ULL) {
c40b2956
WD
1309 /* more than 28 bits used, use 48bit mode */
1310 lba48 = 1;
1311 }
1312#endif
1a344f29 1313 debug ("ide_read dev %d start %qX, blocks %lX buffer at %lX\n",
c609719b
WD
1314 device, blknr, blkcnt, (ulong)buffer);
1315
1316 ide_led (DEVICE_LED(device), 1); /* LED on */
1317
1318 /* Select device
1319 */
2262cfee 1320 ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
c609719b
WD
1321 c = ide_wait (device, IDE_TIME_OUT);
1322
1323 if (c & ATA_STAT_BUSY) {
1324 printf ("IDE read: device %d not ready\n", device);
1325 goto IDE_READ_E;
1326 }
1327
1328 /* first check if the drive is in Powersaving mode, if yes,
1329 * increase the timeout value */
2262cfee 1330 ide_outb (device, ATA_COMMAND, ATA_CMD_CHK_PWR);
c609719b
WD
1331 udelay (50);
1332
1333 c = ide_wait (device, IDE_TIME_OUT); /* can't take over 500 ms */
1334
1335 if (c & ATA_STAT_BUSY) {
1336 printf ("IDE read: device %d not ready\n", device);
1337 goto IDE_READ_E;
1338 }
1339 if ((c & ATA_STAT_ERR) == ATA_STAT_ERR) {
1340 printf ("No Powersaving mode %X\n", c);
1341 } else {
2262cfee 1342 c = ide_inb(device,ATA_SECT_CNT);
1a344f29 1343 debug ("Powersaving %02X\n",c);
c609719b
WD
1344 if(c==0)
1345 pwrsave=1;
1346 }
1347
1348
1349 while (blkcnt-- > 0) {
1350
1351 c = ide_wait (device, IDE_TIME_OUT);
1352
1353 if (c & ATA_STAT_BUSY) {
1354 printf ("IDE read: device %d not ready\n", device);
1355 break;
1356 }
42dfe7a1 1357#ifdef CONFIG_LBA48
c40b2956
WD
1358 if (lba48) {
1359 /* write high bits */
1360 ide_outb (device, ATA_SECT_CNT, 0);
1361 ide_outb (device, ATA_LBA_LOW, (blknr >> 24) & 0xFF);
6d0f6bcf 1362#ifdef CONFIG_SYS_64BIT_LBA
c40b2956
WD
1363 ide_outb (device, ATA_LBA_MID, (blknr >> 32) & 0xFF);
1364 ide_outb (device, ATA_LBA_HIGH, (blknr >> 40) & 0xFF);
413bf586
GL
1365#else
1366 ide_outb (device, ATA_LBA_MID, 0);
1367 ide_outb (device, ATA_LBA_HIGH, 0);
1368#endif
c40b2956
WD
1369 }
1370#endif
2262cfee
WD
1371 ide_outb (device, ATA_SECT_CNT, 1);
1372 ide_outb (device, ATA_LBA_LOW, (blknr >> 0) & 0xFF);
1373 ide_outb (device, ATA_LBA_MID, (blknr >> 8) & 0xFF);
1374 ide_outb (device, ATA_LBA_HIGH, (blknr >> 16) & 0xFF);
c40b2956 1375
42dfe7a1 1376#ifdef CONFIG_LBA48
c40b2956
WD
1377 if (lba48) {
1378 ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device) );
1379 ide_outb (device, ATA_COMMAND, ATA_CMD_READ_EXT);
1380
1381 } else
1382#endif
1383 {
1384 ide_outb (device, ATA_DEV_HD, ATA_LBA |
1385 ATA_DEVICE(device) |
1386 ((blknr >> 24) & 0xF) );
1387 ide_outb (device, ATA_COMMAND, ATA_CMD_READ);
1388 }
c609719b
WD
1389
1390 udelay (50);
1391
1392 if(pwrsave) {
1393 c = ide_wait (device, IDE_SPIN_UP_TIME_OUT); /* may take up to 4 sec */
1394 pwrsave=0;
1395 } else {
1396 c = ide_wait (device, IDE_TIME_OUT); /* can't take over 500 ms */
1397 }
1398
1399 if ((c&(ATA_STAT_DRQ|ATA_STAT_BUSY|ATA_STAT_ERR)) != ATA_STAT_DRQ) {
6d0f6bcf 1400#if defined(CONFIG_SYS_64BIT_LBA) && defined(CONFIG_SYS_64BIT_VSPRINTF)
c40b2956 1401 printf ("Error (no IRQ) dev %d blk %qd: status 0x%02x\n",
c609719b 1402 device, blknr, c);
c40b2956
WD
1403#else
1404 printf ("Error (no IRQ) dev %d blk %ld: status 0x%02x\n",
1405 device, (ulong)blknr, c);
1406#endif
c609719b
WD
1407 break;
1408 }
1409
1410 input_data (device, buffer, ATA_SECTORWORDS);
2262cfee 1411 (void) ide_inb (device, ATA_STATUS); /* clear IRQ */
c609719b
WD
1412
1413 ++n;
1414 ++blknr;
0b94504d 1415 buffer += ATA_BLOCKSIZE;
c609719b
WD
1416 }
1417IDE_READ_E:
1418 ide_led (DEVICE_LED(device), 0); /* LED off */
1419 return (n);
1420}
1421
1422/* ------------------------------------------------------------------------- */
1423
1424
eb867a76 1425ulong ide_write (int device, lbaint_t blknr, ulong blkcnt, void *buffer)
c609719b
WD
1426{
1427 ulong n = 0;
1428 unsigned char c;
42dfe7a1 1429#ifdef CONFIG_LBA48
c40b2956
WD
1430 unsigned char lba48 = 0;
1431
413bf586 1432 if (blknr & 0x0000fffff0000000ULL) {
c40b2956
WD
1433 /* more than 28 bits used, use 48bit mode */
1434 lba48 = 1;
1435 }
1436#endif
c609719b
WD
1437
1438 ide_led (DEVICE_LED(device), 1); /* LED on */
1439
1440 /* Select device
1441 */
2262cfee 1442 ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
c609719b
WD
1443
1444 while (blkcnt-- > 0) {
1445
1446 c = ide_wait (device, IDE_TIME_OUT);
1447
1448 if (c & ATA_STAT_BUSY) {
1449 printf ("IDE read: device %d not ready\n", device);
1450 goto WR_OUT;
1451 }
42dfe7a1 1452#ifdef CONFIG_LBA48
c40b2956
WD
1453 if (lba48) {
1454 /* write high bits */
1455 ide_outb (device, ATA_SECT_CNT, 0);
1456 ide_outb (device, ATA_LBA_LOW, (blknr >> 24) & 0xFF);
6d0f6bcf 1457#ifdef CONFIG_SYS_64BIT_LBA
c40b2956
WD
1458 ide_outb (device, ATA_LBA_MID, (blknr >> 32) & 0xFF);
1459 ide_outb (device, ATA_LBA_HIGH, (blknr >> 40) & 0xFF);
413bf586
GL
1460#else
1461 ide_outb (device, ATA_LBA_MID, 0);
1462 ide_outb (device, ATA_LBA_HIGH, 0);
1463#endif
c40b2956
WD
1464 }
1465#endif
2262cfee
WD
1466 ide_outb (device, ATA_SECT_CNT, 1);
1467 ide_outb (device, ATA_LBA_LOW, (blknr >> 0) & 0xFF);
1468 ide_outb (device, ATA_LBA_MID, (blknr >> 8) & 0xFF);
1469 ide_outb (device, ATA_LBA_HIGH, (blknr >> 16) & 0xFF);
c40b2956 1470
42dfe7a1 1471#ifdef CONFIG_LBA48
c40b2956
WD
1472 if (lba48) {
1473 ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device) );
1474 ide_outb (device, ATA_COMMAND, ATA_CMD_WRITE_EXT);
1475
1476 } else
1477#endif
1478 {
1479 ide_outb (device, ATA_DEV_HD, ATA_LBA |
1480 ATA_DEVICE(device) |
1481 ((blknr >> 24) & 0xF) );
1482 ide_outb (device, ATA_COMMAND, ATA_CMD_WRITE);
1483 }
c609719b
WD
1484
1485 udelay (50);
1486
1487 c = ide_wait (device, IDE_TIME_OUT); /* can't take over 500 ms */
1488
1489 if ((c&(ATA_STAT_DRQ|ATA_STAT_BUSY|ATA_STAT_ERR)) != ATA_STAT_DRQ) {
6d0f6bcf 1490#if defined(CONFIG_SYS_64BIT_LBA) && defined(CONFIG_SYS_64BIT_VSPRINTF)
c40b2956 1491 printf ("Error (no IRQ) dev %d blk %qd: status 0x%02x\n",
c609719b 1492 device, blknr, c);
c40b2956
WD
1493#else
1494 printf ("Error (no IRQ) dev %d blk %ld: status 0x%02x\n",
1495 device, (ulong)blknr, c);
1496#endif
c609719b
WD
1497 goto WR_OUT;
1498 }
1499
1500 output_data (device, buffer, ATA_SECTORWORDS);
2262cfee 1501 c = ide_inb (device, ATA_STATUS); /* clear IRQ */
c609719b
WD
1502 ++n;
1503 ++blknr;
0b94504d 1504 buffer += ATA_BLOCKSIZE;
c609719b
WD
1505 }
1506WR_OUT:
1507 ide_led (DEVICE_LED(device), 0); /* LED off */
1508 return (n);
1509}
1510
1511/* ------------------------------------------------------------------------- */
1512
1513/*
1514 * copy src to dest, skipping leading and trailing blanks and null
1515 * terminate the string
7d7ce412 1516 * "len" is the size of available memory including the terminating '\0'
c609719b 1517 */
7d7ce412 1518static void ident_cpy (unsigned char *dst, unsigned char *src, unsigned int len)
c609719b 1519{
7d7ce412
WD
1520 unsigned char *end, *last;
1521
1522 last = dst;
6fb6af6d 1523 end = src + len - 1;
7d7ce412
WD
1524
1525 /* reserve space for '\0' */
1526 if (len < 2)
1527 goto OUT;
efa329cb 1528
7d7ce412
WD
1529 /* skip leading white space */
1530 while ((*src) && (src<end) && (*src==' '))
1531 ++src;
1532
1533 /* copy string, omitting trailing white space */
1534 while ((*src) && (src<end)) {
1535 *dst++ = *src;
1536 if (*src++ != ' ')
1537 last = dst;
c609719b 1538 }
7d7ce412
WD
1539OUT:
1540 *last = '\0';
c609719b
WD
1541}
1542
1543/* ------------------------------------------------------------------------- */
1544
1545/*
1546 * Wait until Busy bit is off, or timeout (in ms)
1547 * Return last status
1548 */
1549static uchar ide_wait (int dev, ulong t)
1550{
1551 ulong delay = 10 * t; /* poll every 100 us */
1552 uchar c;
1553
2262cfee 1554 while ((c = ide_inb(dev, ATA_STATUS)) & ATA_STAT_BUSY) {
c609719b
WD
1555 udelay (100);
1556 if (delay-- == 0) {
1557 break;
1558 }
1559 }
1560 return (c);
1561}
1562
1563/* ------------------------------------------------------------------------- */
1564
1565#ifdef CONFIG_IDE_RESET
1566extern void ide_set_reset(int idereset);
1567
1568static void ide_reset (void)
1569{
6d0f6bcf
JCPV
1570#if defined(CONFIG_SYS_PB_12V_ENABLE) || defined(CONFIG_SYS_PB_IDE_MOTOR)
1571 volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
c609719b
WD
1572#endif
1573 int i;
1574
1575 curr_device = -1;
6d0f6bcf 1576 for (i=0; i<CONFIG_SYS_IDE_MAXBUS; ++i)
c609719b 1577 ide_bus_ok[i] = 0;
6d0f6bcf 1578 for (i=0; i<CONFIG_SYS_IDE_MAXDEVICE; ++i)
c609719b
WD
1579 ide_dev_desc[i].type = DEV_TYPE_UNKNOWN;
1580
1581 ide_set_reset (1); /* assert reset */
1582
e175eacc
MK
1583 /* the reset signal shall be asserted for et least 25 us */
1584 udelay(25);
1585
c609719b
WD
1586 WATCHDOG_RESET();
1587
6d0f6bcf
JCPV
1588#ifdef CONFIG_SYS_PB_12V_ENABLE
1589 immr->im_cpm.cp_pbdat &= ~(CONFIG_SYS_PB_12V_ENABLE); /* 12V Enable output OFF */
1590 immr->im_cpm.cp_pbpar &= ~(CONFIG_SYS_PB_12V_ENABLE);
1591 immr->im_cpm.cp_pbodr &= ~(CONFIG_SYS_PB_12V_ENABLE);
1592 immr->im_cpm.cp_pbdir |= CONFIG_SYS_PB_12V_ENABLE;
c609719b
WD
1593
1594 /* wait 500 ms for the voltage to stabilize
1595 */
1596 for (i=0; i<500; ++i) {
1597 udelay (1000);
1598 }
1599
6d0f6bcf
JCPV
1600 immr->im_cpm.cp_pbdat |= CONFIG_SYS_PB_12V_ENABLE; /* 12V Enable output ON */
1601#endif /* CONFIG_SYS_PB_12V_ENABLE */
c609719b 1602
6d0f6bcf 1603#ifdef CONFIG_SYS_PB_IDE_MOTOR
c609719b 1604 /* configure IDE Motor voltage monitor pin as input */
6d0f6bcf
JCPV
1605 immr->im_cpm.cp_pbpar &= ~(CONFIG_SYS_PB_IDE_MOTOR);
1606 immr->im_cpm.cp_pbodr &= ~(CONFIG_SYS_PB_IDE_MOTOR);
1607 immr->im_cpm.cp_pbdir &= ~(CONFIG_SYS_PB_IDE_MOTOR);
c609719b
WD
1608
1609 /* wait up to 1 s for the motor voltage to stabilize
1610 */
1611 for (i=0; i<1000; ++i) {
6d0f6bcf 1612 if ((immr->im_cpm.cp_pbdat & CONFIG_SYS_PB_IDE_MOTOR) != 0) {
c609719b
WD
1613 break;
1614 }
1615 udelay (1000);
1616 }
1617
1618 if (i == 1000) { /* Timeout */
1619 printf ("\nWarning: 5V for IDE Motor missing\n");
1620# ifdef CONFIG_STATUS_LED
1621# ifdef STATUS_LED_YELLOW
1622 status_led_set (STATUS_LED_YELLOW, STATUS_LED_ON );
1623# endif
1624# ifdef STATUS_LED_GREEN
1625 status_led_set (STATUS_LED_GREEN, STATUS_LED_OFF);
1626# endif
1627# endif /* CONFIG_STATUS_LED */
1628 }
6d0f6bcf 1629#endif /* CONFIG_SYS_PB_IDE_MOTOR */
c609719b
WD
1630
1631 WATCHDOG_RESET();
1632
1633 /* de-assert RESET signal */
1634 ide_set_reset(0);
1635
1636 /* wait 250 ms */
1637 for (i=0; i<250; ++i) {
1638 udelay (1000);
1639 }
1640}
1641
1642#endif /* CONFIG_IDE_RESET */
1643
1644/* ------------------------------------------------------------------------- */
1645
e2ffd59b
WD
1646#if defined(CONFIG_IDE_LED) && \
1647 !defined(CONFIG_AMIGAONEG3SE)&& \
1648 !defined(CONFIG_CPC45) && \
1649 !defined(CONFIG_HMI10) && \
1650 !defined(CONFIG_KUP4K) && \
1651 !defined(CONFIG_KUP4X)
c609719b
WD
1652
1653static uchar led_buffer = 0; /* Buffer for current LED status */
1654
1655static void ide_led (uchar led, uchar status)
1656{
1657 uchar *led_port = LED_PORT;
1658
1659 if (status) { /* switch LED on */
1660 led_buffer |= led;
1661 } else { /* switch LED off */
1662 led_buffer &= ~led;
1663 }
1664
1665 *led_port = led_buffer;
1666}
1667
1668#endif /* CONFIG_IDE_LED */
1669
1670/* ------------------------------------------------------------------------- */
1671
1672#ifdef CONFIG_ATAPI
1673/****************************************************************************
1674 * ATAPI Support
1675 */
1676
db01a2ea 1677#if defined(__PPC__) || defined(CONFIG_PXA_PCMCIA)
c609719b
WD
1678/* since ATAPI may use commands with not 4 bytes alligned length
1679 * we have our own transfer functions, 2 bytes alligned */
1680static void
1681output_data_shorts(int dev, ushort *sect_buf, int shorts)
1682{
1a344f29 1683#if defined(CONFIG_HMI10) || defined(CONFIG_CPC45)
a522fa0e
WD
1684 uchar *dbuf;
1685 volatile uchar *pbuf_even;
1686 volatile uchar *pbuf_odd;
1687
1688 pbuf_even = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_EVEN);
1689 pbuf_odd = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_ODD);
1690 while (shorts--) {
5cf91d6b 1691 EIEIO;
a522fa0e 1692 *pbuf_even = *dbuf++;
5cf91d6b 1693 EIEIO;
a522fa0e
WD
1694 *pbuf_odd = *dbuf++;
1695 }
1a344f29 1696#else
c609719b
WD
1697 ushort *dbuf;
1698 volatile ushort *pbuf;
1699
1700 pbuf = (ushort *)(ATA_CURR_BASE(dev)+ATA_DATA_REG);
1701 dbuf = (ushort *)sect_buf;
db01a2ea 1702
1a344f29 1703 debug ("in output data shorts base for read is %lx\n", (unsigned long) pbuf);
db01a2ea 1704
c609719b 1705 while (shorts--) {
5cf91d6b 1706 EIEIO;
1a344f29 1707 *pbuf = *dbuf++;
c609719b 1708 }
1a344f29
WD
1709#endif
1710}
1711
1712static void
1713input_data_shorts(int dev, ushort *sect_buf, int shorts)
1714{
1715#if defined(CONFIG_HMI10) || defined(CONFIG_CPC45)
a522fa0e
WD
1716 uchar *dbuf;
1717 volatile uchar *pbuf_even;
1718 volatile uchar *pbuf_odd;
1719
1720 pbuf_even = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_EVEN);
1721 pbuf_odd = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_ODD);
1722 while (shorts--) {
5cf91d6b 1723 EIEIO;
a522fa0e 1724 *dbuf++ = *pbuf_even;
5cf91d6b 1725 EIEIO;
a522fa0e
WD
1726 *dbuf++ = *pbuf_odd;
1727 }
1a344f29
WD
1728#else
1729 ushort *dbuf;
1730 volatile ushort *pbuf;
1731
1732 pbuf = (ushort *)(ATA_CURR_BASE(dev)+ATA_DATA_REG);
1733 dbuf = (ushort *)sect_buf;
1734
1735 debug("in input data shorts base for read is %lx\n", (unsigned long) pbuf);
1736
1737 while (shorts--) {
1738 EIEIO;
1739 *dbuf++ = *pbuf;
1740 }
1741#endif
c609719b
WD
1742}
1743
2262cfee
WD
1744#else /* ! __PPC__ */
1745static void
1746output_data_shorts(int dev, ushort *sect_buf, int shorts)
1747{
15647dc7 1748 outsw(ATA_CURR_BASE(dev)+ATA_DATA_REG, sect_buf, shorts);
2262cfee
WD
1749}
1750
2262cfee
WD
1751static void
1752input_data_shorts(int dev, ushort *sect_buf, int shorts)
1753{
15647dc7 1754 insw(ATA_CURR_BASE(dev)+ATA_DATA_REG, sect_buf, shorts);
2262cfee
WD
1755}
1756
1757#endif /* __PPC__ */
1758
c609719b
WD
1759/*
1760 * Wait until (Status & mask) == res, or timeout (in ms)
1761 * Return last status
1762 * This is used since some ATAPI CD ROMs clears their Busy Bit first
1763 * and then they set their DRQ Bit
1764 */
1765static uchar atapi_wait_mask (int dev, ulong t,uchar mask, uchar res)
1766{
1767 ulong delay = 10 * t; /* poll every 100 us */
1768 uchar c;
1769
2262cfee
WD
1770 c = ide_inb(dev,ATA_DEV_CTL); /* prevents to read the status before valid */
1771 while (((c = ide_inb(dev, ATA_STATUS)) & mask) != res) {
c609719b
WD
1772 /* break if error occurs (doesn't make sense to wait more) */
1773 if((c & ATA_STAT_ERR)==ATA_STAT_ERR)
1774 break;
1775 udelay (100);
1776 if (delay-- == 0) {
1777 break;
1778 }
1779 }
1780 return (c);
1781}
1782
1783/*
1784 * issue an atapi command
1785 */
1786unsigned char atapi_issue(int device,unsigned char* ccb,int ccblen, unsigned char * buffer,int buflen)
1787{
1788 unsigned char c,err,mask,res;
1789 int n;
1790 ide_led (DEVICE_LED(device), 1); /* LED on */
1791
1792 /* Select device
1793 */
1794 mask = ATA_STAT_BUSY|ATA_STAT_DRQ;
1795 res = 0;
c7de829c
WD
1796#ifdef CONFIG_AMIGAONEG3SE
1797# warning THF: Removed LBA mode ???
1798#endif
2262cfee 1799 ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
c609719b
WD
1800 c = atapi_wait_mask(device,ATAPI_TIME_OUT,mask,res);
1801 if ((c & mask) != res) {
1802 printf ("ATAPI_ISSUE: device %d not ready status %X\n", device,c);
1803 err=0xFF;
1804 goto AI_OUT;
1805 }
1806 /* write taskfile */
2262cfee 1807 ide_outb (device, ATA_ERROR_REG, 0); /* no DMA, no overlaped */
c7de829c
WD
1808 ide_outb (device, ATA_SECT_CNT, 0);
1809 ide_outb (device, ATA_SECT_NUM, 0);
2262cfee 1810 ide_outb (device, ATA_CYL_LOW, (unsigned char)(buflen & 0xFF));
c7de829c
WD
1811 ide_outb (device, ATA_CYL_HIGH, (unsigned char)((buflen>>8) & 0xFF));
1812#ifdef CONFIG_AMIGAONEG3SE
1813# warning THF: Removed LBA mode ???
1814#endif
2262cfee 1815 ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
c609719b 1816
2262cfee 1817 ide_outb (device, ATA_COMMAND, ATAPI_CMD_PACKET);
c609719b
WD
1818 udelay (50);
1819
1820 mask = ATA_STAT_DRQ|ATA_STAT_BUSY|ATA_STAT_ERR;
1821 res = ATA_STAT_DRQ;
1822 c = atapi_wait_mask(device,ATAPI_TIME_OUT,mask,res);
1823
1824 if ((c & mask) != res) { /* DRQ must be 1, BSY 0 */
4afbef96 1825 printf ("ATAPI_ISSUE: Error (no IRQ) before sending ccb dev %d status 0x%02x\n",device,c);
c609719b
WD
1826 err=0xFF;
1827 goto AI_OUT;
1828 }
1829
1830 output_data_shorts (device, (unsigned short *)ccb,ccblen/2); /* write command block */
53677ef1 1831 /* ATAPI Command written wait for completition */
c609719b
WD
1832 udelay (5000); /* device must set bsy */
1833
1834 mask = ATA_STAT_DRQ|ATA_STAT_BUSY|ATA_STAT_ERR;
1835 /* if no data wait for DRQ = 0 BSY = 0
1836 * if data wait for DRQ = 1 BSY = 0 */
1837 res=0;
1838 if(buflen)
1839 res = ATA_STAT_DRQ;
1840 c = atapi_wait_mask(device,ATAPI_TIME_OUT,mask,res);
1841 if ((c & mask) != res ) {
1842 if (c & ATA_STAT_ERR) {
2262cfee 1843 err=(ide_inb(device,ATA_ERROR_REG))>>4;
1a344f29 1844 debug ("atapi_issue 1 returned sense key %X status %02X\n",err,c);
c609719b 1845 } else {
4afbef96 1846 printf ("ATAPI_ISSUE: (no DRQ) after sending ccb (%x) status 0x%02x\n", ccb[0],c);
c609719b
WD
1847 err=0xFF;
1848 }
1849 goto AI_OUT;
1850 }
2262cfee 1851 n=ide_inb(device, ATA_CYL_HIGH);
c609719b 1852 n<<=8;
2262cfee 1853 n+=ide_inb(device, ATA_CYL_LOW);
c609719b
WD
1854 if(n>buflen) {
1855 printf("ERROR, transfer bytes %d requested only %d\n",n,buflen);
1856 err=0xff;
1857 goto AI_OUT;
1858 }
1859 if((n==0)&&(buflen<0)) {
1860 printf("ERROR, transfer bytes %d requested %d\n",n,buflen);
1861 err=0xff;
1862 goto AI_OUT;
1863 }
1864 if(n!=buflen) {
1a344f29 1865 debug ("WARNING, transfer bytes %d not equal with requested %d\n",n,buflen);
c609719b
WD
1866 }
1867 if(n!=0) { /* data transfer */
1a344f29 1868 debug ("ATAPI_ISSUE: %d Bytes to transfer\n",n);
c609719b
WD
1869 /* we transfer shorts */
1870 n>>=1;
1871 /* ok now decide if it is an in or output */
2262cfee 1872 if ((ide_inb(device, ATA_SECT_CNT)&0x02)==0) {
1a344f29 1873 debug ("Write to device\n");
c609719b
WD
1874 output_data_shorts(device,(unsigned short *)buffer,n);
1875 } else {
1a344f29 1876 debug ("Read from device @ %p shorts %d\n",buffer,n);
c609719b
WD
1877 input_data_shorts(device,(unsigned short *)buffer,n);
1878 }
1879 }
1880 udelay(5000); /* seems that some CD ROMs need this... */
1881 mask = ATA_STAT_BUSY|ATA_STAT_ERR;
1882 res=0;
1883 c = atapi_wait_mask(device,ATAPI_TIME_OUT,mask,res);
1884 if ((c & ATA_STAT_ERR) == ATA_STAT_ERR) {
2262cfee 1885 err=(ide_inb(device,ATA_ERROR_REG) >> 4);
1a344f29 1886 debug ("atapi_issue 2 returned sense key %X status %X\n",err,c);
c609719b
WD
1887 } else {
1888 err = 0;
1889 }
1890AI_OUT:
1891 ide_led (DEVICE_LED(device), 0); /* LED off */
1892 return (err);
1893}
1894
1895/*
1896 * sending the command to atapi_issue. If an status other than good
1897 * returns, an request_sense will be issued
1898 */
1899
53677ef1 1900#define ATAPI_DRIVE_NOT_READY 100
c609719b
WD
1901#define ATAPI_UNIT_ATTN 10
1902
1903unsigned char atapi_issue_autoreq (int device,
1904 unsigned char* ccb,
1905 int ccblen,
1906 unsigned char *buffer,
1907 int buflen)
1908{
1909 unsigned char sense_data[18],sense_ccb[12];
1910 unsigned char res,key,asc,ascq;
1911 int notready,unitattn;
1912
c7de829c
WD
1913#ifdef CONFIG_AMIGAONEG3SE
1914 char *s;
1915 unsigned int timeout, retrycnt;
1916
1917 s = getenv("ide_cd_timeout");
1918 timeout = s ? (simple_strtol(s, NULL, 10)*1000000)/5 : 0;
1919
1920 retrycnt = 0;
1921#endif
1922
c609719b
WD
1923 unitattn=ATAPI_UNIT_ATTN;
1924 notready=ATAPI_DRIVE_NOT_READY;
1925
1926retry:
1927 res= atapi_issue(device,ccb,ccblen,buffer,buflen);
1928 if (res==0)
1929 return (0); /* Ok */
1930
1931 if (res==0xFF)
1932 return (0xFF); /* error */
1933
1a344f29 1934 debug ("(auto_req)atapi_issue returned sense key %X\n",res);
c609719b
WD
1935
1936 memset(sense_ccb,0,sizeof(sense_ccb));
1937 memset(sense_data,0,sizeof(sense_data));
1938 sense_ccb[0]=ATAPI_CMD_REQ_SENSE;
c7de829c 1939 sense_ccb[4]=18; /* allocation Length */
c609719b
WD
1940
1941 res=atapi_issue(device,sense_ccb,12,sense_data,18);
1942 key=(sense_data[2]&0xF);
1943 asc=(sense_data[12]);
1944 ascq=(sense_data[13]);
1945
1a344f29
WD
1946 debug ("ATAPI_CMD_REQ_SENSE returned %x\n",res);
1947 debug (" Sense page: %02X key %02X ASC %02X ASCQ %02X\n",
c609719b
WD
1948 sense_data[0],
1949 key,
1950 asc,
1951 ascq);
1952
1953 if((key==0))
1954 return 0; /* ok device ready */
1955
1956 if((key==6)|| (asc==0x29) || (asc==0x28)) { /* Unit Attention */
1957 if(unitattn-->0) {
1958 udelay(200*1000);
1959 goto retry;
1960 }
1961 printf("Unit Attention, tried %d\n",ATAPI_UNIT_ATTN);
1962 goto error;
1963 }
1964 if((asc==0x4) && (ascq==0x1)) { /* not ready, but will be ready soon */
1965 if (notready-->0) {
1966 udelay(200*1000);
1967 goto retry;
1968 }
1969 printf("Drive not ready, tried %d times\n",ATAPI_DRIVE_NOT_READY);
1970 goto error;
1971 }
1972 if(asc==0x3a) {
1a344f29 1973 debug ("Media not present\n");
c609719b
WD
1974 goto error;
1975 }
c7de829c
WD
1976
1977#ifdef CONFIG_AMIGAONEG3SE
1978 if ((sense_data[2]&0xF)==0x0B) {
1a344f29 1979 debug ("ABORTED COMMAND...retry\n");
c7de829c
WD
1980 if (retrycnt++ < 4)
1981 goto retry;
1982 return (0xFF);
1983 }
1984
1985 if ((sense_data[2]&0xf) == 0x02 &&
1986 sense_data[12] == 0x04 &&
1987 sense_data[13] == 0x01 ) {
1a344f29 1988 debug ("Waiting for unit to become active\n");
c7de829c
WD
1989 udelay(timeout);
1990 if (retrycnt++ < 4)
1991 goto retry;
1992 return 0xFF;
1993 }
1994#endif /* CONFIG_AMIGAONEG3SE */
1995
c609719b
WD
1996 printf ("ERROR: Unknown Sense key %02X ASC %02X ASCQ %02X\n",key,asc,ascq);
1997error:
1a344f29 1998 debug ("ERROR Sense key %02X ASC %02X ASCQ %02X\n",key,asc,ascq);
c609719b
WD
1999 return (0xFF);
2000}
2001
2002
c609719b
WD
2003static void atapi_inquiry(block_dev_desc_t * dev_desc)
2004{
2005 unsigned char ccb[12]; /* Command descriptor block */
2006 unsigned char iobuf[64]; /* temp buf */
2007 unsigned char c;
2008 int device;
2009
2010 device=dev_desc->dev;
2011 dev_desc->type=DEV_TYPE_UNKNOWN; /* not yet valid */
2012 dev_desc->block_read=atapi_read;
2013
2014 memset(ccb,0,sizeof(ccb));
2015 memset(iobuf,0,sizeof(iobuf));
2016
2017 ccb[0]=ATAPI_CMD_INQUIRY;
2018 ccb[4]=40; /* allocation Legnth */
2019 c=atapi_issue_autoreq(device,ccb,12,(unsigned char *)iobuf,40);
2020
1a344f29 2021 debug ("ATAPI_CMD_INQUIRY returned %x\n",c);
c609719b
WD
2022 if (c!=0)
2023 return;
2024
2025 /* copy device ident strings */
7a60ee7c
JCPV
2026 ident_cpy((unsigned char*)dev_desc->vendor,&iobuf[8],8);
2027 ident_cpy((unsigned char*)dev_desc->product,&iobuf[16],16);
2028 ident_cpy((unsigned char*)dev_desc->revision,&iobuf[32],5);
c609719b
WD
2029
2030 dev_desc->lun=0;
2031 dev_desc->lba=0;
2032 dev_desc->blksz=0;
2033 dev_desc->type=iobuf[0] & 0x1f;
2034
2035 if ((iobuf[1]&0x80)==0x80)
2036 dev_desc->removable = 1;
2037 else
2038 dev_desc->removable = 0;
2039
2040 memset(ccb,0,sizeof(ccb));
2041 memset(iobuf,0,sizeof(iobuf));
2042 ccb[0]=ATAPI_CMD_START_STOP;
2043 ccb[4]=0x03; /* start */
2044
2045 c=atapi_issue_autoreq(device,ccb,12,(unsigned char *)iobuf,0);
2046
1a344f29 2047 debug ("ATAPI_CMD_START_STOP returned %x\n",c);
c609719b
WD
2048 if (c!=0)
2049 return;
2050
2051 memset(ccb,0,sizeof(ccb));
2052 memset(iobuf,0,sizeof(iobuf));
2053 c=atapi_issue_autoreq(device,ccb,12,(unsigned char *)iobuf,0);
2054
1a344f29 2055 debug ("ATAPI_CMD_UNIT_TEST_READY returned %x\n",c);
c609719b
WD
2056 if (c!=0)
2057 return;
2058
2059 memset(ccb,0,sizeof(ccb));
2060 memset(iobuf,0,sizeof(iobuf));
2061 ccb[0]=ATAPI_CMD_READ_CAP;
2062 c=atapi_issue_autoreq(device,ccb,12,(unsigned char *)iobuf,8);
1a344f29 2063 debug ("ATAPI_CMD_READ_CAP returned %x\n",c);
c609719b
WD
2064 if (c!=0)
2065 return;
2066
1a344f29 2067 debug ("Read Cap: LBA %02X%02X%02X%02X blksize %02X%02X%02X%02X\n",
c609719b
WD
2068 iobuf[0],iobuf[1],iobuf[2],iobuf[3],
2069 iobuf[4],iobuf[5],iobuf[6],iobuf[7]);
2070
2071 dev_desc->lba =((unsigned long)iobuf[0]<<24) +
2072 ((unsigned long)iobuf[1]<<16) +
2073 ((unsigned long)iobuf[2]<< 8) +
2074 ((unsigned long)iobuf[3]);
2075 dev_desc->blksz=((unsigned long)iobuf[4]<<24) +
2076 ((unsigned long)iobuf[5]<<16) +
2077 ((unsigned long)iobuf[6]<< 8) +
2078 ((unsigned long)iobuf[7]);
42dfe7a1 2079#ifdef CONFIG_LBA48
c40b2956 2080 dev_desc->lba48 = 0; /* ATAPI devices cannot use 48bit addressing (ATA/ATAPI v7) */
42dfe7a1 2081#endif
c609719b
WD
2082 return;
2083}
2084
2085
2086/*
2087 * atapi_read:
2088 * we transfer only one block per command, since the multiple DRQ per
2089 * command is not yet implemented
2090 */
2091#define ATAPI_READ_MAX_BYTES 2048 /* we read max 2kbytes */
2092#define ATAPI_READ_BLOCK_SIZE 2048 /* assuming CD part */
2093#define ATAPI_READ_MAX_BLOCK ATAPI_READ_MAX_BYTES/ATAPI_READ_BLOCK_SIZE /* max blocks */
2094
eb867a76 2095ulong atapi_read (int device, lbaint_t blknr, ulong blkcnt, void *buffer)
c609719b
WD
2096{
2097 ulong n = 0;
2098 unsigned char ccb[12]; /* Command descriptor block */
2099 ulong cnt;
2100
1a344f29 2101 debug ("atapi_read dev %d start %lX, blocks %lX buffer at %lX\n",
c609719b
WD
2102 device, blknr, blkcnt, (ulong)buffer);
2103
2104 do {
2105 if (blkcnt>ATAPI_READ_MAX_BLOCK) {
2106 cnt=ATAPI_READ_MAX_BLOCK;
2107 } else {
2108 cnt=blkcnt;
2109 }
2110 ccb[0]=ATAPI_CMD_READ_12;
2111 ccb[1]=0; /* reserved */
2112 ccb[2]=(unsigned char) (blknr>>24) & 0xFF; /* MSB Block */
2113 ccb[3]=(unsigned char) (blknr>>16) & 0xFF; /* */
2114 ccb[4]=(unsigned char) (blknr>> 8) & 0xFF;
2115 ccb[5]=(unsigned char) blknr & 0xFF; /* LSB Block */
2116 ccb[6]=(unsigned char) (cnt >>24) & 0xFF; /* MSB Block count */
2117 ccb[7]=(unsigned char) (cnt >>16) & 0xFF;
2118 ccb[8]=(unsigned char) (cnt >> 8) & 0xFF;
2119 ccb[9]=(unsigned char) cnt & 0xFF; /* LSB Block */
2120 ccb[10]=0; /* reserved */
2121 ccb[11]=0; /* reserved */
2122
2123 if (atapi_issue_autoreq(device,ccb,12,
2124 (unsigned char *)buffer,
2125 cnt*ATAPI_READ_BLOCK_SIZE) == 0xFF) {
2126 return (n);
2127 }
2128 n+=cnt;
2129 blkcnt-=cnt;
2130 blknr+=cnt;
0b94504d 2131 buffer+=(cnt*ATAPI_READ_BLOCK_SIZE);
c609719b
WD
2132 } while (blkcnt > 0);
2133 return (n);
2134}
2135
2136/* ------------------------------------------------------------------------- */
2137
2138#endif /* CONFIG_ATAPI */
2139
0d498393
WD
2140U_BOOT_CMD(
2141 ide, 5, 1, do_ide,
8bde7f77
WD
2142 "ide - IDE sub-system\n",
2143 "reset - reset IDE controller\n"
2144 "ide info - show available IDE devices\n"
2145 "ide device [dev] - show or set current device\n"
2146 "ide part [dev] - print partition table of one or all IDE devices\n"
2147 "ide read addr blk# cnt\n"
2148 "ide write addr blk# cnt - read/write `cnt'"
2149 " blocks starting at block `blk#'\n"
2150 " to/from memory address `addr'\n"
2151);
2152
0d498393
WD
2153U_BOOT_CMD(
2154 diskboot, 3, 1, do_diskboot,
8bde7f77
WD
2155 "diskboot- boot from IDE device\n",
2156 "loadAddr dev:part\n"
2157);