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a69f60de
HPN
12007-10-22 Hans-Peter Nilsson <hp@axis.com>
2
3 * cris.cpu (movs, movu): Use result of extension operation when
4 updating flags.
5
9b201bb5
NC
62007-07-04 Nick Clifton <nickc@redhat.com>
7
8 * cris.cpu: Update copyright notice to refer to GPLv3.
9 * frv.cpu, frv.opc, iq10.cpu, iq2000m.cpu, iq2000.opc, m32c.cpu,
10 m32c.opc, m32r.cpu, m32r.opc, mt.cpu, mt.opc, sh64-compact.cpu,
11 sh64-media.cpu, sh.cpu, sh.opc, simplify.inc, xc16x.cpu,
12 xc16x.opc: Likewise.
13 * iq2000.cpu: Fix copyright notice to refer to FSF.
14
53289dcd
MS
152007-04-30 Mark Salter <msalter@sadr.localdomain>
16
17 * frv.cpu (spr-names): Support new coprocessor SPR registers.
18
f6da2ec2
NC
192007-04-20 Nick Clifton <nickc@redhat.com>
20
21 * xc16x.cpu: Restore after accidentally overwriting this file with
22 xc16x.opc.
23
144f4bc6
DD
242007-03-29 DJ Delorie <dj@redhat.com>
25
26 * m32c.cpu (Imm-8-s4n): Fix print hook.
27 (Lab-24-8, Lab-32-8, Lab-40-8): Fix.
28 (arith-jnz-imm4-dst-defn): Make relaxable.
29 (arith-jnz16-imm4-dst-defn): Fix encodings.
30
75b06e7b
DD
312007-03-20 DJ Delorie <dj@redhat.com>
32
33 * m32c.cpu (f-dsp-40-u20, f-dsp-48-u20, Dsp-40-u20, Dsp-40-u20,
34 mem20): New.
35 (src16-16-20-An-relative-*): New.
36 (dst16-*-20-An-relative-*): New.
37 (dst16-16-16sa-*): New
38 (dst16-16-16ar-*): New
39 (dst32-16-16sa-Unprefixed-*): New
40 (jsri): Fix operands.
41 (setzx): Fix encoding.
42
a5da764d
AM
432007-03-08 Alan Modra <amodra@bigpond.net.au>
44
45 * m32r.opc: Formatting.
46
b497d0b0
NC
472006-05-22 Nick Clifton <nickc@redhat.com>
48
49 * iq2000.cpu: Fix include paths for iq2000m.cpu and iq10.cpu.
50
e78efa90
DD
512006-04-10 DJ Delorie <dj@redhat.com>
52
53 * m32c.opc (parse_unsigned_bitbase): Take a new parameter which
54 decides if this function accepts symbolic constants or not.
55 (parse_signed_bitbase): Likewise.
56 (parse_unsigned_bitbase8): Pass the new parameter.
57 (parse_unsigned_bitbase11): Likewise.
58 (parse_unsigned_bitbase16): Likewise.
59 (parse_unsigned_bitbase19): Likewise.
60 (parse_unsigned_bitbase27): Likewise.
61 (parse_signed_bitbase8): Likewise.
62 (parse_signed_bitbase11): Likewise.
63 (parse_signed_bitbase19): Likewise.
64
8d0e2679
DD
652006-03-13 DJ Delorie <dj@redhat.com>
66
43aa3bb1
DD
67 * m32c.cpu (Bit3-S): New.
68 (btst:s): New.
69 * m32c.opc (parse_bit3_S): New.
70
8d0e2679
DD
71 * m32c.cpu (decimal-subtraction16-insn): Add second operand.
72 (btst): Add optional :G suffix for MACH32.
73 (or.b:S): New.
74 (pop.w:G): Add optional :G suffix for MACH16.
75 (push.b.imm): Fix syntax.
76
253d272c
DD
772006-03-10 DJ Delorie <dj@redhat.com>
78
79 * m32c.cpu (mul.l): New.
80 (mulu.l): New.
81
c7d41dc5
NC
822006-03-03 Shrirang Khisti <shrirangk@kpitcummins.com)
83
84 * xc16x.opc (parse_hash): Return NULL if the input was parsed or
85 an error message otherwise.
86 (parse_dot, parse_pof, parse_pag, parse_sof, parse_seg): Likewise.
87 Fix up comments to correctly describe the functions.
88
6772dd07
DD
892006-02-24 DJ Delorie <dj@redhat.com>
90
91 * m32c.cpu (RL_TYPE): New attribute, with macros.
92 (Lab-8-24): Add RELAX.
93 (unary-insn-defn-g, binary-arith-imm-dst-defn,
94 binary-arith-imm4-dst-defn): Add 1ADDR attribute.
95 (binary-arith-src-dst-defn): Add 2ADDR attribute.
96 (jcnd16-5, jcnd16, jcnd32, jmp16.s, jmp16.b, jmp16.w, jmp16.a,
97 jmp32.s, jmp32.b, jmp32.w, jmp32.a, jsr16.w, jsr16.a): Add JUMP
98 attribute.
99 (jsri16, jsri32): Add 1ADDR attribute.
100 (jsr32.w, jsr32.a): Add JUMP attribute.
101
d70c5fc7
NC
1022006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
103 Anil Paranjape <anilp1@kpitcummins.com>
104 Shilin Shakti <shilins@kpitcummins.com>
105
106 * xc16x.cpu: New file containing complete CGEN specific XC16X CPU
107 description.
108 * xc16x.opc: New file containing supporting XC16C routines.
109
8536c657
NC
1102006-02-10 Nick Clifton <nickc@redhat.com>
111
112 * iq2000.opc (parse_hi16): Truncate shifted values to 16 bits.
113
458f7770
DD
1142006-01-06 DJ Delorie <dj@redhat.com>
115
116 * m32c.cpu (mov.w:q): Fix mode.
117 (push32.b.imm): Likewise, for the comment.
118
d031aafb
NS
1192005-12-16 Nathan Sidwell <nathan@codesourcery.com>
120
121 Second part of ms1 to mt renaming.
122 * mt.cpu (define-arch, define-isa): Set name to mt.
123 (define-mach): Adjust.
124 * mt.opc (CGEN_ASM_HASH): Update.
125 (mt_asm_hash, mt_cgen_insn_supported): Renamed.
126 (parse_loopsize, parse_imm16): Adjust.
127
eda87aba
DD
1282005-12-13 DJ Delorie <dj@redhat.com>
129
130 * m32c.cpu (jsri): Fix order so register names aren't treated as
131 symbols.
132 (indexb, indexbd, indexbs, indexl, indexld, indexls, indexw,
133 indexwd, indexws): Fix encodings.
134
4970f871
NS
1352005-12-12 Nathan Sidwell <nathan@codesourcery.com>
136
137 * mt.cpu: Rename from ms1.cpu.
138 * mt.opc: Rename from ms1.opc.
139
48ad8298
HPN
1402005-12-06 Hans-Peter Nilsson <hp@axis.com>
141
142 * cris.cpu (simplecris-common-writable-specregs)
143 (simplecris-common-readable-specregs): Split from
144 simplecris-common-specregs. All users changed.
145 (cris-implemented-writable-specregs-v0)
146 (cris-implemented-readable-specregs-v0): Similar from
147 cris-implemented-specregs-v0.
148 (cris-implemented-writable-specregs-v3)
149 (cris-implemented-readable-specregs-v3)
150 (cris-implemented-writable-specregs-v8)
151 (cris-implemented-readable-specregs-v8)
152 (cris-implemented-writable-specregs-v10)
153 (cris-implemented-readable-specregs-v10)
154 (cris-implemented-writable-specregs-v32)
155 (cris-implemented-readable-specregs-v32): Similar.
156 (bdap-32-pc, move-m-pcplus-p0, move-m-spplus-p8): New
157 insns and specializations.
158
6f84a2a6
NS
1592005-11-08 Nathan Sidwell <nathan@codesourcery.com>
160
161 Add ms2
162 * ms1.cpu (ms2, ms2bf): New architecture variant, cpu, machine and
163 model.
164 (f-uu8, f-uu1, f-imm16l, f-loopo, f-cb1sel, f-cb2sel, f-cb1incr,
165 f-cb2incr, f-rc3): New fields.
166 (LOOP): New instruction.
167 (JAL-HAZARD): New hazard.
168 (imm16o, loopsize, imm16l, rc3, cb1sel, cb2sel, cb1incr, cb2incr):
169 New operands.
170 (mul, muli, dbnz, iflush): Enable for ms2
171 (jal, reti): Has JAL-HAZARD.
172 (ldctxt, ldfb, stfb): Only ms1.
173 (fbcb): Only ms1,ms1-003.
174 (wfbinc, mefbinc, wfbincr, mwfbincr, fbcbincs, mfbcbincs,
175 fbcbincrs, mfbcbincrs): Enable for ms2.
176 (loop, loopu, dfbc, dwfb, fbwfb, dfbr): New ms2 insns.
177 * ms1.opc (parse_loopsize): New.
178 (parse_imm16): hi16/lo16 relocs are applicable to IMM16L.
179 (print_pcrel): New.
180
95b96521
DB
1812005-10-28 Dave Brolley <brolley@redhat.com>
182
183 Contribute the following change:
184 2003-09-24 Dave Brolley <brolley@redhat.com>
185
186 * frv.opc: Use CGEN_ATTR_VALUE_ENUM_TYPE in place of
187 CGEN_ATTR_VALUE_TYPE.
188 * m32c.opc (m32c_cgen_insn_supported): Use CGEN_INSN_BITSET_ATTR_VALUE.
189 Use cgen_bitset_intersect_p.
190
c6552317
DD
1912005-10-27 DJ Delorie <dj@redhat.com>
192
193 * m32c.cpu (Imm-8-s4n, Imm-12-s4n): New.
194 (arith-jnz16-imm4-dst-defn, arith-jnz32-imm4-dst-defn,
195 arith-jnz-imm4-dst-mach, arith-jnz-imm4-dst): Keep track of which
196 imm operand is needed.
197 (adjnz, sbjnz): Pass the right operands.
198 (unary-insn-defn, unary16-defn, unary32-defn, unary-insn-mach,
199 unary-insn): Add -g variants for opcodes that need to support :G.
200 (not.BW:G, push.BW:G): Call it.
201 (stzx16-imm8-imm8-dsp8sb, stzx16-imm8-imm8-dsp8fb,
202 stzx16-imm8-imm8-abs16): Fix operand typos.
203 * m32c.opc (m32c_asm_hash): Support bnCND.
204 (parse_signed4n, print_signed4n): New.
205
f75eb1c0
DD
2062005-10-26 DJ Delorie <dj@redhat.com>
207
208 * m32c.cpu (f-dsp-8-s24, Dsp-8-s24): New.
209 (mov-dspsp-dst-defn, mov-src-dspsp-defn, mov16-dspsp-dst-defn,
210 mov16-src-dspsp-defn, mov32-dspsp-dst-defn, mov32-src-dspsp-defn):
211 dsp8[sp] is signed.
212 (mov.WL:S #imm,A0/A1): dsp24 is signed (i.e. -0x800000..0xffffff).
213 (mov.BW:S r0,r1): Fix typo r1l->r1.
214 (tst): Allow :G suffix.
215 * m32c.opc (parse_signed24): New, for -0x800000..0xffffff.
216
e277c00b
AM
2172005-10-26 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
218
219 * m32r.opc (parse_hi16): Do not assume a 32-bit host word size.
220
92e0a941
DD
2212005-10-25 DJ Delorie <dj@redhat.com>
222
223 * m32c.cpu (add16-bQ-sp,add16-wQ-sp): Fix to allow either width by
224 making one a macro of the other.
225
a1a280bb
DD
2262005-10-21 DJ Delorie <dj@redhat.com>
227
228 * m32c.cpu (lde, ste): Add dsp[a0] and [a1a] addressing.
229 (indexb, indexbd, indexbs, indexw, indexwd, indexws, indexl,
230 indexld, indexls): .w variants have `1' bit.
231 (rot32.b): QI, not SI.
232 (rot32.w): HI, not SI.
233 (xchg16): HI for .w variant.
234
e74eb924
NC
2352005-10-19 Nick Clifton <nickc@redhat.com>
236
237 * m32r.opc (parse_slo16): Fix bad application of previous patch.
238
5e03663f
NC
2392005-10-18 Andreas Schwab <schwab@suse.de>
240
241 * m32r.opc (parse_slo16): Better version of previous patch.
242
ab7c9a26
NC
2432005-10-14 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
244
245 * cpu/m32r.opc (parse_slo16): Do not assume a 32-bit host word
246 size.
247
fd54057a
DD
2482005-07-25 DJ Delorie <dj@redhat.com>
249
250 * m32c.opc (parse_unsigned8): Add %dsp8().
251 (parse_signed8): Add %hi8().
252 (parse_unsigned16): Add %dsp16().
253 (parse_signed16): Add %lo16() and %hi16().
254 (parse_lab_5_3): Make valuep a bfd_vma *.
255
85da3a56
NC
2562005-07-18 Nick Clifton <nickc@redhat.com>
257
258 * m32c.cpu (f-16-8, f-24-8, f-32-16, f-dsp-8-u24): New opcode
259 components.
260 (f-lab32-jmp-s): Fix insertion sequence.
261 (Dsp-8-u24, Lab-5-3, Lab32-jmp-s): New operands.
262 (Dsp-40-s8): Make parameter be signed.
263 (Dsp-40-s16): Likewise.
264 (Dsp-48-s8): Likewise.
265 (Dsp-48-s16): Likewise.
266 (Imm-13-u3): Likewise. (Despite its name!)
267 (BitBase16-16-s8): Make the parameter be unsigned.
268 (BitBase16-8-u11-S): Likewise.
269 (Lab-8-8, Lab-8-16, Lab-16-8, jcnd16-5, jcnd16, jcnd32, jmp16.s,
270 jmp16.b, jmp16.w, jmp32.s, jmp32.b, jmp32.w, jsp16.w, jsr32.w): Allow
271 relaxation.
272
273 * m32c.opc: Fix formatting.
274 Use safe-ctype.h instead of ctype.h
275 Move duplicated code sequences into a macro.
276 Fix compile time warnings about signedness mismatches.
277 Remove dead code.
278 (parse_lab_5_3): New parser function.
279
aa260854
JB
2802005-07-16 Jim Blandy <jimb@redhat.com>
281
282 * m32c.opc (m32c_cgen_insn_supported): Use int, not CGEN_BITSET,
283 to represent isa sets.
284
0a665bfd
JB
2852005-07-15 Jim Blandy <jimb@redhat.com>
286
287 * m32c.cpu, m32c.opc: Fix copyright.
288
49f58d10
JB
2892005-07-14 Jim Blandy <jimb@redhat.com>
290
291 * m32c.cpu, m32c.opc: Machine description for the Renesas M32C.
292
0e6b69be
AM
2932005-07-14 Alan Modra <amodra@bigpond.net.au>
294
295 * ms1.opc (print_dollarhex): Correct format string.
296
f9210e37
AM
2972005-07-06 Alan Modra <amodra@bigpond.net.au>
298
299 * iq2000.cpu: Include from binutils cpu dir.
300
3ec2b351
NC
3012005-07-05 Nick Clifton <nickc@redhat.com>
302
303 * iq2000.opc (parse_lo16, parse_mlo16): Make value parameter
304 unsigned in order to avoid compile time warnings about sign
305 conflicts.
306
307 * ms1.opc (parse_*): Likewise.
308 (parse_imm16): Use a "void *" as it is passed both signed and
309 unsigned arguments.
310
47b0e7ad
NC
3112005-07-01 Nick Clifton <nickc@redhat.com>
312
313 * frv.opc: Update to ISO C90 function declaration style.
314 * iq2000.opc: Likewise.
315 * m32r.opc: Likewise.
316 * sh.opc: Likewise.
317
b081650b
DB
3182005-06-15 Dave Brolley <brolley@redhat.com>
319
320 Contributed by Red Hat.
321 * ms1.cpu: New file. Written by Nick Clifton, Stan Cox.
322 * ms1.opc: New file. Written by Stan Cox.
323
e172dbf8
NC
3242005-05-10 Nick Clifton <nickc@redhat.com>
325
326 * Update the address and phone number of the FSF organization in
327 the GPL notices in the following files:
328 cris.cpu, frv.cpu, frv.opc, iq10.cpu, iq2000.opc, iq2000m.cpu,
329 m32r.cpu, m32r.opc, sh.cpu, sh.opc, sh64-compact.cpu,
330 sh64-media.cpu, simplify.inc
331
b2d52a48
AM
3322005-02-24 Alan Modra <amodra@bigpond.net.au>
333
334 * frv.opc (parse_A): Warning fix.
335
33b71eeb
NC
3362005-02-23 Nick Clifton <nickc@redhat.com>
337
338 * frv.opc: Fixed compile time warnings about differing signed'ness
339 of pointers passed to functions.
340 * m32r.opc: Likewise.
341
bc18c937
NC
3422005-02-11 Nick Clifton <nickc@redhat.com>
343
344 * iq2000.opc (parse_jtargq10): Change type of valuep argument to
345 'bfd_vma *' in order avoid compile time warning message.
346
46da9a19
HPN
3472005-01-28 Hans-Peter Nilsson <hp@axis.com>
348
349 * cris.cpu (mstep): Add missing insn.
350
90219bd0
AO
3512005-01-25 Alexandre Oliva <aoliva@redhat.com>
352
353 2004-11-10 Alexandre Oliva <aoliva@redhat.com>
354 * frv.cpu: Add support for TLS annotations in loads and calll.
355 * frv.opc (parse_symbolic_address): New.
356 (parse_ldd_annotation): New.
357 (parse_call_annotation): New.
358 (parse_ld_annotation): New.
359 (parse_ulo16, parse_uslo16): Use parse_symbolic_address.
360 Introduce TLS relocations.
361 (parse_d12, parse_s12, parse_u12): Likewise.
362 (parse_uhi16): Likewise. Fix constant checking on 64-bit host.
363 (parse_call_label, print_at): New.
364
c3d75c30
HPN
3652004-12-21 Mikael Starvik <starvik@axis.com>
366
367 * cris.cpu (cris-set-mem): Correct integral write semantics.
368
68800d83
HPN
3692004-11-29 Hans-Peter Nilsson <hp@axis.com>
370
371 * cris.cpu: New file.
372
4bd1d37b
NC
3732004-11-15 Michael K. Lechner <mike.lechner@gmail.com>
374
375 * iq2000.cpu: Added quotes around macro arguments so that they
376 will work with newer versions of guile.
377
4030fa5a
NC
3782004-10-27 Nick Clifton <nickc@redhat.com>
379
380 * iq2000m.cpu (pkrlr1, pkrlr30, rbr1, rbr30, rxr1, rxr30, wbr1,
381 wbr1u, wbr30, wbr30u, wxr1, wxr1u, wxr30, wxr30u): Add an index
382 operand.
383 * iq2000.cpu (dnop index): Rename to _index to avoid complications
384 with guile.
385
ac28a1cb
RS
3862004-08-27 Richard Sandiford <rsandifo@redhat.com>
387
388 * frv.cpu (cfmovs): Change UNIT attribute to FMALL.
389
dc4c54bb
NC
3902004-05-15 Nick Clifton <nickc@redhat.com>
391
392 * iq2000.opc (iq2000_cgen_insn_supported): Make 'insn' argument const.
393
f4453dfa
NC
3942004-03-30 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
395
396 * m32r.opc (parse_hi16): Fixed shigh(0xffff8000) bug.
397
676a64f4
RS
3982004-03-01 Richard Sandiford <rsandifo@redhat.com>
399
400 * frv.cpu (define-arch frv): Add fr450 mach.
401 (define-mach fr450): New.
402 (define-model fr450): New. Add profile units to every fr450 insn.
403 (define-attr UNIT): Add MDCUTSSI.
404 (define-attr FR450-MAJOR): New enum. Add to every fr450 insn.
405 (define-attr AUDIO): New boolean.
406 (f-LRAE, f-LRAD, f-LRAS, f-TLBPRopx, f-TLBPRL)
407 (f-LRA-null, f-TLBPR-null): New fields.
408 (scr0, scr1, scr2, scr3, imavr1, damvr1, cxnr, ttbr)
409 (tplr, tppr, tpxr, timerh, timerl, timerd, btbr): New SPRs.
410 (LRAE, LRAD, LRAS, TLBPRopx, TLBPRL): New operands.
411 (LRA-null, TLBPR-null): New macros.
412 (iacc-multiply-r-r, slass, scutss, int-arith-ss-r-r): Add AUDIO attr.
413 (load-real-address): New macro.
414 (lrai, lrad, tlbpr): New instructions.
415 (media-cut-acc, media-cut-acc-ss): Add fr450-major argument.
416 (mcut, mcuti, mcutss, mcutssi): Adjust accordingly.
417 (mdcutssi): Change UNIT attribute to MDCUTSSI.
418 (media-low-clear-semantics, media-scope-limit-semantics)
419 (media-quad-limit, media-quad-shift): New macros.
420 (mqlclrhs, mqlmths, mqsllhi, mqsrahi): New instructions.
421 * frv.opc (frv_is_branch_major, frv_is_float_major, frv_is_media_major)
422 (frv_is_branch_insn, frv_is_float_insn, frv_is_media_insn)
423 (frv_vliw_reset, frv_vliw_add_insn): Handle bfd_mach_fr450.
424 (fr450_unit_mapping): New array.
425 (fr400_unit_mapping, fr500_unit_mapping, fr550_unit_mapping): Add entry
426 for new MDCUTSSI unit.
427 (fr450_check_insn_major_constraints): New function.
428 (check_insn_major_constraints): Use it.
429
c7a48b9a
RS
4302004-03-01 Richard Sandiford <rsandifo@redhat.com>
431
432 * frv.cpu (nsdiv, nudiv, nsdivi, nudivi): Remove fr400 profiling unit.
433 (scutss): Change unit to I0.
434 (calll, callil, ccalll): Add missing FR550-MAJOR and profile unit.
435 (mqsaths): Fix FR400-MAJOR categorization.
436 (media-quad-multiply-cross-acc, media-quad-cross-multiply-cross-acc)
437 (media-quad-cross-multiply-acc): Change unit from MDUALACC to FMALL.
438 * frv.opc (fr400_check_insn_major_constraints): Check for (M-2,M-1)
439 combinations.
440
8ae0baa2
RS
4412004-03-01 Richard Sandiford <rsandifo@redhat.com>
442
443 * frv.cpu (r-store, r-store-dual, r-store-quad): Delete.
444 (rstb, rsth, rst, rstd, rstq): Delete.
445 (rstbf, rsthf, rstf, rstdf, rstqf): Delete.
446
8ee9a8b2
NC
4472004-02-23 Nick Clifton <nickc@redhat.com>
448
449 * Apply these patches from Renesas:
450
451 2004-02-10 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
452
453 * cpu/m32r.opc (my_print_insn): Fixed incorrect output when
454 disassembling codes for 0x*2 addresses.
455
456 2003-12-15 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
457
458 * cpu/m32r.cpu: Add PIPE_O attribute to "pop" instruction.
459
460 2003-12-03 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
461
462 * cpu/m32r.cpu : Add new model m32r2.
463 Add new instructions.
464 Replace occurrances of 'Mitsubishi' with 'Renesas'.
465 Changed PIPE attr of push from O to OS.
466 Care for Little-endian of M32R.
467 * cpu/m32r.opc (CGEN_DIS_HASH, my_print_insn):
468 Care for Little-endian of M32R.
469 (parse_slo16): signed extension for value.
470
299d901c
AC
4712004-02-20 Andrew Cagney <cagney@redhat.com>
472
e866a257
AC
473 * m32r.opc, m32r.cpu: New files. Written by , Doug Evans, Nick
474 Clifton, Ben Elliston, Matthew Green, and Andrew Haley.
475
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476 * sh.cpu, sh.opc, sh64-compact.cpu, sh64-media.cpu: New files, all
477 written by Ben Elliston.
478
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4792004-01-14 Richard Sandiford <rsandifo@redhat.com>
480
481 * frv.cpu (UNIT): Add IACC.
482 (iacc-multiply-r-r): Use it.
483 * frv.opc (fr400_unit_mapping): Add entry for IACC.
484 (fr500_unit_mapping, fr550_unit_mapping): Likewise.
485
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4862004-01-06 Alexandre Oliva <aoliva@redhat.com>
487
488 2003-12-19 Alexandre Oliva <aoliva@redhat.com>
489 * frv.opc (parse_ulo16, parse_uhi16, parse_d12): Fix some
490 cut&paste errors in shifting/truncating numerical operands.
491 2003-08-08 Alexandre Oliva <aoliva@redhat.com>
492 * frv.opc (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
493 (parse_uslo16): Likewise.
494 (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
495 (parse_d12): Parse gotoff12 and gotofffuncdesc12.
496 (parse_s12): Likewise.
497 2003-08-04 Alexandre Oliva <aoliva@redhat.com>
498 * frv.opc (parse_ulo16): Parse gotlo and gotfuncdesclo.
499 (parse_uslo16): Likewise.
500 (parse_uhi16): Parse gothi and gotfuncdeschi.
501 (parse_d12): Parse got12 and gotfuncdesc12.
502 (parse_s12): Likewise.
503
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5042003-10-10 Dave Brolley <brolley@redhat.com>
505
506 * frv.cpu (dnpmop): New p-macro.
507 (GRdoublek): Use dnpmop.
508 (CPRdoublek, FRdoublei, FRdoublej, FRdoublek): Ditto.
509 (store-double-r-r): Use (.sym regtype doublek).
510 (r-store-double): Ditto.
511 (store-double-r-r-u): Ditto.
512 (conditional-store-double): Ditto.
513 (conditional-store-double-u): Ditto.
514 (store-double-r-simm): Ditto.
515 (fmovs): Assign to UNIT FMALL.
516
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5172003-10-06 Dave Brolley <brolley@redhat.com>
518
519 * frv.cpu, frv.opc: Add support for fr550.
520
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5212003-09-24 Dave Brolley <brolley@redhat.com>
522
523 * frv.cpu (u-commit): New modelling unit for fr500.
524 (mwtaccg): Use frv_ref_SI to reference ACC40Sk as an input operand.
525 (commit-r): Use u-commit model for fr500.
526 (commit): Ditto.
527 (conditional-float-binary-op): Take profiling data as an argument.
528 Update callers.
529 (ne-float-binary-op): Ditto.
530
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5312003-09-19 Michael Snyder <msnyder@redhat.com>
532
533 * frv.cpu (nldqi): Delete unimplemented instruction.
534
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5352003-09-12 Dave Brolley <brolley@redhat.com>
536
537 * frv.cpu (u-clrgr, u-clrfr): New units of model fr500.
538 (clear-ne-flag-r): Pass insn profiling in as an argument. Call
539 frv_ref_SI to get input register referenced for profiling.
540 (clear-ne-flag-all): Pass insn profiling in as an argument.
541 (clrgr,clrfr,clrga,clrfa): Add profiling information.
542
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5432003-09-11 Michael Snyder <msnyder@redhat.com>
544
545 * frv.cpu: Typographical corrections.
546
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5472003-09-09 Dave Brolley <brolley@redhat.com>
548
549 * frv.cpu (media-dual-complex): Change UNIT to FMALL.
550 (conditional-media-dual-complex, media-quad-complex): Likewise.
551
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5522003-09-04 Dave Brolley <brolley@redhat.com>
553
554 * frv.cpu (register-transfer): Pass in all attributes in on argument.
555 Update all callers.
556 (conditional-register-transfer): Ditto.
557 (cache-preload): Ditto.
558 (floating-point-conversion): Ditto.
559 (floating-point-neg): Ditto.
560 (float-abs): Ditto.
561 (float-binary-op-s): Ditto.
562 (conditional-float-binary-op): Ditto.
563 (ne-float-binary-op): Ditto.
564 (float-dual-arith): Ditto.
565 (ne-float-dual-arith): Ditto.
566
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5672003-09-03 Dave Brolley <brolley@redhat.com>
568
569 * frv.opc (parse_A, parse_A0, parse_A1): New parse handlers.
570 * frv.cpu (UNIT): Add IALL, FMALL, FMLOW, STORE, SCAN, DCPL, MDUALACC,
571 MCLRACC-1.
572 (A): Removed operand.
573 (A0,A1): New operands replace operand A.
574 (mnop): Now a real insn
575 (mclracc): Removed insn.
576 (mclracc-0, mclracc-1): New insns replace mclracc.
577 (all insns): Use new UNIT attributes.
578
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5792003-08-21 Nick Clifton <nickc@redhat.com>
580
581 * frv.cpu (mbtoh): Replace input parameter to u-media-dual-expand
582 and u-media-dual-btoh with output parameter.
583 (cmbtoh): Add profiling hack.
584
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5852003-08-19 Michael Snyder <msnyder@redhat.com>
586
587 * frv.cpu: Fix typo, Frintkeven -> FRintkeven
588
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5892003-06-10 Doug Evans <dje@sebabeach.org>
590
591 * frv.cpu: Add IDOC attribute.
592
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5932003-06-06 Andrew Cagney <cagney@redhat.com>
594
595 Contributed by Red Hat.
596 * iq2000.cpu: New file. Written by Ben Elliston, Jeff Johnston,
597 Stan Cox, and Frank Ch. Eigler.
598 * iq2000.opc: New file. Written by Ben Elliston, Frank
599 Ch. Eigler, Chris Moller, Jeff Johnston, and Stan Cox.
600 * iq2000m.cpu: New file. Written by Jeff Johnston.
601 * iq10.cpu: New file. Written by Jeff Johnston.
602
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6032003-06-05 Nick Clifton <nickc@redhat.com>
604
605 * frv.cpu (FRintieven): New operand. An even-numbered only
606 version of the FRinti operand.
607 (FRintjeven): Likewise for FRintj.
608 (FRintkeven): Likewise for FRintk.
609 (mdcutssi, media-dual-word-rotate-r-r, mqsaths,
610 media-quad-arith-sat-semantics, media-quad-arith-sat,
611 conditional-media-quad-arith-sat, mdunpackh,
612 media-quad-multiply-semantics, media-quad-multiply,
613 conditional-media-quad-multiply, media-quad-complex-i,
614 media-quad-multiply-acc-semantics, media-quad-multiply-acc,
615 conditional-media-quad-multiply-acc, munpackh,
616 media-quad-multiply-cross-acc-semantics, mdpackh,
617 media-quad-multiply-cross-acc, mbtoh-semantics,
618 media-quad-cross-multiply-cross-acc-semantics,
619 media-quad-cross-multiply-cross-acc, mbtoh, mhtob-semantics,
620 media-quad-cross-multiply-acc-semantics, cmbtoh,
621 media-quad-cross-multiply-acc, media-quad-complex, mhtob,
622 media-expand-halfword-to-double-semantics, mexpdhd, cmexpdhd,
623 cmhtob): Use new operands.
624 * frv.opc (CGEN_VERBOSE_ASSEMBLER_ERRORS): Define.
0e6b69be 625 (parse_even_register): New function.
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6272003-06-03 Nick Clifton <nickc@redhat.com>
628
629 * frv.cpu (media-dual-word-rotate-r-r): Use a signed 6-bit
630 immediate value not unsigned.
631
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6322003-06-03 Andrew Cagney <cagney@redhat.com>
633
634 Contributed by Red Hat.
635 * frv.cpu: New file. Written by Dave Brolley, Catherine Moore,
636 and Eric Christopher.
637 * frv.opc: New file. Written by Catherine Moore, and Dave
638 Brolley.
639 * simplify.inc: New file. Written by Doug Evans.
640
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6412003-05-02 Andrew Cagney <cagney@redhat.com>
642
643 * New file.
644
645\f
646Local Variables:
647mode: change-log
648left-margin: 8
649fill-column: 74
650version-control: never
651End: