[people/ms/u-boot.git] / cpu / arm920t / at91rm9200 / i2c.c

/*
 *  i2c Support for Atmel's AT91RM9200 Two-Wire Interface
 *
 *  (c) Rick Bronson
 *
 *  Borrowed heavily from original work by:
 *  Copyright (c) 2000 Philip Edelbrock <phil@stimpy.netroedge.com>
 *
 *  Modified to work with u-boot by (C) 2004 Gary Jennejohn garyj@denx.de
 *
 *  This program is free software; you can redistribute it and/or modify
 *  it under the terms of the GNU General Public License as published by
 *  the Free Software Foundation; either version 2 of the License, or
 *  (at your option) any later version.
 *
 *  This program is distributed in the hope that it will be useful,
 *  but WITHOUT ANY WARRANTY; without even the implied warranty of
 *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 *  GNU General Public License for more details.
 *
 *  You should have received a copy of the GNU General Public License
 *  along with this program; if not, write to the Free Software
 *  Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
 *
*/
#include <common.h>

#ifdef CONFIG_HARD_I2C

#include <i2c.h>
#include <asm/io.h>
#include <asm/arch/hardware.h>

#include <at91rm9200_i2c.h>

/* define DEBUG */

/*
 * Poll the i2c status register until the specified bit is set.
 * Returns 0 if timed out (100 msec)
 */
static short at91_poll_status(AT91PS_TWI twi, unsigned long bit) {
	int loop_cntr = 10000;
	do {
		udelay(10);
	} while (!(twi->TWI_SR & bit) && (--loop_cntr > 0));

	return (loop_cntr > 0);
}

/*
 * Generic i2c master transfer entrypoint
 *
 * rw == 1 means that this is a read
 */
static int
at91_xfer(unsigned char chip, unsigned int addr, int alen,
						unsigned char *buffer, int len, int rw)
{
	AT91PS_TWI twi = (AT91PS_TWI) AT91_TWI_BASE;
	int length;
	unsigned char *buf;
	/* Set the TWI Master Mode Register */
	twi->TWI_MMR = (chip << 16) | (alen << 8)
		| ((rw == 1) ? AT91C_TWI_MREAD : 0);

	/* Set TWI Internal Address Register with first messages data field */
	if (alen > 0)
		twi->TWI_IADR = addr;

	length = len;
	buf = buffer;
	if (length && buf) {	/* sanity check */
		if (rw) {
			twi->TWI_CR = AT91C_TWI_START;
			while (length--) {
				if (!length)
					twi->TWI_CR = AT91C_TWI_STOP;
				/* Wait until transfer is finished */
				if (!at91_poll_status(twi, AT91C_TWI_RXRDY)) {
					debug ("at91_i2c: timeout 1\n");
					return 1;
				}
				*buf++ = twi->TWI_RHR;
			}
			if (!at91_poll_status(twi, AT91C_TWI_TXCOMP)) {
				debug ("at91_i2c: timeout 2\n");
				return 1;
			}
		} else {
			twi->TWI_CR = AT91C_TWI_START;
			while (length--) {
				twi->TWI_THR = *buf++;
				if (!length)
					twi->TWI_CR = AT91C_TWI_STOP;
				if (!at91_poll_status(twi, AT91C_TWI_TXRDY)) {
					debug ("at91_i2c: timeout 3\n");
					return 1;
				}
			}
			/* Wait until transfer is finished */
			if (!at91_poll_status(twi, AT91C_TWI_TXCOMP)) {
				debug ("at91_i2c: timeout 4\n");
				return 1;
			}
		}
	}
	return 0;
}

int
i2c_probe(unsigned char chip)
{
	unsigned char buffer[1];

	return at91_xfer(chip, 0, 0, buffer, 1, 1);
}

int
i2c_read (unsigned char chip, unsigned int addr, int alen,
	  unsigned char *buffer, int len)
{
#ifdef CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW
	/* we only allow one address byte */
	if (alen > 1)
		return 1;
	/* XXX assume an ATMEL AT24C16 */
	if (alen == 1) {
#if 0 /* EEPROM code already sets this correctly */
		chip |= (addr >> 8) & 0xff;
#endif
		addr = addr & 0xff;
	}
#endif
	return at91_xfer(chip, addr, alen, buffer, len, 1);
}

int
i2c_write(unsigned char chip, unsigned int addr, int alen,
	  unsigned char *buffer, int len)
{
#ifdef CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW
	int i;
	unsigned char *buf;

	/* we only allow one address byte */
	if (alen > 1)
		return 1;
	/* XXX assume an ATMEL AT24C16 */
	if (alen == 1) {
		buf = buffer;
		/* do single byte writes */
		for (i = 0; i < len; i++) {
#if 0 /* EEPROM code already sets this correctly */
			chip |= (addr >> 8) & 0xff;
#endif
			addr = addr & 0xff;
			if (at91_xfer(chip, addr, alen, buf++, 1, 0))
				return 1;
			addr++;
		}
		return 0;
	}
#endif
	return at91_xfer(chip, addr, alen, buffer, len, 0);
}

/*
 * Main initialization routine
 */
void
i2c_init(int speed, int slaveaddr)
{
	AT91PS_TWI twi = (AT91PS_TWI) AT91_TWI_BASE;

	*AT91C_PIOA_PDR = AT91C_PA25_TWD | AT91C_PA26_TWCK;
	*AT91C_PIOA_ASR = AT91C_PA25_TWD | AT91C_PA26_TWCK;
	*AT91C_PIOA_MDER = AT91C_PA25_TWD | AT91C_PA26_TWCK;
	*AT91C_PMC_PCER = 1 << AT91C_ID_TWI;		/* enable peripheral clock */

	twi->TWI_IDR = 0x3ff;				/* Disable all interrupts */
	twi->TWI_CR = AT91C_TWI_SWRST;			/* Reset peripheral */
	twi->TWI_CR = AT91C_TWI_MSEN | AT91C_TWI_SVDIS;	/* Set Master mode */

	/* Here, CKDIV = 1 and CHDIV=CLDIV  ==> CLDIV = CHDIV = 1/4*((Fmclk/FTWI) -6) */
	twi->TWI_CWGR = AT91C_TWI_CKDIV1 | AT91C_TWI_CLDIV3 | (AT91C_TWI_CLDIV3 << 8);

	debug ("Found AT91 i2c\n");
	return;
}

uchar i2c_reg_read(uchar i2c_addr, uchar reg)
{
	unsigned char buf;

	i2c_read(i2c_addr, reg, 1, &buf, 1);

	return(buf);
}

void i2c_reg_write(uchar i2c_addr, uchar reg, uchar val)
{
	i2c_write(i2c_addr, reg, 1, &val, 1);
}

int i2c_set_bus_speed(unsigned int speed)
{
	return -1;
}

unsigned int i2c_get_bus_speed(void)
{
	return CONFIG_SYS_I2C_SPEED;
}

#endif /* CONFIG_HARD_I2C */
Commit	Line	Data
2cbe571a WD	1	/*
	2	* i2c Support for Atmel's AT91RM9200 Two-Wire Interface
	3	*
	4	* (c) Rick Bronson
	5	*
	6	* Borrowed heavily from original work by:
	7	* Copyright (c) 2000 Philip Edelbrock <phil@stimpy.netroedge.com>
	8	*
	9	* Modified to work with u-boot by (C) 2004 Gary Jennejohn garyj@denx.de
	10	*
	11	* This program is free software; you can redistribute it and/or modify
	12	* it under the terms of the GNU General Public License as published by
	13	* the Free Software Foundation; either version 2 of the License, or
	14	* (at your option) any later version.
	15	*
	16	* This program is distributed in the hope that it will be useful,
	17	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	18	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	19	* GNU General Public License for more details.
	20	*
	21	* You should have received a copy of the GNU General Public License
	22	* along with this program; if not, write to the Free Software
	23	* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
	24	*
	25	*/
	26	#include <common.h>
	27
	28	#ifdef CONFIG_HARD_I2C
	29
	30	#include <i2c.h>
	31	#include <asm/io.h>
	32	#include <asm/arch/hardware.h>
	33
	34	#include <at91rm9200_i2c.h>
	35
45ea3fca	36	/* define DEBUG */
2cbe571a WD	37
	38	/*
	39	* Poll the i2c status register until the specified bit is set.
	40	* Returns 0 if timed out (100 msec)
	41	*/
	42	static short at91_poll_status(AT91PS_TWI twi, unsigned long bit) {
	43	int loop_cntr = 10000;
	44	do {
9d5028c2	45	udelay(10);
2cbe571a WD	46	} while (!(twi->TWI_SR & bit) && (--loop_cntr > 0));
	47
	48	return (loop_cntr > 0);
	49	}
	50
	51	/*
	52	* Generic i2c master transfer entrypoint
	53	*
	54	* rw == 1 means that this is a read
	55	*/
	56	static int
	57	at91_xfer(unsigned char chip, unsigned int addr, int alen,
	58	unsigned char *buffer, int len, int rw)
	59	{
	60	AT91PS_TWI twi = (AT91PS_TWI) AT91_TWI_BASE;
	61	int length;
	62	unsigned char *buf;
2cbe571a WD	63	/* Set the TWI Master Mode Register */
	64	twi->TWI_MMR = (chip << 16) \| (alen << 8)
	65	\| ((rw == 1) ? AT91C_TWI_MREAD : 0);
	66
	67	/* Set TWI Internal Address Register with first messages data field */
2cbe571a	68	if (alen > 0)
78da6077	69	twi->TWI_IADR = addr;
2cbe571a WD	70
	71	length = len;
	72	buf = buffer;
	73	if (length && buf) { /* sanity check */
	74	if (rw) {
	75	twi->TWI_CR = AT91C_TWI_START;
	76	while (length--) {
	77	if (!length)
	78	twi->TWI_CR = AT91C_TWI_STOP;
	79	/* Wait until transfer is finished */
	80	if (!at91_poll_status(twi, AT91C_TWI_RXRDY)) {
45ea3fca	81	debug ("at91_i2c: timeout 1\n");
2cbe571a WD	82	return 1;
	83	}
	84	*buf++ = twi->TWI_RHR;
	85	}
	86	if (!at91_poll_status(twi, AT91C_TWI_TXCOMP)) {
45ea3fca	87	debug ("at91_i2c: timeout 2\n");
2cbe571a WD	88	return 1;
	89	}
	90	} else {
	91	twi->TWI_CR = AT91C_TWI_START;
	92	while (length--) {
	93	twi->TWI_THR = *buf++;
	94	if (!length)
	95	twi->TWI_CR = AT91C_TWI_STOP;
	96	if (!at91_poll_status(twi, AT91C_TWI_TXRDY)) {
45ea3fca	97	debug ("at91_i2c: timeout 3\n");
2cbe571a WD	98	return 1;
	99	}
	100	}
	101	/* Wait until transfer is finished */
	102	if (!at91_poll_status(twi, AT91C_TWI_TXCOMP)) {
45ea3fca	103	debug ("at91_i2c: timeout 4\n");
2cbe571a WD	104	return 1;
	105	}
	106	}
	107	}
	108	return 0;
	109	}
	110
	111	int
	112	i2c_probe(unsigned char chip)
	113	{
d52fb7e3	114	unsigned char buffer[1];
2cbe571a WD	115
	116	return at91_xfer(chip, 0, 0, buffer, 1, 1);
	117	}
	118
	119	int
59acc296 WD	120	i2c_read (unsigned char chip, unsigned int addr, int alen,
59acc296 WD	121	unsigned char *buffer, int len)
2cbe571a	122	{
6d0f6bcf	123	#ifdef CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW
2cbe571a WD	124	/* we only allow one address byte */
	125	if (alen > 1)
	126	return 1;
2cbe571a WD	127	/* XXX assume an ATMEL AT24C16 */
2cbe571a WD	128	if (alen == 1) {
b6508513	129	#if 0 /* EEPROM code already sets this correctly */
2cbe571a	130	chip \|= (addr >> 8) & 0xff;
b6508513	131	#endif
2cbe571a WD	132	addr = addr & 0xff;
	133	}
	134	#endif
	135	return at91_xfer(chip, addr, alen, buffer, len, 1);
	136	}
	137
	138	int
	139	i2c_write(unsigned char chip, unsigned int addr, int alen,
2a8af187	140	unsigned char *buffer, int len)
2cbe571a	141	{
6d0f6bcf	142	#ifdef CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW
2cbe571a WD	143	int i;
	144	unsigned char *buf;
	145
	146	/* we only allow one address byte */
	147	if (alen > 1)
	148	return 1;
2cbe571a WD	149	/* XXX assume an ATMEL AT24C16 */
	150	if (alen == 1) {
	151	buf = buffer;
	152	/* do single byte writes */
	153	for (i = 0; i < len; i++) {
b6508513	154	#if 0 /* EEPROM code already sets this correctly */
2cbe571a	155	chip \|= (addr >> 8) & 0xff;
b6508513	156	#endif
2cbe571a WD	157	addr = addr & 0xff;
	158	if (at91_xfer(chip, addr, alen, buf++, 1, 0))
	159	return 1;
b6508513	160	addr++;
2cbe571a	161	}
b6508513	162	return 0;
2cbe571a	163	}
2cbe571a WD	164	#endif
	165	return at91_xfer(chip, addr, alen, buffer, len, 0);
	166	}
	167
	168	/*
	169	* Main initialization routine
	170	*/
	171	void
	172	i2c_init(int speed, int slaveaddr)
	173	{
	174	AT91PS_TWI twi = (AT91PS_TWI) AT91_TWI_BASE;
	175
	176	*AT91C_PIOA_PDR = AT91C_PA25_TWD \| AT91C_PA26_TWCK;
	177	*AT91C_PIOA_ASR = AT91C_PA25_TWD \| AT91C_PA26_TWCK;
	178	*AT91C_PIOA_MDER = AT91C_PA25_TWD \| AT91C_PA26_TWCK;
	179	AT91C_PMC_PCER = 1 << AT91C_ID_TWI; / enable peripheral clock */
	180
	181	twi->TWI_IDR = 0x3ff; /* Disable all interrupts */
	182	twi->TWI_CR = AT91C_TWI_SWRST; /* Reset peripheral */
	183	twi->TWI_CR = AT91C_TWI_MSEN \| AT91C_TWI_SVDIS; /* Set Master mode */
	184
	185	/* Here, CKDIV = 1 and CHDIV=CLDIV ==> CLDIV = CHDIV = 1/4((Fmclk/FTWI) -6) /
	186	twi->TWI_CWGR = AT91C_TWI_CKDIV1 \| AT91C_TWI_CLDIV3 \| (AT91C_TWI_CLDIV3 << 8);
	187
45ea3fca	188	debug ("Found AT91 i2c\n");
2cbe571a WD	189	return;
2cbe571a WD	190	}
b77fad3b WD	191
	192	uchar i2c_reg_read(uchar i2c_addr, uchar reg)
	193	{
d52fb7e3	194	unsigned char buf;
b77fad3b WD	195
	196	i2c_read(i2c_addr, reg, 1, &buf, 1);
	197
	198	return(buf);
	199	}
	200
	201	void i2c_reg_write(uchar i2c_addr, uchar reg, uchar val)
	202	{
	203	i2c_write(i2c_addr, reg, 1, &val, 1);
	204	}
	205
3ee9f03f JS	206	int i2c_set_bus_speed(unsigned int speed)
	207	{
	208	return -1;
	209	}
	210
	211	unsigned int i2c_get_bus_speed(void)
	212	{
6d0f6bcf	213	return CONFIG_SYS_I2C_SPEED;
3ee9f03f JS	214	}
3ee9f03f JS	215
2cbe571a	216	#endif /* CONFIG_HARD_I2C */