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9171fc81 MF |
1 | /* |
2 | * U-boot - start.S Startup file for Blackfin u-boot | |
3 | * | |
4 | * Copyright (c) 2005-2007 Analog Devices Inc. | |
5 | * | |
6 | * This file is based on head.S | |
7 | * Copyright (c) 2003 Metrowerks/Motorola | |
8 | * Copyright (C) 1998 D. Jeff Dionne <jeff@ryeham.ee.ryerson.ca>, | |
9 | * Kenneth Albanowski <kjahds@kjahds.com>, | |
10 | * The Silver Hammer Group, Ltd. | |
11 | * (c) 1995, Dionne & Associates | |
12 | * (c) 1995, DKG Display Tech. | |
13 | * | |
14 | * See file CREDITS for list of people who contributed to this | |
15 | * project. | |
16 | * | |
17 | * This program is free software; you can redistribute it and/or | |
18 | * modify it under the terms of the GNU General Public License as | |
19 | * published by the Free Software Foundation; either version 2 of | |
20 | * the License, or (at your option) any later version. | |
21 | * | |
22 | * This program is distributed in the hope that it will be useful, | |
23 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
24 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
25 | * GNU General Public License for more details. | |
26 | * | |
27 | * You should have received a copy of the GNU General Public License | |
28 | * along with this program; if not, write to the Free Software | |
29 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, | |
30 | * MA 02110-1301 USA | |
31 | */ | |
32 | ||
33 | #include <config.h> | |
34 | #include <asm/blackfin.h> | |
35 | #include <asm/mach-common/bits/core.h> | |
36 | #include <asm/mach-common/bits/dma.h> | |
37 | #include <asm/mach-common/bits/pll.h> | |
38 | ||
39 | #include "serial.h" | |
40 | ||
41 | /* It may seem odd that we make calls to functions even though we haven't | |
42 | * relocated ourselves yet out of {flash,ram,wherever}. This is OK because | |
43 | * the "call" instruction in the Blackfin architecture is actually PC | |
44 | * relative. So we can call functions all we want and not worry about them | |
45 | * not being relocated yet. | |
46 | */ | |
47 | ||
48 | .text | |
49 | ENTRY(_start) | |
50 | ||
51 | /* Set our initial stack to L1 scratch space */ | |
52 | sp.l = LO(L1_SRAM_SCRATCH + L1_SRAM_SCRATCH_SIZE); | |
53 | sp.h = HI(L1_SRAM_SCRATCH + L1_SRAM_SCRATCH_SIZE); | |
54 | ||
55 | #ifdef CONFIG_HW_WATCHDOG | |
56 | # ifndef CONFIG_HW_WATCHDOG_TIMEOUT_START | |
57 | # define CONFIG_HW_WATCHDOG_TIMEOUT_START 5000 | |
58 | # endif | |
59 | /* Program the watchdog with an initial timeout of ~5 seconds. | |
60 | * That should be long enough to bootstrap ourselves up and | |
61 | * then the common u-boot code can take over. | |
62 | */ | |
63 | P0.L = LO(WDOG_CNT); | |
64 | P0.H = HI(WDOG_CNT); | |
65 | R0.L = 0; | |
66 | R0.H = HI(MSEC_TO_SCLK(CONFIG_HW_WATCHDOG_TIMEOUT_START)); | |
67 | [P0] = R0; | |
68 | /* fire up the watchdog - R0.L above needs to be 0x0000 */ | |
69 | W[P0 + (WDOG_CTL - WDOG_CNT)] = R0; | |
70 | #endif | |
71 | ||
72 | /* Turn on the serial for debugging the init process */ | |
73 | serial_early_init | |
74 | serial_early_set_baud | |
75 | ||
76 | serial_early_puts("Init Registers"); | |
77 | ||
78 | /* Disable nested interrupts and enable CYCLES for udelay() */ | |
79 | R0 = CCEN | 0x30; | |
80 | SYSCFG = R0; | |
81 | ||
82 | /* Zero out registers required by Blackfin ABI. | |
83 | * http://docs.blackfin.uclinux.org/doku.php?id=application_binary_interface | |
84 | */ | |
85 | r1 = 0 (x); | |
86 | /* Disable circular buffers */ | |
87 | l0 = r1; | |
88 | l1 = r1; | |
89 | l2 = r1; | |
90 | l3 = r1; | |
91 | /* Disable hardware loops in case we were started by 'go' */ | |
92 | lc0 = r1; | |
93 | lc1 = r1; | |
94 | ||
95 | /* Save RETX so we can pass it while booting Linux */ | |
96 | r7 = RETX; | |
97 | ||
98 | #if (CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_BYPASS) | |
99 | /* In bypass mode, we don't have an LDR with an init block | |
100 | * so we need to explicitly call it ourselves. This will | |
101 | * reprogram our clocks and setup our async banks. | |
102 | */ | |
103 | /* XXX: we should DMA this into L1, put external memory into | |
104 | * self refresh, and then jump there ... | |
105 | */ | |
106 | call _get_pc; | |
107 | r3 = 0x0; | |
108 | r3.h = 0x2000; | |
109 | cc = r0 < r3 (iu); | |
110 | if cc jump .Lproc_initialized; | |
111 | ||
112 | serial_early_puts("Program Clocks"); | |
113 | ||
114 | call _initcode; | |
115 | ||
116 | /* Since we reprogrammed SCLK, we need to update the serial divisor */ | |
117 | serial_early_set_baud | |
118 | ||
119 | .Lproc_initialized: | |
120 | #endif | |
121 | ||
122 | /* Inform upper layers if we had to do the relocation ourselves. | |
123 | * This allows us to detect whether we were loaded by 'go 0x1000' | |
124 | * or by the bootrom from an LDR. "r6" is "loaded_from_ldr". | |
125 | */ | |
126 | r6 = 1 (x); | |
127 | ||
128 | /* Relocate from wherever are (FLASH/RAM/etc...) to the | |
129 | * hardcoded monitor location in the end of RAM. | |
130 | */ | |
131 | serial_early_puts("Relocate"); | |
132 | call _get_pc; | |
133 | .Loffset: | |
134 | r2.l = .Loffset; | |
135 | r2.h = .Loffset; | |
136 | r3.l = _start; | |
137 | r3.h = _start; | |
138 | r1 = r2 - r3; | |
139 | ||
140 | r0 = r0 - r1; | |
141 | ||
142 | cc = r0 == r3; | |
143 | if cc jump .Lnorelocate; | |
144 | ||
145 | r6 = 0 (x); | |
146 | p1 = r0; | |
147 | ||
6d0f6bcf JCPV |
148 | p2.l = LO(CONFIG_SYS_MONITOR_BASE); |
149 | p2.h = HI(CONFIG_SYS_MONITOR_BASE); | |
9171fc81 MF |
150 | |
151 | p3 = 0x04; | |
6d0f6bcf JCPV |
152 | p4.l = LO(CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN); |
153 | p4.h = HI(CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN); | |
9171fc81 MF |
154 | .Lloop1: |
155 | r1 = [p1 ++ p3]; | |
156 | [p2 ++ p3] = r1; | |
157 | cc=p2==p4; | |
158 | if !cc jump .Lloop1; | |
159 | ||
160 | /* Initialize BSS section ... we know that memset() does not | |
161 | * use the BSS, so it is safe to call here. The bootrom LDR | |
162 | * takes care of clearing things for us. | |
163 | */ | |
164 | serial_early_puts("Zero BSS"); | |
165 | r0.l = __bss_start; | |
166 | r0.h = __bss_start; | |
167 | r1 = 0 (x); | |
168 | r2.l = __bss_end; | |
169 | r2.h = __bss_end; | |
170 | r2 = r2 - r0; | |
171 | call _memset; | |
172 | ||
173 | .Lnorelocate: | |
174 | ||
175 | /* Setup the actual stack in external memory */ | |
176 | r0.h = HI(CONFIG_STACKBASE); | |
177 | r0.l = LO(CONFIG_STACKBASE); | |
178 | sp = r0; | |
179 | fp = sp; | |
180 | ||
181 | /* Now lower ourselves from the highest interrupt level to | |
182 | * the lowest. We do this by masking all interrupts but 15, | |
183 | * setting the 15 handler to "board_init_f", raising the 15 | |
184 | * interrupt, and then returning from the highest interrupt | |
185 | * level to the dummy "jump" until the interrupt controller | |
186 | * services the pending 15 interrupt. | |
187 | */ | |
188 | serial_early_puts("Lower to 15"); | |
189 | r0 = r7; | |
190 | r1 = r6; | |
191 | p0.l = LO(EVT15); | |
192 | p0.h = HI(EVT15); | |
193 | p1.l = _cpu_init_f; | |
194 | p1.h = _cpu_init_f; | |
195 | [p0] = p1; | |
196 | p2.l = LO(IMASK); | |
197 | p2.h = HI(IMASK); | |
198 | p3.l = LO(EVT_IVG15); | |
199 | p3.h = HI(EVT_IVG15); | |
200 | [p2] = p3; | |
201 | raise 15; | |
202 | p4.l = .LWAIT_HERE; | |
203 | p4.h = .LWAIT_HERE; | |
204 | reti = p4; | |
205 | rti; | |
206 | ||
207 | .LWAIT_HERE: | |
208 | jump .LWAIT_HERE; | |
209 | ENDPROC(_start) | |
210 | ||
211 | LENTRY(_get_pc) | |
212 | r0 = rets; | |
213 | #if ANOMALY_05000371 | |
214 | NOP; | |
215 | NOP; | |
216 | NOP; | |
217 | #endif | |
218 | rts; | |
219 | ENDPROC(_get_pc) |