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1 | /* |
2 | * (C) Copyright 2003 Josef Baumgartner <josef.baumgartner@telex.de> | |
3 | * | |
4 | * (C) Copyright 2000-2004 | |
5 | * Wolfgang Denk, DENX Software Engineering, wd@denx.de. | |
6 | * | |
7 | * See file CREDITS for list of people who contributed to this | |
8 | * project. | |
9 | * | |
10 | * This program is free software; you can redistribute it and/or | |
11 | * modify it under the terms of the GNU General Public License as | |
12 | * published by the Free Software Foundation; either version 2 of | |
13 | * the License, or (at your option) any later version. | |
14 | * | |
15 | * This program is distributed in the hope that it will be useful, | |
16 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
17 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
18 | * GNU General Public License for more details. | |
19 | * | |
20 | * You should have received a copy of the GNU General Public License | |
21 | * along with this program; if not, write to the Free Software | |
22 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, | |
23 | * MA 02111-1307 USA | |
24 | */ | |
25 | ||
26 | #include <common.h> | |
27 | #include <watchdog.h> | |
28 | #include <asm/processor.h> | |
29 | ||
30 | #ifdef CONFIG_M5272 | |
31 | #include <asm/m5272.h> | |
32 | #include <asm/immap_5272.h> | |
33 | #endif | |
34 | ||
35 | #ifdef CONFIG_M5282 | |
36 | #include <asm/m5282.h> | |
37 | #include <asm/immap_5282.h> | |
38 | #endif | |
39 | ||
40 | ||
41 | #define NR_IRQS 31 | |
42 | ||
43 | /* | |
44 | * Interrupt vector functions. | |
45 | */ | |
46 | struct interrupt_action { | |
47 | interrupt_handler_t *handler; | |
48 | void *arg; | |
49 | } | |
50 | ||
51 | static struct interrupt_action irq_vecs[NR_IRQS]; | |
52 | ||
53 | static __inline__ unsigned short get_sr (void) | |
54 | { | |
55 | unsigned short sr; | |
56 | ||
57 | asm volatile ("move.w %%sr,%0":"=r" (sr):); | |
58 | ||
59 | return sr; | |
60 | } | |
61 | ||
62 | static __inline__ void set_sr (unsigned short sr) | |
63 | { | |
64 | asm volatile ("move.w %0,%%sr"::"r" (sr)); | |
65 | } | |
66 | ||
67 | /************************************************************************/ | |
68 | /* | |
69 | * Install and free an interrupt handler | |
70 | */ | |
71 | void irq_install_handler (int vec, interrupt_handler_t * handler, void *arg) | |
72 | { | |
73 | #ifdef CONFIG_M5272 | |
74 | volatile intctrl_t *intp = (intctrl_t *) (CFG_MBAR + MCFSIM_ICR1); | |
75 | #endif | |
76 | int vec_base = 0; | |
77 | ||
78 | #ifdef CONFIG_M5272 | |
79 | vec_base = intp->int_pivr & 0xe0; | |
80 | #endif | |
81 | ||
82 | if ((vec < vec_base) || (vec > vec_base + NR_IRQS)) { | |
83 | printf ("irq_install_handler: wrong interrupt vector %d\n", | |
84 | vec); | |
85 | return; | |
86 | } | |
87 | ||
88 | irq_vecs[vec - vec_base].handler = handler; | |
89 | irq_vecs[vec - vec_base].arg = arg; | |
90 | } | |
91 | ||
92 | void irq_free_handler (int vec) | |
93 | { | |
94 | #ifdef CONFIG_M5272 | |
95 | volatile intctrl_t *intp = (intctrl_t *) (CFG_MBAR + MCFSIM_ICR1); | |
96 | #endif | |
97 | int vec_base = 0; | |
98 | ||
99 | #ifdef CONFIG_M5272 | |
100 | vec_base = intp->int_pivr & 0xe0; | |
101 | #endif | |
102 | ||
103 | if ((vec < vec_base) || (vec > vec_base + NR_IRQS)) { | |
104 | return; | |
105 | } | |
106 | ||
107 | irq_vecs[vec - vec_base].handler = NULL; | |
108 | irq_vecs[vec - vec_base].arg = NULL; | |
109 | } | |
110 | ||
111 | void enable_interrupts (void) | |
112 | { | |
113 | unsigned short sr; | |
114 | ||
115 | sr = get_sr (); | |
116 | set_sr (sr & ~0x0700); | |
117 | } | |
118 | ||
119 | int disable_interrupts (void) | |
120 | { | |
121 | unsigned short sr; | |
122 | ||
123 | sr = get_sr (); | |
124 | set_sr (sr | 0x0700); | |
125 | ||
126 | return ((sr & 0x0700) == 0); /* return TRUE, if interrupts were enabled before */ | |
127 | } | |
128 | ||
129 | void int_handler (struct pt_regs *fp) | |
130 | { | |
131 | #ifdef CONFIG_M5272 | |
132 | volatile intctrl_t *intp = (intctrl_t *) (CFG_MBAR + MCFSIM_ICR1); | |
133 | #endif | |
134 | int vec, vec_base = 0; | |
135 | ||
136 | vec = (fp->vector >> 2) & 0xff; | |
137 | #ifdef CONFIG_M5272 | |
138 | vec_base = intp->int_pivr & 0xe0; | |
139 | #endif | |
140 | ||
141 | if (irq_vecs[vec - vec_base].handler != NULL) { | |
142 | irq_vecs[vec - | |
143 | vec_base].handler (irq_vecs[vec - vec_base].arg); | |
144 | } else { | |
145 | printf ("\nBogus External Interrupt Vector %ld\n", vec); | |
146 | } | |
147 | } | |
148 | ||
149 | #ifdef CONFIG_M5272 | |
150 | int interrupt_init (void) | |
151 | { | |
152 | volatile intctrl_t *intp = (intctrl_t *) (CFG_MBAR + MCFSIM_ICR1); | |
153 | ||
154 | /* disable all external interrupts */ | |
155 | intp->int_icr1 = 0x88888888; | |
156 | intp->int_icr2 = 0x88888888; | |
157 | intp->int_icr3 = 0x88888888; | |
158 | intp->int_icr4 = 0x88888888; | |
159 | intp->int_pitr = 0x00000000; | |
160 | /* initialize vector register */ | |
161 | intp->int_pivr = 0x40; | |
162 | ||
163 | enable_interrupts (); | |
164 | ||
165 | return 0; | |
166 | } | |
167 | #endif | |
168 | ||
169 | #ifdef CONFIG_M5282 | |
170 | int interrupt_init (void) | |
171 | { | |
172 | return 0; | |
173 | } | |
174 | #endif |