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8993e54b RJ |
1 | /* |
2 | * (C) Copyright 2003 - 2007 | |
3 | * Wolfgang Denk, DENX Software Engineering, wd@denx.de. | |
4 | * | |
5 | * See file CREDITS for list of people who contributed to this | |
6 | * project. | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or | |
9 | * modify it under the terms of the GNU General Public License as | |
10 | * published by the Free Software Foundation; either version 2 of | |
11 | * the License, or (at your option) any later version. | |
12 | * | |
13 | * This program is distributed in the hope that it will be useful, | |
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | * GNU General Public License for more details. | |
17 | * | |
18 | * You should have received a copy of the GNU General Public License | |
19 | * along with this program; if not, write to the Free Software | |
20 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, | |
21 | * MA 02111-1307 USA | |
22 | * | |
23 | * Based on the MPC5xxx code. | |
24 | */ | |
25 | ||
26 | #include <common.h> | |
27 | ||
28 | DECLARE_GLOBAL_DATA_PTR; | |
29 | ||
30 | #ifdef CONFIG_HARD_I2C | |
31 | ||
32 | #include <mpc512x.h> | |
33 | #include <i2c.h> | |
34 | ||
6d0f6bcf | 35 | #define immr ((immap_t *)CONFIG_SYS_IMMR) |
8993e54b RJ |
36 | |
37 | /* by default set I2C bus 0 active */ | |
38 | static unsigned int bus_num = 0; | |
39 | ||
40 | #define I2C_TIMEOUT 100 | |
41 | #define I2C_RETRIES 3 | |
42 | ||
43 | struct mpc512x_i2c_tap { | |
44 | int scl2tap; | |
45 | int tap2tap; | |
46 | }; | |
47 | ||
48 | static int mpc_reg_in(volatile u32 *reg); | |
49 | static void mpc_reg_out(volatile u32 *reg, int val, int mask); | |
50 | static int wait_for_bb(void); | |
51 | static int wait_for_pin(int *status); | |
52 | static int do_address(uchar chip, char rdwr_flag); | |
53 | static int send_bytes(uchar chip, char *buf, int len); | |
54 | static int receive_bytes(uchar chip, char *buf, int len); | |
55 | static int mpc_get_fdr(int); | |
56 | ||
57 | static int mpc_reg_in (volatile u32 *reg) | |
58 | { | |
59 | int ret = *reg >> 24; | |
60 | __asm__ __volatile__ ("eieio"); | |
61 | return ret; | |
62 | } | |
63 | ||
64 | static void mpc_reg_out (volatile u32 *reg, int val, int mask) | |
65 | { | |
66 | int tmp; | |
67 | ||
68 | if (!mask) { | |
69 | *reg = val << 24; | |
70 | } else { | |
71 | tmp = mpc_reg_in (reg); | |
72 | *reg = ((tmp & ~mask) | (val & mask)) << 24; | |
73 | } | |
74 | __asm__ __volatile__ ("eieio"); | |
75 | ||
76 | return; | |
77 | } | |
78 | ||
79 | static int wait_for_bb (void) | |
80 | { | |
81 | i2c512x_dev_t *regs = &immr->i2c.dev[bus_num]; | |
82 | int timeout = I2C_TIMEOUT; | |
83 | int status; | |
84 | ||
85 | status = mpc_reg_in (®s->msr); | |
86 | ||
87 | while (timeout-- && (status & I2C_BB)) { | |
88 | volatile int temp; | |
89 | mpc_reg_out (®s->mcr, I2C_STA, I2C_STA); | |
90 | temp = mpc_reg_in (®s->mdr); | |
91 | mpc_reg_out (®s->mcr, 0, I2C_STA); | |
92 | mpc_reg_out (®s->mcr, 0, 0); | |
93 | mpc_reg_out (®s->mcr, I2C_EN, 0); | |
94 | ||
95 | udelay (1000); | |
96 | status = mpc_reg_in (®s->msr); | |
97 | } | |
98 | ||
99 | return (status & I2C_BB); | |
100 | } | |
101 | ||
102 | static int wait_for_pin (int *status) | |
103 | { | |
104 | i2c512x_dev_t *regs = &immr->i2c.dev[bus_num]; | |
105 | int timeout = I2C_TIMEOUT; | |
106 | ||
107 | *status = mpc_reg_in (®s->msr); | |
108 | ||
109 | while (timeout-- && !(*status & I2C_IF)) { | |
110 | udelay (1000); | |
111 | *status = mpc_reg_in (®s->msr); | |
112 | } | |
113 | ||
114 | if (!(*status & I2C_IF)) { | |
115 | return -1; | |
116 | } | |
117 | ||
118 | mpc_reg_out (®s->msr, 0, I2C_IF); | |
119 | ||
120 | return 0; | |
121 | } | |
122 | ||
123 | static int do_address (uchar chip, char rdwr_flag) | |
124 | { | |
125 | i2c512x_dev_t *regs = &immr->i2c.dev[bus_num]; | |
126 | int status; | |
127 | ||
128 | chip <<= 1; | |
129 | ||
130 | if (rdwr_flag) { | |
131 | chip |= 1; | |
132 | } | |
133 | ||
134 | mpc_reg_out (®s->mcr, I2C_TX, I2C_TX); | |
135 | mpc_reg_out (®s->mdr, chip, 0); | |
136 | ||
137 | if (wait_for_pin (&status)) { | |
138 | return -2; | |
139 | } | |
140 | ||
141 | if (status & I2C_RXAK) { | |
142 | return -3; | |
143 | } | |
144 | ||
145 | return 0; | |
146 | } | |
147 | ||
148 | static int send_bytes (uchar chip, char *buf, int len) | |
149 | { | |
150 | i2c512x_dev_t *regs = &immr->i2c.dev[bus_num]; | |
151 | int wrcount; | |
152 | int status; | |
153 | ||
154 | for (wrcount = 0; wrcount < len; ++wrcount) { | |
155 | ||
156 | mpc_reg_out (®s->mdr, buf[wrcount], 0); | |
157 | ||
158 | if (wait_for_pin (&status)) { | |
159 | break; | |
160 | } | |
161 | ||
162 | if (status & I2C_RXAK) { | |
163 | break; | |
164 | } | |
165 | ||
166 | } | |
167 | ||
168 | return !(wrcount == len); | |
169 | } | |
170 | ||
171 | static int receive_bytes (uchar chip, char *buf, int len) | |
172 | { | |
173 | i2c512x_dev_t *regs = &immr->i2c.dev[bus_num]; | |
174 | int dummy = 1; | |
175 | int rdcount = 0; | |
176 | int status; | |
177 | int i; | |
178 | ||
179 | mpc_reg_out (®s->mcr, 0, I2C_TX); | |
180 | ||
181 | for (i = 0; i < len; ++i) { | |
182 | buf[rdcount] = mpc_reg_in (®s->mdr); | |
183 | ||
184 | if (dummy) { | |
185 | dummy = 0; | |
186 | } else { | |
187 | rdcount++; | |
188 | } | |
189 | ||
190 | if (wait_for_pin (&status)) { | |
191 | return -4; | |
192 | } | |
193 | } | |
194 | ||
195 | mpc_reg_out (®s->mcr, I2C_TXAK, I2C_TXAK); | |
196 | buf[rdcount++] = mpc_reg_in (®s->mdr); | |
197 | ||
198 | if (wait_for_pin (&status)) { | |
199 | return -5; | |
200 | } | |
201 | ||
202 | mpc_reg_out (®s->mcr, 0, I2C_TXAK); | |
203 | ||
204 | return 0; | |
205 | } | |
206 | ||
207 | /**************** I2C API ****************/ | |
208 | ||
209 | void i2c_init (int speed, int saddr) | |
210 | { | |
211 | int i; | |
212 | for(i = 0; i < I2C_BUS_CNT; i++){ | |
213 | i2c512x_dev_t *regs = &immr->i2c.dev[i]; | |
214 | mpc_reg_out (®s->mcr, 0, 0); | |
215 | ||
216 | /* Set clock */ | |
217 | mpc_reg_out (®s->mfdr, mpc_get_fdr (speed), 0); | |
218 | mpc_reg_out (®s->madr, saddr << 1, 0); | |
219 | ||
220 | /* Enable module */ | |
221 | mpc_reg_out (®s->mcr, I2C_EN, I2C_INIT_MASK); | |
222 | mpc_reg_out (®s->msr, 0, I2C_IF); | |
223 | } | |
224 | ||
225 | /* Disable interrupts */ | |
226 | immr->i2c.icr = 0; | |
227 | /* Turn off filters */ | |
228 | immr->i2c.mifr = 0; | |
229 | return; | |
230 | } | |
231 | ||
232 | static int mpc_get_fdr (int speed) | |
233 | { | |
234 | static int fdr = -1; | |
235 | ||
236 | if (fdr == -1) { | |
237 | ulong best_speed = 0; | |
238 | ulong divider; | |
5d49e0e1 | 239 | ulong ips, scl; |
8993e54b RJ |
240 | ulong bestmatch = 0xffffffffUL; |
241 | int best_i = 0, best_j = 0, i, j; | |
242 | int SCL_Tap[] = { 9, 10, 12, 15, 5, 6, 7, 8}; | |
243 | struct mpc512x_i2c_tap scltap[] = { | |
244 | {4, 1}, | |
245 | {4, 2}, | |
246 | {6, 4}, | |
247 | {6, 8}, | |
248 | {14, 16}, | |
249 | {30, 32}, | |
250 | {62, 64}, | |
251 | {126, 128} | |
252 | }; | |
253 | ||
5d49e0e1 | 254 | ips = gd->ips_clk; |
8993e54b RJ |
255 | for (i = 7; i >= 0; i--) { |
256 | for (j = 7; j >= 0; j--) { | |
257 | scl = 2 * (scltap[j].scl2tap + | |
258 | (SCL_Tap[i] - 1) * scltap[j].tap2tap | |
259 | + 2); | |
5d49e0e1 GB |
260 | if (ips <= speed*scl) { |
261 | if ((speed*scl - ips) < bestmatch) { | |
262 | bestmatch = speed*scl - ips; | |
8993e54b RJ |
263 | best_i = i; |
264 | best_j = j; | |
5d49e0e1 | 265 | best_speed = ips/scl; |
8993e54b RJ |
266 | } |
267 | } | |
268 | } | |
269 | } | |
270 | divider = (best_i & 3) | ((best_i & 4) << 3) | (best_j << 2); | |
271 | if (gd->flags & GD_FLG_RELOC) { | |
272 | fdr = divider; | |
273 | } else { | |
274 | debug("%ld kHz, \n", best_speed / 1000); | |
275 | return divider; | |
276 | } | |
277 | } | |
278 | ||
279 | return fdr; | |
280 | } | |
281 | ||
282 | int i2c_probe (uchar chip) | |
283 | { | |
284 | i2c512x_dev_t *regs = &immr->i2c.dev[bus_num]; | |
285 | int i; | |
286 | ||
287 | for (i = 0; i < I2C_RETRIES; i++) { | |
288 | mpc_reg_out (®s->mcr, I2C_STA, I2C_STA); | |
289 | ||
290 | if (! do_address (chip, 0)) { | |
291 | mpc_reg_out (®s->mcr, 0, I2C_STA); | |
292 | udelay (500); | |
293 | break; | |
294 | } | |
295 | ||
296 | mpc_reg_out (®s->mcr, 0, I2C_STA); | |
297 | udelay (500); | |
298 | } | |
299 | ||
300 | return (i == I2C_RETRIES); | |
301 | } | |
302 | ||
303 | int i2c_read (uchar chip, uint addr, int alen, uchar *buf, int len) | |
304 | { | |
305 | char xaddr[4]; | |
306 | i2c512x_dev_t *regs = &immr->i2c.dev[bus_num]; | |
307 | int ret = -1; | |
308 | ||
309 | xaddr[0] = (addr >> 24) & 0xFF; | |
310 | xaddr[1] = (addr >> 16) & 0xFF; | |
311 | xaddr[2] = (addr >> 8) & 0xFF; | |
312 | xaddr[3] = addr & 0xFF; | |
313 | ||
314 | if (wait_for_bb ()) { | |
315 | printf ("i2c_read: bus is busy\n"); | |
316 | goto Done; | |
317 | } | |
318 | ||
319 | mpc_reg_out (®s->mcr, I2C_STA, I2C_STA); | |
320 | if (do_address (chip, 0)) { | |
321 | printf ("i2c_read: failed to address chip\n"); | |
322 | goto Done; | |
323 | } | |
324 | ||
325 | if (send_bytes (chip, &xaddr[4-alen], alen)) { | |
326 | printf ("i2c_read: send_bytes failed\n"); | |
327 | goto Done; | |
328 | } | |
329 | ||
330 | mpc_reg_out (®s->mcr, I2C_RSTA, I2C_RSTA); | |
331 | if (do_address (chip, 1)) { | |
332 | printf ("i2c_read: failed to address chip\n"); | |
333 | goto Done; | |
334 | } | |
335 | ||
336 | if (receive_bytes (chip, (char *)buf, len)) { | |
337 | printf ("i2c_read: receive_bytes failed\n"); | |
338 | goto Done; | |
339 | } | |
340 | ||
341 | ret = 0; | |
342 | Done: | |
343 | mpc_reg_out (®s->mcr, 0, I2C_STA); | |
344 | return ret; | |
345 | } | |
346 | ||
347 | int i2c_write (uchar chip, uint addr, int alen, uchar *buf, int len) | |
348 | { | |
349 | char xaddr[4]; | |
350 | i2c512x_dev_t *regs = &immr->i2c.dev[bus_num]; | |
351 | int ret = -1; | |
352 | ||
353 | xaddr[0] = (addr >> 24) & 0xFF; | |
354 | xaddr[1] = (addr >> 16) & 0xFF; | |
355 | xaddr[2] = (addr >> 8) & 0xFF; | |
356 | xaddr[3] = addr & 0xFF; | |
357 | ||
358 | if (wait_for_bb ()) { | |
359 | printf ("i2c_write: bus is busy\n"); | |
360 | goto Done; | |
361 | } | |
362 | ||
363 | mpc_reg_out (®s->mcr, I2C_STA, I2C_STA); | |
364 | if (do_address (chip, 0)) { | |
365 | printf ("i2c_write: failed to address chip\n"); | |
366 | goto Done; | |
367 | } | |
368 | ||
369 | if (send_bytes (chip, &xaddr[4-alen], alen)) { | |
370 | printf ("i2c_write: send_bytes failed\n"); | |
371 | goto Done; | |
372 | } | |
373 | ||
374 | if (send_bytes (chip, (char *)buf, len)) { | |
375 | printf ("i2c_write: send_bytes failed\n"); | |
376 | goto Done; | |
377 | } | |
378 | ||
379 | ret = 0; | |
380 | Done: | |
381 | mpc_reg_out (®s->mcr, 0, I2C_STA); | |
382 | return ret; | |
383 | } | |
384 | ||
385 | uchar i2c_reg_read (uchar chip, uchar reg) | |
386 | { | |
387 | uchar buf; | |
388 | ||
389 | i2c_read (chip, reg, 1, &buf, 1); | |
390 | ||
391 | return buf; | |
392 | } | |
393 | ||
394 | void i2c_reg_write (uchar chip, uchar reg, uchar val) | |
395 | { | |
396 | i2c_write (chip, reg, 1, &val, 1); | |
397 | ||
398 | return; | |
399 | } | |
400 | ||
401 | ||
402 | int i2c_set_bus_num (unsigned int bus) | |
403 | { | |
404 | if (bus >= I2C_BUS_CNT) { | |
405 | return -1; | |
406 | } | |
407 | bus_num = bus; | |
408 | ||
409 | return 0; | |
410 | } | |
411 | ||
412 | unsigned int i2c_get_bus_num (void) | |
413 | { | |
414 | return bus_num; | |
415 | } | |
416 | ||
417 | /* TODO */ | |
418 | unsigned int i2c_get_bus_speed (void) | |
419 | { | |
420 | return -1; | |
421 | } | |
422 | ||
423 | int i2c_set_bus_speed (unsigned int speed) | |
424 | { | |
6d0f6bcf | 425 | if (speed != CONFIG_SYS_I2C_SPEED) |
8993e54b RJ |
426 | return -1; |
427 | ||
428 | return 0; | |
429 | } | |
430 | ||
431 | #endif /* CONFIG_HARD_I2C */ |