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rename CFG_ macros to CONFIG_SYS
[people/ms/u-boot.git] / cpu / mpc5xx / serial.c
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1/*
2 * (C) Copyright 2003
3 * Martin Winistoerfer, martinwinistoerfer@gmx.ch.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
8bde7f77 20 * Foundation,
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21 */
22
23/*
24 * File: serial.c
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25 *
26 * Discription: Serial interface driver for SCI1 and SCI2.
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27 * Since this code will be called from ROM use
28 * only non-static local variables.
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29 *
30 */
31
32#include <common.h>
33#include <watchdog.h>
34#include <command.h>
35#include <mpc5xx.h>
36
d87080b7 37DECLARE_GLOBAL_DATA_PTR;
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38
39/*
8bde7f77 40 * Local function prototypes
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41 */
42
43static int ready_to_send(void);
44
45/*
46 * Minimal global serial functions needed to use one of the SCI modules.
47 */
48
49int serial_init (void)
50{
6d0f6bcf 51 volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
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52
53 serial_setbrg();
54
55#if defined(CONFIG_5xx_CONS_SCI1)
56 /* 10-Bit, 1 start bit, 8 data bit, no parity, 1 stop bit */
57 immr->im_qsmcm.qsmcm_scc1r1 = SCI_M_10;
8bde7f77 58 immr->im_qsmcm.qsmcm_scc1r1 = SCI_TE | SCI_RE;
0db5bca8 59#else
8bde7f77 60 immr->im_qsmcm.qsmcm_scc2r1 = SCI_M_10;
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61 immr->im_qsmcm.qsmcm_scc2r1 = SCI_TE | SCI_RE;
62#endif
63 return 0;
64}
65
66void serial_putc(const char c)
8bde7f77 67{
6d0f6bcf 68 volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
8bde7f77 69
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70 /* Test for completition */
71 if(ready_to_send()) {
72#if defined(CONFIG_5xx_CONS_SCI1)
8bde7f77 73 immr->im_qsmcm.qsmcm_sc1dr = (short)c;
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74#else
75 immr->im_qsmcm.qsmcm_sc2dr = (short)c;
8bde7f77 76#endif
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77 if(c == '\n') {
78 if(ready_to_send());
79#if defined(CONFIG_5xx_CONS_SCI1)
80 immr->im_qsmcm.qsmcm_sc1dr = (short)'\r';
81#else
82 immr->im_qsmcm.qsmcm_sc2dr = (short)'\r';
83#endif
84 }
85 }
86}
87
88int serial_getc(void)
8bde7f77 89{
6d0f6bcf 90 volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
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91 volatile short status;
92 unsigned char tmp;
8bde7f77 93
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94 /* New data ? */
95 do {
96#if defined(CONFIG_5xx_CONS_SCI1)
8bde7f77 97 status = immr->im_qsmcm.qsmcm_sc1sr;
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98#else
99 status = immr->im_qsmcm.qsmcm_sc2sr;
100#endif
101
102#if defined(CONFIG_WATCHDOG)
8bde7f77 103 reset_5xx_watchdog (immr);
0db5bca8 104#endif
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105 } while ((status & SCI_RDRF) == 0);
106
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107 /* Read data */
108#if defined(CONFIG_5xx_CONS_SCI1)
8bde7f77 109 tmp = (unsigned char)(immr->im_qsmcm.qsmcm_sc1dr & SCI_SCXDR_MK);
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110#else
111 tmp = (unsigned char)( immr->im_qsmcm.qsmcm_sc2dr & SCI_SCXDR_MK);
112#endif
113 return tmp;
114}
115
116int serial_tstc()
117{
6d0f6bcf 118 volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
8bde7f77 119 short status;
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120
121 /* New data character ? */
122#if defined(CONFIG_5xx_CONS_SCI1)
8bde7f77 123 status = immr->im_qsmcm.qsmcm_sc1sr;
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124#else
125 status = immr->im_qsmcm.qsmcm_sc2sr;
126#endif
8bde7f77 127 return (status & SCI_RDRF);
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128}
129
130void serial_setbrg (void)
131{
6d0f6bcf 132 volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
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133 short scxbr;
134
135 /* Set baudrate */
136 scxbr = (gd->cpu_clk / (32 * gd->baudrate));
137#if defined(CONFIG_5xx_CONS_SCI1)
8bde7f77 138 immr->im_qsmcm.qsmcm_scc1r0 = (scxbr & SCI_SCXBR_MK);
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139#else
140 immr->im_qsmcm.qsmcm_scc2r0 = (scxbr & SCI_SCXBR_MK);
141#endif
142}
143
144void serial_puts (const char *s)
145{
146 while (*s) {
147 serial_putc(*s);
148 ++s;
149 }
150}
151
152int ready_to_send(void)
153{
6d0f6bcf 154 volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
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155 volatile short status;
156
8bde7f77 157 do {
0db5bca8 158#if defined(CONFIG_5xx_CONS_SCI1)
8bde7f77 159 status = immr->im_qsmcm.qsmcm_sc1sr;
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160#else
161 status = immr->im_qsmcm.qsmcm_sc2sr;
162#endif
163
164#if defined(CONFIG_WATCHDOG)
8bde7f77 165 reset_5xx_watchdog (immr);
0db5bca8 166#endif
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167 } while ((status & SCI_TDRE) == 0);
168 return 1;
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169
170}