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531716e1 WD |
1 | /* |
2 | * (C) Copyright 2003 | |
3 | * Wolfgang Denk, DENX Software Engineering, wd@denx.de. | |
4 | * | |
5 | * See file CREDITS for list of people who contributed to this | |
6 | * project. | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or | |
9 | * modify it under the terms of the GNU General Public License as | |
10 | * published by the Free Software Foundation; either version 2 of | |
11 | * the License, or (at your option) any later version. | |
12 | * | |
13 | * This program is distributed in the hope that it will be useful, | |
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | * GNU General Public License for more details. | |
17 | * | |
18 | * You should have received a copy of the GNU General Public License | |
19 | * along with this program; if not, write to the Free Software | |
20 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, | |
21 | * MA 02111-1307 USA | |
22 | */ | |
23 | ||
24 | #include <common.h> | |
25 | ||
d87080b7 WD |
26 | DECLARE_GLOBAL_DATA_PTR; |
27 | ||
531716e1 WD |
28 | #ifdef CONFIG_HARD_I2C |
29 | ||
30 | #include <mpc5xxx.h> | |
31 | #include <i2c.h> | |
32 | ||
6d0f6bcf | 33 | #if (CONFIG_SYS_I2C_MODULE == 2) |
531716e1 | 34 | #define I2C_BASE MPC5XXX_I2C2 |
6d0f6bcf | 35 | #elif (CONFIG_SYS_I2C_MODULE == 1) |
531716e1 | 36 | #define I2C_BASE MPC5XXX_I2C1 |
ab209d51 | 37 | #else |
6d0f6bcf | 38 | #error CONFIG_SYS_I2C_MODULE is not properly configured |
531716e1 WD |
39 | #endif |
40 | ||
41 | #define I2C_TIMEOUT 100 | |
42 | #define I2C_RETRIES 3 | |
43 | ||
ab209d51 | 44 | struct mpc5xxx_i2c_tap { |
45 | int scl2tap; | |
46 | int tap2tap; | |
47 | }; | |
48 | ||
531716e1 WD |
49 | static int mpc_reg_in (volatile u32 *reg); |
50 | static void mpc_reg_out (volatile u32 *reg, int val, int mask); | |
51 | static int wait_for_bb (void); | |
52 | static int wait_for_pin (int *status); | |
53 | static int do_address (uchar chip, char rdwr_flag); | |
54 | static int send_bytes (uchar chip, char *buf, int len); | |
55 | static int receive_bytes (uchar chip, char *buf, int len); | |
ab209d51 | 56 | static int mpc_get_fdr (int); |
531716e1 WD |
57 | |
58 | static int mpc_reg_in(volatile u32 *reg) | |
59 | { | |
77ddac94 | 60 | int ret = *reg >> 24; |
531716e1 | 61 | __asm__ __volatile__ ("eieio"); |
77ddac94 | 62 | return ret; |
531716e1 WD |
63 | } |
64 | ||
65 | static void mpc_reg_out(volatile u32 *reg, int val, int mask) | |
66 | { | |
67 | int tmp; | |
68 | ||
69 | if (!mask) { | |
70 | *reg = val << 24; | |
71 | } else { | |
72 | tmp = mpc_reg_in(reg); | |
73 | *reg = ((tmp & ~mask) | (val & mask)) << 24; | |
74 | } | |
75 | __asm__ __volatile__ ("eieio"); | |
76 | ||
77 | return; | |
78 | } | |
79 | ||
80 | static int wait_for_bb(void) | |
81 | { | |
82 | struct mpc5xxx_i2c *regs = (struct mpc5xxx_i2c *)I2C_BASE; | |
83 | int timeout = I2C_TIMEOUT; | |
84 | int status; | |
85 | ||
86 | status = mpc_reg_in(®s->msr); | |
87 | ||
88 | while (timeout-- && (status & I2C_BB)) { | |
89 | #if 1 | |
90 | volatile int temp; | |
91 | mpc_reg_out(®s->mcr, I2C_STA, I2C_STA); | |
92 | temp = mpc_reg_in(®s->mdr); | |
93 | mpc_reg_out(®s->mcr, 0, I2C_STA); | |
94 | mpc_reg_out(®s->mcr, 0, 0); | |
95 | mpc_reg_out(®s->mcr, I2C_EN, 0); | |
96 | #endif | |
97 | udelay(1000); | |
98 | status = mpc_reg_in(®s->msr); | |
99 | } | |
100 | ||
101 | return (status & I2C_BB); | |
102 | } | |
103 | ||
104 | static int wait_for_pin(int *status) | |
105 | { | |
106 | struct mpc5xxx_i2c *regs = (struct mpc5xxx_i2c *)I2C_BASE; | |
107 | int timeout = I2C_TIMEOUT; | |
108 | ||
109 | *status = mpc_reg_in(®s->msr); | |
110 | ||
111 | while (timeout-- && !(*status & I2C_IF)) { | |
112 | udelay(1000); | |
113 | *status = mpc_reg_in(®s->msr); | |
114 | } | |
115 | ||
116 | if (!(*status & I2C_IF)) { | |
117 | return -1; | |
118 | } | |
119 | ||
120 | mpc_reg_out(®s->msr, 0, I2C_IF); | |
121 | ||
122 | return 0; | |
123 | } | |
124 | ||
125 | static int do_address(uchar chip, char rdwr_flag) | |
126 | { | |
127 | struct mpc5xxx_i2c *regs = (struct mpc5xxx_i2c *)I2C_BASE; | |
128 | int status; | |
129 | ||
130 | chip <<= 1; | |
131 | ||
132 | if (rdwr_flag) { | |
133 | chip |= 1; | |
134 | } | |
135 | ||
136 | mpc_reg_out(®s->mcr, I2C_TX, I2C_TX); | |
137 | mpc_reg_out(®s->mdr, chip, 0); | |
138 | ||
42d1f039 WD |
139 | if (wait_for_pin(&status)) { |
140 | return -2; | |
141 | } | |
531716e1 | 142 | |
42d1f039 WD |
143 | if (status & I2C_RXAK) { |
144 | return -3; | |
145 | } | |
531716e1 WD |
146 | |
147 | return 0; | |
148 | } | |
149 | ||
150 | static int send_bytes(uchar chip, char *buf, int len) | |
151 | { | |
152 | struct mpc5xxx_i2c *regs = (struct mpc5xxx_i2c *)I2C_BASE; | |
153 | int wrcount; | |
154 | int status; | |
155 | ||
156 | for (wrcount = 0; wrcount < len; ++wrcount) { | |
157 | ||
158 | mpc_reg_out(®s->mdr, buf[wrcount], 0); | |
159 | ||
160 | if (wait_for_pin(&status)) { | |
161 | break; | |
162 | } | |
163 | ||
164 | if (status & I2C_RXAK) { | |
165 | break; | |
166 | } | |
167 | ||
168 | } | |
169 | ||
170 | return !(wrcount == len); | |
171 | } | |
172 | ||
173 | static int receive_bytes(uchar chip, char *buf, int len) | |
174 | { | |
175 | struct mpc5xxx_i2c *regs = (struct mpc5xxx_i2c *)I2C_BASE; | |
176 | int dummy = 1; | |
177 | int rdcount = 0; | |
178 | int status; | |
179 | int i; | |
180 | ||
181 | mpc_reg_out(®s->mcr, 0, I2C_TX); | |
182 | ||
183 | for (i = 0; i < len; ++i) { | |
184 | buf[rdcount] = mpc_reg_in(®s->mdr); | |
185 | ||
186 | if (dummy) { | |
187 | dummy = 0; | |
188 | } else { | |
189 | rdcount++; | |
190 | } | |
191 | ||
192 | ||
193 | if (wait_for_pin(&status)) { | |
194 | return -4; | |
195 | } | |
196 | } | |
197 | ||
198 | mpc_reg_out(®s->mcr, I2C_TXAK, I2C_TXAK); | |
199 | buf[rdcount++] = mpc_reg_in(®s->mdr); | |
200 | ||
201 | if (wait_for_pin(&status)) { | |
202 | return -5; | |
203 | } | |
204 | ||
205 | mpc_reg_out(®s->mcr, 0, I2C_TXAK); | |
206 | ||
207 | return 0; | |
208 | } | |
209 | ||
210 | /**************** I2C API ****************/ | |
211 | ||
212 | void i2c_init(int speed, int saddr) | |
213 | { | |
214 | struct mpc5xxx_i2c *regs = (struct mpc5xxx_i2c *)I2C_BASE; | |
215 | ||
216 | mpc_reg_out(®s->mcr, 0, 0); | |
217 | mpc_reg_out(®s->madr, saddr << 1, 0); | |
218 | ||
219 | /* Set clock | |
220 | */ | |
ab209d51 | 221 | mpc_reg_out(®s->mfdr, mpc_get_fdr(speed), 0); |
531716e1 WD |
222 | |
223 | /* Enable module | |
224 | */ | |
225 | mpc_reg_out(®s->mcr, I2C_EN, I2C_INIT_MASK); | |
226 | mpc_reg_out(®s->msr, 0, I2C_IF); | |
227 | ||
228 | return; | |
229 | } | |
230 | ||
ab209d51 | 231 | static int mpc_get_fdr(int speed) |
232 | { | |
ab209d51 | 233 | static int fdr = -1; |
ab209d51 | 234 | |
235 | if (fdr == -1) { | |
5cf9da48 WD |
236 | ulong best_speed = 0; |
237 | ulong divider; | |
ab209d51 | 238 | ulong ipb, scl; |
239 | ulong bestmatch = 0xffffffffUL; | |
240 | int best_i = 0, best_j = 0, i, j; | |
241 | int SCL_Tap[] = { 9, 10, 12, 15, 5, 6, 7, 8}; | |
242 | struct mpc5xxx_i2c_tap scltap[] = { | |
243 | {4, 1}, | |
244 | {4, 2}, | |
245 | {6, 4}, | |
246 | {6, 8}, | |
247 | {14, 16}, | |
248 | {30, 32}, | |
249 | {62, 64}, | |
250 | {126, 128} | |
251 | }; | |
252 | ||
253 | ipb = gd->ipb_clk; | |
254 | for (i = 7; i >= 0; i--) { | |
255 | for (j = 7; j >= 0; j--) { | |
42d1f039 | 256 | scl = 2 * (scltap[j].scl2tap + |
ab209d51 | 257 | (SCL_Tap[i] - 1) * scltap[j].tap2tap + 2); |
258 | if (ipb <= speed*scl) { | |
259 | if ((speed*scl - ipb) < bestmatch) { | |
260 | bestmatch = speed*scl - ipb; | |
261 | best_i = i; | |
262 | best_j = j; | |
263 | best_speed = ipb/scl; | |
264 | } | |
265 | } | |
266 | } | |
267 | } | |
5cf9da48 WD |
268 | divider = (best_i & 3) | ((best_i & 4) << 3) | (best_j << 2); |
269 | if (gd->flags & GD_FLG_RELOC) { | |
270 | fdr = divider; | |
271 | } else { | |
272 | printf("%ld kHz, ", best_speed / 1000); | |
273 | return divider; | |
274 | } | |
ab209d51 | 275 | } |
276 | ||
277 | return fdr; | |
278 | } | |
279 | ||
531716e1 WD |
280 | int i2c_probe(uchar chip) |
281 | { | |
282 | struct mpc5xxx_i2c *regs = (struct mpc5xxx_i2c *)I2C_BASE; | |
283 | int i; | |
284 | ||
285 | for (i = 0; i < I2C_RETRIES; i++) { | |
286 | mpc_reg_out(®s->mcr, I2C_STA, I2C_STA); | |
287 | ||
288 | if (! do_address(chip, 0)) { | |
289 | mpc_reg_out(®s->mcr, 0, I2C_STA); | |
697037fe | 290 | udelay(500); |
531716e1 WD |
291 | break; |
292 | } | |
293 | ||
294 | mpc_reg_out(®s->mcr, 0, I2C_STA); | |
295 | udelay(500); | |
296 | } | |
297 | ||
298 | return (i == I2C_RETRIES); | |
299 | } | |
300 | ||
301 | int i2c_read(uchar chip, uint addr, int alen, uchar *buf, int len) | |
302 | { | |
77ddac94 | 303 | char xaddr[4]; |
531716e1 WD |
304 | struct mpc5xxx_i2c * regs = (struct mpc5xxx_i2c *)I2C_BASE; |
305 | int ret = -1; | |
306 | ||
307 | xaddr[0] = (addr >> 24) & 0xFF; | |
308 | xaddr[1] = (addr >> 16) & 0xFF; | |
309 | xaddr[2] = (addr >> 8) & 0xFF; | |
310 | xaddr[3] = addr & 0xFF; | |
311 | ||
312 | if (wait_for_bb()) { | |
313 | printf("i2c_read: bus is busy\n"); | |
314 | goto Done; | |
315 | } | |
316 | ||
317 | mpc_reg_out(®s->mcr, I2C_STA, I2C_STA); | |
318 | if (do_address(chip, 0)) { | |
319 | printf("i2c_read: failed to address chip\n"); | |
320 | goto Done; | |
321 | } | |
322 | ||
323 | if (send_bytes(chip, &xaddr[4-alen], alen)) { | |
324 | printf("i2c_read: send_bytes failed\n"); | |
325 | goto Done; | |
326 | } | |
327 | ||
328 | mpc_reg_out(®s->mcr, I2C_RSTA, I2C_RSTA); | |
329 | if (do_address(chip, 1)) { | |
330 | printf("i2c_read: failed to address chip\n"); | |
331 | goto Done; | |
332 | } | |
333 | ||
77ddac94 | 334 | if (receive_bytes(chip, (char *)buf, len)) { |
531716e1 WD |
335 | printf("i2c_read: receive_bytes failed\n"); |
336 | goto Done; | |
337 | } | |
338 | ||
339 | ret = 0; | |
340 | Done: | |
341 | mpc_reg_out(®s->mcr, 0, I2C_STA); | |
342 | return ret; | |
343 | } | |
344 | ||
345 | int i2c_write(uchar chip, uint addr, int alen, uchar *buf, int len) | |
346 | { | |
77ddac94 | 347 | char xaddr[4]; |
531716e1 WD |
348 | struct mpc5xxx_i2c *regs = (struct mpc5xxx_i2c *)I2C_BASE; |
349 | int ret = -1; | |
350 | ||
351 | xaddr[0] = (addr >> 24) & 0xFF; | |
352 | xaddr[1] = (addr >> 16) & 0xFF; | |
353 | xaddr[2] = (addr >> 8) & 0xFF; | |
354 | xaddr[3] = addr & 0xFF; | |
355 | ||
42d1f039 | 356 | if (wait_for_bb()) { |
531716e1 WD |
357 | printf("i2c_write: bus is busy\n"); |
358 | goto Done; | |
359 | } | |
360 | ||
42d1f039 WD |
361 | mpc_reg_out(®s->mcr, I2C_STA, I2C_STA); |
362 | if (do_address(chip, 0)) { | |
531716e1 WD |
363 | printf("i2c_write: failed to address chip\n"); |
364 | goto Done; | |
365 | } | |
366 | ||
367 | if (send_bytes(chip, &xaddr[4-alen], alen)) { | |
368 | printf("i2c_write: send_bytes failed\n"); | |
369 | goto Done; | |
370 | } | |
371 | ||
77ddac94 | 372 | if (send_bytes(chip, (char *)buf, len)) { |
531716e1 WD |
373 | printf("i2c_write: send_bytes failed\n"); |
374 | goto Done; | |
375 | } | |
376 | ||
377 | ret = 0; | |
378 | Done: | |
379 | mpc_reg_out(®s->mcr, 0, I2C_STA); | |
380 | return ret; | |
381 | } | |
382 | ||
383 | uchar i2c_reg_read(uchar chip, uchar reg) | |
384 | { | |
77ddac94 | 385 | uchar buf; |
531716e1 WD |
386 | |
387 | i2c_read(chip, reg, 1, &buf, 1); | |
388 | ||
389 | return buf; | |
390 | } | |
391 | ||
392 | void i2c_reg_write(uchar chip, uchar reg, uchar val) | |
393 | { | |
394 | i2c_write(chip, reg, 1, &val, 1); | |
395 | ||
396 | return; | |
397 | } | |
398 | ||
399 | #endif /* CONFIG_HARD_I2C */ |