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42d1f039 WD |
1 | /* |
2 | * (C) Copyright 2000-2002 | |
3 | * Wolfgang Denk, DENX Software Engineering, wd@denx.de. | |
4 | * | |
5 | * (C) Copyright 2002 (440 port) | |
6 | * Scott McNutt, Artesyn Communication Producs, smcnutt@artsyncp.com | |
7 | * | |
8 | * (C) Copyright 2003 Motorola Inc. (MPC85xx port) | |
9 | * Xianghua Xiao (X.Xiao@motorola.com) | |
10 | * | |
11 | * See file CREDITS for list of people who contributed to this | |
12 | * project. | |
13 | * | |
14 | * This program is free software; you can redistribute it and/or | |
15 | * modify it under the terms of the GNU General Public License as | |
16 | * published by the Free Software Foundation; either version 2 of | |
17 | * the License, or (at your option) any later version. | |
18 | * | |
19 | * This program is distributed in the hope that it will be useful, | |
20 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
21 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
22 | * GNU General Public License for more details. | |
23 | * | |
24 | * You should have received a copy of the GNU General Public License | |
25 | * along with this program; if not, write to the Free Software | |
26 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, | |
27 | * MA 02111-1307 USA | |
28 | */ | |
29 | ||
30 | #include <common.h> | |
31 | #include <watchdog.h> | |
32 | #include <command.h> | |
33 | #include <asm/processor.h> | |
42d1f039 | 34 | |
9cff4448 | 35 | int interrupt_init_cpu(unsigned long *decrementer_count) |
42d1f039 | 36 | { |
6d0f6bcf | 37 | volatile ccsr_pic_t *pic = (void *)(CONFIG_SYS_MPC85xx_PIC_ADDR); |
343117bf | 38 | |
04db4008 | 39 | pic->gcr = MPC85xx_PICGCR_RST; |
9cff4448 KG |
40 | while (pic->gcr & MPC85xx_PICGCR_RST) |
41 | ; | |
04db4008 | 42 | pic->gcr = MPC85xx_PICGCR_M; |
9cff4448 | 43 | |
6d0f6bcf | 44 | *decrementer_count = get_tbclk() / CONFIG_SYS_HZ; |
9cff4448 KG |
45 | |
46 | /* PIE is same as DIE, dec interrupt enable */ | |
343117bf | 47 | mtspr(SPRN_TCR, TCR_PIE); |
61a21e98 AF |
48 | |
49 | #ifdef CONFIG_INTERRUPTS | |
534ea6b6 | 50 | pic->iivpr1 = 0x810001; /* 50220 enable ecm interrupts */ |
52514699 | 51 | debug("iivpr1@%x = %x\n", (uint)&pic->iivpr1, pic->iivpr1); |
61a21e98 AF |
52 | |
53 | pic->iivpr2 = 0x810002; /* 50240 enable ddr interrupts */ | |
52514699 | 54 | debug("iivpr2@%x = %x\n", (uint)&pic->iivpr2, pic->iivpr2); |
61a21e98 AF |
55 | |
56 | pic->iivpr3 = 0x810003; /* 50260 enable lbc interrupts */ | |
52514699 | 57 | debug("iivpr3@%x = %x\n", (uint)&pic->iivpr3, pic->iivpr3); |
61a21e98 AF |
58 | |
59 | #ifdef CONFIG_PCI1 | |
60 | pic->iivpr8 = 0x810008; /* enable pci1 interrupts */ | |
52514699 | 61 | debug("iivpr8@%x = %x\n", (uint)&pic->iivpr8, pic->iivpr8); |
61a21e98 AF |
62 | #endif |
63 | #if defined(CONFIG_PCI2) || defined(CONFIG_PCIE2) | |
64 | pic->iivpr9 = 0x810009; /* enable pci1 interrupts */ | |
52514699 | 65 | debug("iivpr9@%x = %x\n", (uint)&pic->iivpr9, pic->iivpr9); |
61a21e98 AF |
66 | #endif |
67 | #ifdef CONFIG_PCIE1 | |
68 | pic->iivpr10 = 0x81000a; /* enable pcie1 interrupts */ | |
52514699 | 69 | debug("iivpr10@%x = %x\n", (uint)&pic->iivpr10, pic->iivpr10); |
61a21e98 AF |
70 | #endif |
71 | #ifdef CONFIG_PCIE3 | |
72 | pic->iivpr11 = 0x81000b; /* enable pcie3 interrupts */ | |
52514699 | 73 | debug("iivpr11@%x = %x\n", (uint)&pic->iivpr11, pic->iivpr11); |
61a21e98 AF |
74 | #endif |
75 | ||
76 | pic->ctpr=0; /* 40080 clear current task priority register */ | |
77 | #endif | |
78 | ||
42d1f039 WD |
79 | return (0); |
80 | } | |
81 | ||
9cff4448 | 82 | /* Install and free a interrupt handler. Not implemented yet. */ |
42d1f039 WD |
83 | |
84 | void | |
85 | irq_install_handler(int vec, interrupt_handler_t *handler, void *arg) | |
86 | { | |
87 | return; | |
88 | } | |
89 | ||
90 | void | |
91 | irq_free_handler(int vec) | |
92 | { | |
93 | return; | |
94 | } | |
95 | ||
9cff4448 | 96 | void timer_interrupt_cpu(struct pt_regs *regs) |
42d1f039 | 97 | { |
9cff4448 | 98 | /* PIS is same as DIS, dec interrupt status */ |
343117bf | 99 | mtspr(SPRN_TSR, TSR_PIS); |
42d1f039 WD |
100 | } |
101 | ||
4431283c | 102 | #if defined(CONFIG_CMD_IRQ) |
9cff4448 KG |
103 | /* irqinfo - print information about PCI devices,not implemented. */ |
104 | int do_irqinfo(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) | |
42d1f039 | 105 | { |
42d1f039 WD |
106 | return 0; |
107 | } | |
4431283c | 108 | #endif |