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42d1f039 WD |
1 | /* |
2 | * linux/arch/ppc/kernel/traps.c | |
3 | * | |
61a21e98 | 4 | * Copyright 2007 Freescale Semiconductor. |
42d1f039 WD |
5 | * Copyright (C) 2003 Motorola |
6 | * Modified by Xianghua Xiao(x.xiao@motorola.com) | |
7 | * | |
8 | * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) | |
9 | * | |
10 | * Modified by Cort Dougan (cort@cs.nmt.edu) | |
11 | * and Paul Mackerras (paulus@cs.anu.edu.au) | |
12 | * | |
13 | * (C) Copyright 2000 | |
14 | * Wolfgang Denk, DENX Software Engineering, wd@denx.de. | |
15 | * | |
16 | * See file CREDITS for list of people who contributed to this | |
17 | * project. | |
18 | * | |
19 | * This program is free software; you can redistribute it and/or | |
20 | * modify it under the terms of the GNU General Public License as | |
21 | * published by the Free Software Foundation; either version 2 of | |
22 | * the License, or (at your option) any later version. | |
23 | * | |
24 | * This program is distributed in the hope that it will be useful, | |
25 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
9aea9530 | 26 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
42d1f039 WD |
27 | * GNU General Public License for more details. |
28 | * | |
29 | * You should have received a copy of the GNU General Public License | |
30 | * along with this program; if not, write to the Free Software | |
31 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, | |
32 | * MA 02111-1307 USA | |
33 | */ | |
34 | ||
35 | /* | |
36 | * This file handles the architecture-dependent parts of hardware exceptions | |
37 | */ | |
38 | ||
39 | #include <common.h> | |
40 | #include <command.h> | |
41 | #include <asm/processor.h> | |
42 | ||
d87080b7 WD |
43 | DECLARE_GLOBAL_DATA_PTR; |
44 | ||
4431283c | 45 | #if defined(CONFIG_CMD_KGDB) |
42d1f039 WD |
46 | int (*debugger_exception_handler)(struct pt_regs *) = 0; |
47 | #endif | |
48 | ||
49 | /* Returns 0 if exception not found and fixup otherwise. */ | |
50 | extern unsigned long search_exception_table(unsigned long); | |
51 | ||
9aea9530 | 52 | /* |
3b9519fc BB |
53 | * End of addressable memory. This may be less than the actual |
54 | * amount of memory on the system if we're unable to keep all | |
55 | * the memory mapped in. | |
42d1f039 | 56 | */ |
3b9519fc BB |
57 | extern ulong get_effective_memsize(void); |
58 | #define END_OF_MEM (gd->bd->bi_memstart + get_effective_memsize()) | |
42d1f039 WD |
59 | |
60 | static __inline__ void set_tsr(unsigned long val) | |
61 | { | |
62 | asm volatile("mtspr 0x150, %0" : : "r" (val)); | |
63 | } | |
64 | ||
65 | static __inline__ unsigned long get_esr(void) | |
66 | { | |
67 | unsigned long val; | |
68 | asm volatile("mfspr %0, 0x03e" : "=r" (val) :); | |
69 | return val; | |
70 | } | |
71 | ||
72 | #define ESR_MCI 0x80000000 | |
73 | #define ESR_PIL 0x08000000 | |
74 | #define ESR_PPR 0x04000000 | |
75 | #define ESR_PTR 0x02000000 | |
76 | #define ESR_DST 0x00800000 | |
77 | #define ESR_DIZ 0x00400000 | |
78 | #define ESR_U0F 0x00008000 | |
79 | ||
4431283c | 80 | #if defined(CONFIG_CMD_BEDBUG) |
42d1f039 WD |
81 | extern void do_bedbug_breakpoint(struct pt_regs *); |
82 | #endif | |
83 | ||
84 | /* | |
85 | * Trap & Exception support | |
86 | */ | |
87 | ||
88 | void | |
89 | print_backtrace(unsigned long *sp) | |
90 | { | |
91 | int cnt = 0; | |
92 | unsigned long i; | |
93 | ||
94 | printf("Call backtrace: "); | |
95 | while (sp) { | |
96 | if ((uint)sp > END_OF_MEM) | |
97 | break; | |
98 | ||
99 | i = sp[1]; | |
100 | if (cnt++ % 7 == 0) | |
101 | printf("\n"); | |
102 | printf("%08lX ", i); | |
103 | if (cnt > 32) break; | |
104 | sp = (unsigned long *)*sp; | |
105 | } | |
106 | printf("\n"); | |
107 | } | |
108 | ||
109 | void show_regs(struct pt_regs * regs) | |
110 | { | |
111 | int i; | |
112 | ||
113 | printf("NIP: %08lX XER: %08lX LR: %08lX REGS: %p TRAP: %04lx DAR: %08lX\n", | |
114 | regs->nip, regs->xer, regs->link, regs, regs->trap, regs->dar); | |
115 | printf("MSR: %08lx EE: %01x PR: %01x FP: %01x ME: %01x IR/DR: %01x%01x\n", | |
116 | regs->msr, regs->msr&MSR_EE ? 1 : 0, regs->msr&MSR_PR ? 1 : 0, | |
117 | regs->msr & MSR_FP ? 1 : 0,regs->msr&MSR_ME ? 1 : 0, | |
118 | regs->msr&MSR_IR ? 1 : 0, | |
119 | regs->msr&MSR_DR ? 1 : 0); | |
120 | ||
121 | printf("\n"); | |
122 | for (i = 0; i < 32; i++) { | |
123 | if ((i % 8) == 0) | |
124 | { | |
125 | printf("GPR%02d: ", i); | |
126 | } | |
127 | ||
128 | printf("%08lX ", regs->gpr[i]); | |
129 | if ((i % 8) == 7) | |
130 | { | |
131 | printf("\n"); | |
132 | } | |
133 | } | |
134 | } | |
135 | ||
136 | ||
137 | void | |
138 | _exception(int signr, struct pt_regs *regs) | |
139 | { | |
140 | show_regs(regs); | |
141 | print_backtrace((unsigned long *)regs->gpr[1]); | |
142 | panic("Exception in kernel pc %lx signal %d",regs->nip,signr); | |
143 | } | |
144 | ||
145 | void | |
146 | CritcalInputException(struct pt_regs *regs) | |
147 | { | |
148 | panic("Critical Input Exception"); | |
149 | } | |
150 | ||
61a21e98 AF |
151 | int machinecheck_count = 0; |
152 | int machinecheck_error = 0; | |
42d1f039 WD |
153 | void |
154 | MachineCheckException(struct pt_regs *regs) | |
155 | { | |
156 | unsigned long fixup; | |
61a21e98 | 157 | unsigned int mcsr, mcsrr0, mcsrr1, mcar; |
42d1f039 WD |
158 | |
159 | /* Probing PCI using config cycles cause this exception | |
160 | * when a device is not present. Catch it and return to | |
161 | * the PCI exception handler. | |
162 | */ | |
163 | if ((fixup = search_exception_table(regs->nip)) != 0) { | |
164 | regs->nip = fixup; | |
165 | return; | |
166 | } | |
167 | ||
61a21e98 AF |
168 | mcsrr0 = mfspr(SPRN_MCSRR0); |
169 | mcsrr1 = mfspr(SPRN_MCSRR1); | |
170 | mcsr = mfspr(SPRN_MCSR); | |
171 | mcar = mfspr(SPRN_MCAR); | |
172 | ||
173 | machinecheck_count++; | |
174 | machinecheck_error=1; | |
175 | ||
4431283c | 176 | #if defined(CONFIG_CMD_KGDB) |
42d1f039 WD |
177 | if (debugger_exception_handler && (*debugger_exception_handler)(regs)) |
178 | return; | |
179 | #endif | |
180 | ||
181 | printf("Machine check in kernel mode.\n"); | |
61a21e98 AF |
182 | printf("Caused by (from mcsr): "); |
183 | printf("mcsr = 0x%08x\n", mcsr); | |
184 | if (mcsr & 0x80000000) | |
185 | printf("Machine check input pin\n"); | |
186 | if (mcsr & 0x40000000) | |
187 | printf("Instruction cache parity error\n"); | |
188 | if (mcsr & 0x20000000) | |
189 | printf("Data cache push parity error\n"); | |
190 | if (mcsr & 0x10000000) | |
191 | printf("Data cache parity error\n"); | |
192 | if (mcsr & 0x00000080) | |
193 | printf("Bus instruction address error\n"); | |
194 | if (mcsr & 0x00000040) | |
195 | printf("Bus Read address error\n"); | |
196 | if (mcsr & 0x00000020) | |
197 | printf("Bus Write address error\n"); | |
198 | if (mcsr & 0x00000010) | |
199 | printf("Bus Instruction data bus error\n"); | |
200 | if (mcsr & 0x00000008) | |
201 | printf("Bus Read data bus error\n"); | |
202 | if (mcsr & 0x00000004) | |
203 | printf("Bus Write bus error\n"); | |
204 | if (mcsr & 0x00000002) | |
205 | printf("Bus Instruction parity error\n"); | |
206 | if (mcsr & 0x00000001) | |
207 | printf("Bus Read parity error\n"); | |
208 | ||
42d1f039 | 209 | show_regs(regs); |
61a21e98 AF |
210 | printf("MCSR=0x%08x \tMCSRR0=0x%08x \nMCSRR1=0x%08x \tMCAR=0x%08x\n", |
211 | mcsr, mcsrr0, mcsrr1, mcar); | |
42d1f039 | 212 | print_backtrace((unsigned long *)regs->gpr[1]); |
61a21e98 AF |
213 | if (machinecheck_count > 10) { |
214 | panic("machine check count too high\n"); | |
215 | } | |
216 | ||
217 | if (machinecheck_count > 1) { | |
218 | regs->nip += 4; /* skip offending instruction */ | |
dc4b0b38 | 219 | printf("Skipping current instr, Returning to 0x%08lx\n", |
61a21e98 AF |
220 | regs->nip); |
221 | } else { | |
dc4b0b38 | 222 | printf("Returning back to 0x%08lx\n",regs->nip); |
61a21e98 | 223 | } |
42d1f039 WD |
224 | } |
225 | ||
226 | void | |
227 | AlignmentException(struct pt_regs *regs) | |
228 | { | |
4431283c | 229 | #if defined(CONFIG_CMD_KGDB) |
42d1f039 WD |
230 | if (debugger_exception_handler && (*debugger_exception_handler)(regs)) |
231 | return; | |
232 | #endif | |
233 | ||
234 | show_regs(regs); | |
235 | print_backtrace((unsigned long *)regs->gpr[1]); | |
236 | panic("Alignment Exception"); | |
237 | } | |
238 | ||
239 | void | |
240 | ProgramCheckException(struct pt_regs *regs) | |
241 | { | |
242 | long esr_val; | |
243 | ||
4431283c | 244 | #if defined(CONFIG_CMD_KGDB) |
42d1f039 WD |
245 | if (debugger_exception_handler && (*debugger_exception_handler)(regs)) |
246 | return; | |
247 | #endif | |
248 | ||
249 | show_regs(regs); | |
250 | ||
251 | esr_val = get_esr(); | |
252 | if( esr_val & ESR_PIL ) | |
253 | printf( "** Illegal Instruction **\n" ); | |
254 | else if( esr_val & ESR_PPR ) | |
255 | printf( "** Privileged Instruction **\n" ); | |
256 | else if( esr_val & ESR_PTR ) | |
257 | printf( "** Trap Instruction **\n" ); | |
258 | ||
259 | print_backtrace((unsigned long *)regs->gpr[1]); | |
260 | panic("Program Check Exception"); | |
261 | } | |
262 | ||
263 | void | |
264 | PITException(struct pt_regs *regs) | |
265 | { | |
266 | /* | |
267 | * Reset PIT interrupt | |
268 | */ | |
269 | set_tsr(0x0c000000); | |
270 | ||
271 | /* | |
272 | * Call timer_interrupt routine in interrupts.c | |
273 | */ | |
274 | timer_interrupt(NULL); | |
275 | } | |
276 | ||
277 | ||
278 | void | |
279 | UnknownException(struct pt_regs *regs) | |
280 | { | |
4431283c | 281 | #if defined(CONFIG_CMD_KGDB) |
42d1f039 WD |
282 | if (debugger_exception_handler && (*debugger_exception_handler)(regs)) |
283 | return; | |
284 | #endif | |
285 | ||
286 | printf("Bad trap at PC: %lx, SR: %lx, vector=%lx\n", | |
287 | regs->nip, regs->msr, regs->trap); | |
288 | _exception(0, regs); | |
289 | } | |
61a21e98 AF |
290 | void |
291 | ExtIntException(struct pt_regs *regs) | |
292 | { | |
6d0f6bcf | 293 | volatile ccsr_pic_t *pic = (void *)(CONFIG_SYS_MPC85xx_PIC_ADDR); |
04db4008 | 294 | |
61a21e98 AF |
295 | uint vect; |
296 | ||
297 | #if defined(CONFIG_CMD_KGDB) | |
298 | if (debugger_exception_handler && (*debugger_exception_handler)(regs)) | |
299 | return; | |
300 | #endif | |
301 | ||
302 | printf("External Interrupt Exception at PC: %lx, SR: %lx, vector=%lx", | |
303 | regs->nip, regs->msr, regs->trap); | |
304 | vect = pic->iack0; | |
dc4b0b38 | 305 | printf(" irq IACK0@%05x=%d\n",(int)&pic->iack0,vect); |
61a21e98 AF |
306 | show_regs(regs); |
307 | print_backtrace((unsigned long *)regs->gpr[1]); | |
308 | machinecheck_count++; | |
309 | #ifdef EXTINT_NOSKIP | |
310 | printf("Returning back to 0x%08x\n",regs->nip); | |
311 | #else | |
312 | regs->nip += 4; /* skip offending instruction */ | |
dc4b0b38 | 313 | printf("Skipping current instr, Returning to 0x%08lx\n",regs->nip); |
61a21e98 AF |
314 | #endif |
315 | ||
316 | } | |
42d1f039 WD |
317 | |
318 | void | |
319 | DebugException(struct pt_regs *regs) | |
320 | { | |
321 | printf("Debugger trap at @ %lx\n", regs->nip ); | |
322 | show_regs(regs); | |
4431283c | 323 | #if defined(CONFIG_CMD_BEDBUG) |
42d1f039 WD |
324 | do_bedbug_breakpoint( regs ); |
325 | #endif | |
326 | } | |
327 | ||
9aea9530 | 328 | /* Probe an address by reading. If not present, return -1, otherwise |
42d1f039 WD |
329 | * return 0. |
330 | */ | |
331 | int | |
332 | addr_probe(uint *addr) | |
333 | { | |
334 | return 0; | |
335 | } |