[people/ms/u-boot.git] / cpu / pxa / i2c.c

/*
 * (C) Copyright 2000
 * Paolo Scaffardi, AIRVENT SAM s.p.a - RIMINI(ITALY), arsenio@tin.it
 *
 * (C) Copyright 2000 Sysgo Real-Time Solutions, GmbH <www.elinos.com>
 * Marius Groeger <mgroeger@sysgo.de>
 *
 * (C) Copyright 2003 Pengutronix e.K.
 * Robert Schwebel <r.schwebel@pengutronix.de>
 *
 * See file CREDITS for list of people who contributed to this
 * project.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation; either version 2 of
 * the License, or (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
 * MA 02111-1307 USA
 *
 * Back ported to the 8xx platform (from the 8260 platform) by
 * Murray.Jensen@cmst.csiro.au, 27-Jan-01.
 */

/* FIXME: this file is PXA255 specific! What about other XScales? */

#include <common.h>

#ifdef CONFIG_HARD_I2C

/*
 *	- CONFIG_SYS_I2C_SPEED
 *	- I2C_PXA_SLAVE_ADDR
 */

#include <asm/arch/hardware.h>
#include <asm/arch/pxa-regs.h>
#include <i2c.h>

/*#define	DEBUG_I2C	1	/###* activate local debugging output  */
#define I2C_PXA_SLAVE_ADDR	0x1	/* slave pxa unit address           */

#if (CONFIG_SYS_I2C_SPEED == 400000)
#define I2C_ICR_INIT	(ICR_FM | ICR_BEIE | ICR_IRFIE | ICR_ITEIE | ICR_GCD | ICR_SCLE)
#else
#define I2C_ICR_INIT	(ICR_BEIE | ICR_IRFIE | ICR_ITEIE | ICR_GCD | ICR_SCLE)
#endif

#define I2C_ISR_INIT		0x7FF

#ifdef DEBUG_I2C
#define PRINTD(x) printf x
#else
#define PRINTD(x)
#endif


/* Shall the current transfer have a start/stop condition? */
#define I2C_COND_NORMAL		0
#define I2C_COND_START		1
#define I2C_COND_STOP		2

/* Shall the current transfer be ack/nacked or being waited for it? */
#define I2C_ACKNAK_WAITACK	1
#define I2C_ACKNAK_SENDACK	2
#define I2C_ACKNAK_SENDNAK	4

/* Specify who shall transfer the data (master or slave) */
#define I2C_READ		0
#define I2C_WRITE		1

/* All transfers are described by this data structure */
struct i2c_msg {
	u8 condition;
	u8 acknack;
	u8 direction;
	u8 data;
};


/**
 * i2c_pxa_reset: - reset the host controller
 *
 */

static void i2c_reset( void )
{
	ICR &= ~ICR_IUE;		/* disable unit */
	ICR |= ICR_UR;			/* reset the unit */
	udelay(100);
	ICR &= ~ICR_IUE;		/* disable unit */
#ifdef CONFIG_CPU_MONAHANS
	CKENB |= (CKENB_4_I2C); /*  | CKENB_1_PWM1 | CKENB_0_PWM0); */
#else /* CONFIG_CPU_MONAHANS */
	CKEN |= CKEN14_I2C;		/* set the global I2C clock on */
#endif
	ISAR = I2C_PXA_SLAVE_ADDR;	/* set our slave address */
	ICR = I2C_ICR_INIT;		/* set control register values */
	ISR = I2C_ISR_INIT;		/* set clear interrupt bits */
	ICR |= ICR_IUE;			/* enable unit */
	udelay(100);
}


/**
 * i2c_isr_set_cleared: - wait until certain bits of the I2C status register
 *	                  are set and cleared
 *
 * @return: 1 in case of success, 0 means timeout (no match within 10 ms).
 */
static int i2c_isr_set_cleared( unsigned long set_mask, unsigned long cleared_mask )
{
	int timeout = 10000;

	while( ((ISR & set_mask)!=set_mask) || ((ISR & cleared_mask)!=0) ){
		udelay( 10 );
		if( timeout-- < 0 ) return 0;
	}

	return 1;
}


/**
 * i2c_transfer: - Transfer one byte over the i2c bus
 *
 * This function can tranfer a byte over the i2c bus in both directions.
 * It is used by the public API functions.
 *
 * @return:  0: transfer successful
 *          -1: message is empty
 *          -2: transmit timeout
 *          -3: ACK missing
 *          -4: receive timeout
 *          -5: illegal parameters
 *          -6: bus is busy and couldn't be aquired
 */
int i2c_transfer(struct i2c_msg *msg)
{
	int ret;

	if (!msg)
		goto transfer_error_msg_empty;

	switch(msg->direction) {

	case I2C_WRITE:

		/* check if bus is not busy */
		if (!i2c_isr_set_cleared(0,ISR_IBB))
			goto transfer_error_bus_busy;

		/* start transmission */
		ICR &= ~ICR_START;
		ICR &= ~ICR_STOP;
		IDBR = msg->data;
		if (msg->condition == I2C_COND_START)     ICR |=  ICR_START;
		if (msg->condition == I2C_COND_STOP)      ICR |=  ICR_STOP;
		if (msg->acknack   == I2C_ACKNAK_SENDNAK) ICR |=  ICR_ACKNAK;
		if (msg->acknack   == I2C_ACKNAK_SENDACK) ICR &= ~ICR_ACKNAK;
		ICR &= ~ICR_ALDIE;
		ICR |= ICR_TB;

		/* transmit register empty? */
		if (!i2c_isr_set_cleared(ISR_ITE,0))
			goto transfer_error_transmit_timeout;

		/* clear 'transmit empty' state */
		ISR |= ISR_ITE;

		/* wait for ACK from slave */
		if (msg->acknack == I2C_ACKNAK_WAITACK)
			if (!i2c_isr_set_cleared(0,ISR_ACKNAK))
				goto transfer_error_ack_missing;
		break;

	case I2C_READ:

		/* check if bus is not busy */
		if (!i2c_isr_set_cleared(0,ISR_IBB))
			goto transfer_error_bus_busy;

		/* start receive */
		ICR &= ~ICR_START;
		ICR &= ~ICR_STOP;
		if (msg->condition == I2C_COND_START)	  ICR |= ICR_START;
		if (msg->condition == I2C_COND_STOP)	  ICR |= ICR_STOP;
		if (msg->acknack   == I2C_ACKNAK_SENDNAK) ICR |=  ICR_ACKNAK;
		if (msg->acknack   == I2C_ACKNAK_SENDACK) ICR &= ~ICR_ACKNAK;
		ICR &= ~ICR_ALDIE;
		ICR |= ICR_TB;

		/* receive register full? */
		if (!i2c_isr_set_cleared(ISR_IRF,0))
			goto transfer_error_receive_timeout;

		msg->data = IDBR;

		/* clear 'receive empty' state */
		ISR |= ISR_IRF;

		break;

	default:

		goto transfer_error_illegal_param;

	}

	return 0;

transfer_error_msg_empty:
		PRINTD(("i2c_transfer: error: 'msg' is empty\n"));
		ret = -1; goto i2c_transfer_finish;

transfer_error_transmit_timeout:
		PRINTD(("i2c_transfer: error: transmit timeout\n"));
		ret = -2; goto i2c_transfer_finish;

transfer_error_ack_missing:
		PRINTD(("i2c_transfer: error: ACK missing\n"));
		ret = -3; goto i2c_transfer_finish;

transfer_error_receive_timeout:
		PRINTD(("i2c_transfer: error: receive timeout\n"));
		ret = -4; goto i2c_transfer_finish;

transfer_error_illegal_param:
		PRINTD(("i2c_transfer: error: illegal parameters\n"));
		ret = -5; goto i2c_transfer_finish;

transfer_error_bus_busy:
		PRINTD(("i2c_transfer: error: bus is busy\n"));
		ret = -6; goto i2c_transfer_finish;

i2c_transfer_finish:
		PRINTD(("i2c_transfer: ISR: 0x%04x\n",ISR));
		i2c_reset();
		return ret;

}

/* ------------------------------------------------------------------------ */
/* API Functions                                                            */
/* ------------------------------------------------------------------------ */

void i2c_init(int speed, int slaveaddr)
{
#ifdef CONFIG_SYS_I2C_INIT_BOARD
	/* call board specific i2c bus reset routine before accessing the   */
	/* environment, which might be in a chip on that bus. For details   */
	/* about this problem see doc/I2C_Edge_Conditions.                  */
	i2c_init_board();
#endif
}


/**
 * i2c_probe: - Test if a chip answers for a given i2c address
 *
 * @chip:	address of the chip which is searched for
 * @return:	0 if a chip was found, -1 otherwhise
 */

int i2c_probe(uchar chip)
{
	struct i2c_msg msg;

	i2c_reset();

	msg.condition = I2C_COND_START;
	msg.acknack   = I2C_ACKNAK_WAITACK;
	msg.direction = I2C_WRITE;
	msg.data      = (chip << 1) + 1;
	if (i2c_transfer(&msg)) return -1;

	msg.condition = I2C_COND_STOP;
	msg.acknack   = I2C_ACKNAK_SENDNAK;
	msg.direction = I2C_READ;
	msg.data      = 0x00;
	if (i2c_transfer(&msg)) return -1;

	return 0;
}


/**
 * i2c_read: - Read multiple bytes from an i2c device
 *
 * The higher level routines take into account that this function is only
 * called with len < page length of the device (see configuration file)
 *
 * @chip:	address of the chip which is to be read
 * @addr:	i2c data address within the chip
 * @alen:	length of the i2c data address (1..2 bytes)
 * @buffer:	where to write the data
 * @len:	how much byte do we want to read
 * @return:	0 in case of success
 */

int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len)
{
	struct i2c_msg msg;
	u8 addr_bytes[3]; /* lowest...highest byte of data address */
	int ret;

	PRINTD(("i2c_read(chip=0x%02x, addr=0x%02x, alen=0x%02x, len=0x%02x)\n",chip,addr,alen,len));

	i2c_reset();

	/* dummy chip address write */
	PRINTD(("i2c_read: dummy chip address write\n"));
	msg.condition = I2C_COND_START;
	msg.acknack   = I2C_ACKNAK_WAITACK;
	msg.direction = I2C_WRITE;
	msg.data      = (chip << 1);
	msg.data     &= 0xFE;
	if ((ret=i2c_transfer(&msg))) return -1;

	/*
	 * send memory address bytes;
	 * alen defines how much bytes we have to send.
	 */
	/*addr &= ((1 << CONFIG_SYS_EEPROM_PAGE_WRITE_BITS)-1); */
	addr_bytes[0] = (u8)((addr >>  0) & 0x000000FF);
	addr_bytes[1] = (u8)((addr >>  8) & 0x000000FF);
	addr_bytes[2] = (u8)((addr >> 16) & 0x000000FF);

	while (--alen >= 0) {

		PRINTD(("i2c_read: send memory word address byte %1d\n",alen));
		msg.condition = I2C_COND_NORMAL;
		msg.acknack   = I2C_ACKNAK_WAITACK;
		msg.direction = I2C_WRITE;
		msg.data      = addr_bytes[alen];
		if ((ret=i2c_transfer(&msg))) return -1;
	}


	/* start read sequence */
	PRINTD(("i2c_read: start read sequence\n"));
	msg.condition = I2C_COND_START;
	msg.acknack   = I2C_ACKNAK_WAITACK;
	msg.direction = I2C_WRITE;
	msg.data      = (chip << 1);
	msg.data     |= 0x01;
	if ((ret=i2c_transfer(&msg))) return -1;

	/* read bytes; send NACK at last byte */
	while (len--) {

		if (len==0) {
			msg.condition = I2C_COND_STOP;
			msg.acknack   = I2C_ACKNAK_SENDNAK;
		} else {
			msg.condition = I2C_COND_NORMAL;
			msg.acknack   = I2C_ACKNAK_SENDACK;
		}

		msg.direction = I2C_READ;
		msg.data      = 0x00;
		if ((ret=i2c_transfer(&msg))) return -1;

		*buffer = msg.data;
		PRINTD(("i2c_read: reading byte (0x%08x)=0x%02x\n",(unsigned int)buffer,*buffer));
		buffer++;

	}

	i2c_reset();

	return 0;
}


/**
 * i2c_write: -  Write multiple bytes to an i2c device
 *
 * The higher level routines take into account that this function is only
 * called with len < page length of the device (see configuration file)
 *
 * @chip:	address of the chip which is to be written
 * @addr:	i2c data address within the chip
 * @alen:	length of the i2c data address (1..2 bytes)
 * @buffer:	where to find the data to be written
 * @len:	how much byte do we want to read
 * @return:	0 in case of success
 */

int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len)
{
	struct i2c_msg msg;
	u8 addr_bytes[3]; /* lowest...highest byte of data address */

	PRINTD(("i2c_write(chip=0x%02x, addr=0x%02x, alen=0x%02x, len=0x%02x)\n",chip,addr,alen,len));

	i2c_reset();

	/* chip address write */
	PRINTD(("i2c_write: chip address write\n"));
	msg.condition = I2C_COND_START;
	msg.acknack   = I2C_ACKNAK_WAITACK;
	msg.direction = I2C_WRITE;
	msg.data      = (chip << 1);
	msg.data     &= 0xFE;
	if (i2c_transfer(&msg)) return -1;

	/*
	 * send memory address bytes;
	 * alen defines how much bytes we have to send.
	 */
	addr_bytes[0] = (u8)((addr >>  0) & 0x000000FF);
	addr_bytes[1] = (u8)((addr >>  8) & 0x000000FF);
	addr_bytes[2] = (u8)((addr >> 16) & 0x000000FF);

	while (--alen >= 0) {

		PRINTD(("i2c_write: send memory word address\n"));
		msg.condition = I2C_COND_NORMAL;
		msg.acknack   = I2C_ACKNAK_WAITACK;
		msg.direction = I2C_WRITE;
		msg.data      = addr_bytes[alen];
		if (i2c_transfer(&msg)) return -1;
	}

	/* write bytes; send NACK at last byte */
	while (len--) {

		PRINTD(("i2c_write: writing byte (0x%08x)=0x%02x\n",(unsigned int)buffer,*buffer));

		if (len==0)
			msg.condition = I2C_COND_STOP;
		else
			msg.condition = I2C_COND_NORMAL;

		msg.acknack   = I2C_ACKNAK_WAITACK;
		msg.direction = I2C_WRITE;
		msg.data      = *(buffer++);

		if (i2c_transfer(&msg)) return -1;

	}

	i2c_reset();

	return 0;

}

uchar i2c_reg_read (uchar chip, uchar reg)
{
	uchar buf;

	PRINTD(("i2c_reg_read(chip=0x%02x, reg=0x%02x)\n",chip,reg));
	i2c_read(chip, reg, 1, &buf, 1);
	return (buf);
}

void  i2c_reg_write(uchar chip, uchar reg, uchar val)
{
	PRINTD(("i2c_reg_write(chip=0x%02x, reg=0x%02x, val=0x%02x)\n",chip,reg,val));
	i2c_write(chip, reg, 1, &val, 1);
}

#endif	/* CONFIG_HARD_I2C */
Commit	Line	Data
43d9616c WD	1	/*
	2	* (C) Copyright 2000
	3	* Paolo Scaffardi, AIRVENT SAM s.p.a - RIMINI(ITALY), arsenio@tin.it
	4	*
	5	* (C) Copyright 2000 Sysgo Real-Time Solutions, GmbH <www.elinos.com>
	6	* Marius Groeger <mgroeger@sysgo.de>
	7	*
	8	* (C) Copyright 2003 Pengutronix e.K.
	9	* Robert Schwebel <r.schwebel@pengutronix.de>
	10	*
	11	* See file CREDITS for list of people who contributed to this
	12	* project.
	13	*
	14	* This program is free software; you can redistribute it and/or
	15	* modify it under the terms of the GNU General Public License as
	16	* published by the Free Software Foundation; either version 2 of
	17	* the License, or (at your option) any later version.
	18	*
	19	* This program is distributed in the hope that it will be useful,
	20	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	21	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	22	* GNU General Public License for more details.
	23	*
	24	* You should have received a copy of the GNU General Public License
	25	* along with this program; if not, write to the Free Software
	26	* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
	27	* MA 02111-1307 USA
	28	*
	29	* Back ported to the 8xx platform (from the 8260 platform) by
	30	* Murray.Jensen@cmst.csiro.au, 27-Jan-01.
	31	*/
	32
	33	/* FIXME: this file is PXA255 specific! What about other XScales? */
	34
	35	#include <common.h>
	36
	37	#ifdef CONFIG_HARD_I2C
	38
8bde7f77	39	/*
6d0f6bcf	40	* - CONFIG_SYS_I2C_SPEED
8bde7f77	41	* - I2C_PXA_SLAVE_ADDR
43d9616c WD	42	*/
43d9616c WD	43
47cd00fa	44	#include <asm/arch/hardware.h>
43d9616c WD	45	#include <asm/arch/pxa-regs.h>
	46	#include <i2c.h>
	47
53677ef1	48	/#define DEBUG_I2C 1 /### activate local debugging output */
43d9616c	49	#define I2C_PXA_SLAVE_ADDR 0x1 /* slave pxa unit address */
ba70d6a4	50
6d0f6bcf	51	#if (CONFIG_SYS_I2C_SPEED == 400000)
ba70d6a4 MK	52	#define I2C_ICR_INIT (ICR_FM \| ICR_BEIE \| ICR_IRFIE \| ICR_ITEIE \| ICR_GCD \| ICR_SCLE)
	53	#else
	54	#define I2C_ICR_INIT (ICR_BEIE \| ICR_IRFIE \| ICR_ITEIE \| ICR_GCD \| ICR_SCLE)
	55	#endif
	56
43d9616c WD	57	#define I2C_ISR_INIT 0x7FF
	58
	59	#ifdef DEBUG_I2C
	60	#define PRINTD(x) printf x
	61	#else
	62	#define PRINTD(x)
	63	#endif
	64
	65
	66	/* Shall the current transfer have a start/stop condition? */
	67	#define I2C_COND_NORMAL 0
	68	#define I2C_COND_START 1
	69	#define I2C_COND_STOP 2
	70
	71	/* Shall the current transfer be ack/nacked or being waited for it? */
8bde7f77	72	#define I2C_ACKNAK_WAITACK 1
43d9616c WD	73	#define I2C_ACKNAK_SENDACK 2
	74	#define I2C_ACKNAK_SENDNAK 4
	75
	76	/* Specify who shall transfer the data (master or slave) */
	77	#define I2C_READ 0
	78	#define I2C_WRITE 1
	79
	80	/* All transfers are described by this data structure */
	81	struct i2c_msg {
	82	u8 condition;
8bde7f77 WD	83	u8 acknack;
8bde7f77 WD	84	u8 direction;
43d9616c WD	85	u8 data;
	86	};
	87
	88
	89	/**
8bde7f77	90	* i2c_pxa_reset: - reset the host controller
43d9616c WD	91	*
	92	*/
	93
	94	static void i2c_reset( void )
	95	{
	96	ICR &= ~ICR_IUE; /* disable unit */
8bde7f77 WD	97	ICR \|= ICR_UR; /* reset the unit */
	98	udelay(100);
	99	ICR &= ~ICR_IUE; /* disable unit */
ba70d6a4 MK	100	#ifdef CONFIG_CPU_MONAHANS
	101	CKENB \|= (CKENB_4_I2C); /* \| CKENB_1_PWM1 \| CKENB_0_PWM0); */
	102	#else /* CONFIG_CPU_MONAHANS */
8bde7f77	103	CKEN \|= CKEN14_I2C; /* set the global I2C clock on */
ba70d6a4	104	#endif
8bde7f77 WD	105	ISAR = I2C_PXA_SLAVE_ADDR; /* set our slave address */
	106	ICR = I2C_ICR_INIT; /* set control register values */
	107	ISR = I2C_ISR_INIT; /* set clear interrupt bits */
	108	ICR \|= ICR_IUE; /* enable unit */
	109	udelay(100);
43d9616c WD	110	}
	111
	112
	113	/**
8bde7f77	114	* i2c_isr_set_cleared: - wait until certain bits of the I2C status register
43d9616c WD	115	* are set and cleared
43d9616c WD	116	*
ba70d6a4	117	* @return: 1 in case of success, 0 means timeout (no match within 10 ms).
43d9616c	118	*/
43d9616c WD	119	static int i2c_isr_set_cleared( unsigned long set_mask, unsigned long cleared_mask )
	120	{
	121	int timeout = 10000;
	122
	123	while( ((ISR & set_mask)!=set_mask) \|\| ((ISR & cleared_mask)!=0) ){
	124	udelay( 10 );
	125	if( timeout-- < 0 ) return 0;
	126	}
	127
8bde7f77	128	return 1;
43d9616c WD	129	}
	130
	131
	132	/**
	133	* i2c_transfer: - Transfer one byte over the i2c bus
	134	*
8bde7f77 WD	135	* This function can tranfer a byte over the i2c bus in both directions.
8bde7f77 WD	136	* It is used by the public API functions.
43d9616c WD	137	*
	138	* @return: 0: transfer successful
	139	* -1: message is empty
	140	* -2: transmit timeout
	141	* -3: ACK missing
	142	* -4: receive timeout
	143	* -5: illegal parameters
	144	* -6: bus is busy and couldn't be aquired
8bde7f77	145	*/
43d9616c WD	146	int i2c_transfer(struct i2c_msg *msg)
	147	{
	148	int ret;
	149
8bde7f77	150	if (!msg)
43d9616c WD	151	goto transfer_error_msg_empty;
	152
	153	switch(msg->direction) {
	154
	155	case I2C_WRITE:
	156
	157	/* check if bus is not busy */
	158	if (!i2c_isr_set_cleared(0,ISR_IBB))
	159	goto transfer_error_bus_busy;
	160
	161	/* start transmission */
	162	ICR &= ~ICR_START;
	163	ICR &= ~ICR_STOP;
	164	IDBR = msg->data;
	165	if (msg->condition == I2C_COND_START) ICR \|= ICR_START;
8bde7f77	166	if (msg->condition == I2C_COND_STOP) ICR \|= ICR_STOP;
43d9616c WD	167	if (msg->acknack == I2C_ACKNAK_SENDNAK) ICR \|= ICR_ACKNAK;
	168	if (msg->acknack == I2C_ACKNAK_SENDACK) ICR &= ~ICR_ACKNAK;
	169	ICR &= ~ICR_ALDIE;
8bde7f77	170	ICR \|= ICR_TB;
43d9616c WD	171
43d9616c WD	172	/* transmit register empty? */
8bde7f77	173	if (!i2c_isr_set_cleared(ISR_ITE,0))
43d9616c WD	174	goto transfer_error_transmit_timeout;
	175
	176	/* clear 'transmit empty' state */
	177	ISR \|= ISR_ITE;
	178
	179	/* wait for ACK from slave */
	180	if (msg->acknack == I2C_ACKNAK_WAITACK)
8bde7f77	181	if (!i2c_isr_set_cleared(0,ISR_ACKNAK))
43d9616c WD	182	goto transfer_error_ack_missing;
	183	break;
	184
	185	case I2C_READ:
	186
	187	/* check if bus is not busy */
	188	if (!i2c_isr_set_cleared(0,ISR_IBB))
	189	goto transfer_error_bus_busy;
	190
	191	/* start receive */
	192	ICR &= ~ICR_START;
	193	ICR &= ~ICR_STOP;
53677ef1 WD	194	if (msg->condition == I2C_COND_START) ICR \|= ICR_START;
53677ef1 WD	195	if (msg->condition == I2C_COND_STOP) ICR \|= ICR_STOP;
43d9616c WD	196	if (msg->acknack == I2C_ACKNAK_SENDNAK) ICR \|= ICR_ACKNAK;
	197	if (msg->acknack == I2C_ACKNAK_SENDACK) ICR &= ~ICR_ACKNAK;
	198	ICR &= ~ICR_ALDIE;
	199	ICR \|= ICR_TB;
	200
	201	/* receive register full? */
8bde7f77 WD	202	if (!i2c_isr_set_cleared(ISR_IRF,0))
8bde7f77 WD	203	goto transfer_error_receive_timeout;
43d9616c WD	204
	205	msg->data = IDBR;
	206
	207	/* clear 'receive empty' state */
	208	ISR \|= ISR_IRF;
	209
	210	break;
	211
	212	default:
	213
	214	goto transfer_error_illegal_param;
	215
	216	}
	217
8bde7f77	218	return 0;
43d9616c	219
8bde7f77	220	transfer_error_msg_empty:
43d9616c WD	221	PRINTD(("i2c_transfer: error: 'msg' is empty\n"));
	222	ret = -1; goto i2c_transfer_finish;
	223
	224	transfer_error_transmit_timeout:
	225	PRINTD(("i2c_transfer: error: transmit timeout\n"));
	226	ret = -2; goto i2c_transfer_finish;
	227
	228	transfer_error_ack_missing:
	229	PRINTD(("i2c_transfer: error: ACK missing\n"));
	230	ret = -3; goto i2c_transfer_finish;
	231
	232	transfer_error_receive_timeout:
	233	PRINTD(("i2c_transfer: error: receive timeout\n"));
	234	ret = -4; goto i2c_transfer_finish;
	235
	236	transfer_error_illegal_param:
	237	PRINTD(("i2c_transfer: error: illegal parameters\n"));
	238	ret = -5; goto i2c_transfer_finish;
	239
	240	transfer_error_bus_busy:
	241	PRINTD(("i2c_transfer: error: bus is busy\n"));
	242	ret = -6; goto i2c_transfer_finish;
	243
	244	i2c_transfer_finish:
	245	PRINTD(("i2c_transfer: ISR: 0x%04x\n",ISR));
	246	i2c_reset();
	247	return ret;
	248
	249	}
	250
	251	/* ------------------------------------------------------------------------ */
	252	/* API Functions */
	253	/* ------------------------------------------------------------------------ */
	254
	255	void i2c_init(int speed, int slaveaddr)
	256	{
6d0f6bcf	257	#ifdef CONFIG_SYS_I2C_INIT_BOARD
47cd00fa WD	258	/* call board specific i2c bus reset routine before accessing the */
	259	/* environment, which might be in a chip on that bus. For details */
	260	/* about this problem see doc/I2C_Edge_Conditions. */
	261	i2c_init_board();
	262	#endif
43d9616c WD	263	}
	264
	265
	266	/**
	267	* i2c_probe: - Test if a chip answers for a given i2c address
	268	*
8bde7f77	269	* @chip: address of the chip which is searched for
53677ef1	270	* @return: 0 if a chip was found, -1 otherwhise
43d9616c WD	271	*/
	272
	273	int i2c_probe(uchar chip)
	274	{
	275	struct i2c_msg msg;
	276
	277	i2c_reset();
	278
	279	msg.condition = I2C_COND_START;
	280	msg.acknack = I2C_ACKNAK_WAITACK;
	281	msg.direction = I2C_WRITE;
	282	msg.data = (chip << 1) + 1;
	283	if (i2c_transfer(&msg)) return -1;
	284
	285	msg.condition = I2C_COND_STOP;
	286	msg.acknack = I2C_ACKNAK_SENDNAK;
	287	msg.direction = I2C_READ;
	288	msg.data = 0x00;
	289	if (i2c_transfer(&msg)) return -1;
	290
	291	return 0;
	292	}
	293
	294
	295	/**
	296	* i2c_read: - Read multiple bytes from an i2c device
	297	*
	298	* The higher level routines take into account that this function is only
8bde7f77	299	* called with len < page length of the device (see configuration file)
43d9616c WD	300	*
	301	* @chip: address of the chip which is to be read
	302	* @addr: i2c data address within the chip
	303	* @alen: length of the i2c data address (1..2 bytes)
	304	* @buffer: where to write the data
	305	* @len: how much byte do we want to read
	306	* @return: 0 in case of success
	307	*/
	308
	309	int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len)
	310	{
	311	struct i2c_msg msg;
	312	u8 addr_bytes[3]; /* lowest...highest byte of data address */
	313	int ret;
	314
	315	PRINTD(("i2c_read(chip=0x%02x, addr=0x%02x, alen=0x%02x, len=0x%02x)\n",chip,addr,alen,len));
	316
	317	i2c_reset();
	318
	319	/* dummy chip address write */
	320	PRINTD(("i2c_read: dummy chip address write\n"));
	321	msg.condition = I2C_COND_START;
	322	msg.acknack = I2C_ACKNAK_WAITACK;
	323	msg.direction = I2C_WRITE;
	324	msg.data = (chip << 1);
	325	msg.data &= 0xFE;
	326	if ((ret=i2c_transfer(&msg))) return -1;
8bde7f77	327
43d9616c	328	/*
8bde7f77 WD	329	* send memory address bytes;
8bde7f77 WD	330	* alen defines how much bytes we have to send.
43d9616c	331	*/
6d0f6bcf	332	/addr &= ((1 << CONFIG_SYS_EEPROM_PAGE_WRITE_BITS)-1); /
43d9616c WD	333	addr_bytes[0] = (u8)((addr >> 0) & 0x000000FF);
	334	addr_bytes[1] = (u8)((addr >> 8) & 0x000000FF);
	335	addr_bytes[2] = (u8)((addr >> 16) & 0x000000FF);
	336
	337	while (--alen >= 0) {
	338
	339	PRINTD(("i2c_read: send memory word address byte %1d\n",alen));
	340	msg.condition = I2C_COND_NORMAL;
	341	msg.acknack = I2C_ACKNAK_WAITACK;
	342	msg.direction = I2C_WRITE;
	343	msg.data = addr_bytes[alen];
	344	if ((ret=i2c_transfer(&msg))) return -1;
	345	}
8bde7f77	346
43d9616c WD	347
	348	/* start read sequence */
	349	PRINTD(("i2c_read: start read sequence\n"));
	350	msg.condition = I2C_COND_START;
	351	msg.acknack = I2C_ACKNAK_WAITACK;
	352	msg.direction = I2C_WRITE;
	353	msg.data = (chip << 1);
	354	msg.data \|= 0x01;
	355	if ((ret=i2c_transfer(&msg))) return -1;
	356
	357	/* read bytes; send NACK at last byte */
	358	while (len--) {
	359
8bde7f77	360	if (len==0) {
43d9616c WD	361	msg.condition = I2C_COND_STOP;
	362	msg.acknack = I2C_ACKNAK_SENDNAK;
	363	} else {
	364	msg.condition = I2C_COND_NORMAL;
	365	msg.acknack = I2C_ACKNAK_SENDACK;
	366	}
	367
	368	msg.direction = I2C_READ;
	369	msg.data = 0x00;
	370	if ((ret=i2c_transfer(&msg))) return -1;
	371
ba70d6a4	372	*buffer = msg.data;
43d9616c	373	PRINTD(("i2c_read: reading byte (0x%08x)=0x%02x\n",(unsigned int)buffer,*buffer));
ba70d6a4	374	buffer++;
43d9616c WD	375
	376	}
	377
	378	i2c_reset();
	379
	380	return 0;
	381	}
	382
	383
	384	/**
	385	* i2c_write: - Write multiple bytes to an i2c device
	386	*
	387	* The higher level routines take into account that this function is only
8bde7f77	388	* called with len < page length of the device (see configuration file)
43d9616c WD	389	*
	390	* @chip: address of the chip which is to be written
	391	* @addr: i2c data address within the chip
	392	* @alen: length of the i2c data address (1..2 bytes)
8bde7f77	393	* @buffer: where to find the data to be written
43d9616c WD	394	* @len: how much byte do we want to read
	395	* @return: 0 in case of success
	396	*/
	397
	398	int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len)
	399	{
	400	struct i2c_msg msg;
	401	u8 addr_bytes[3]; /* lowest...highest byte of data address */
	402
	403	PRINTD(("i2c_write(chip=0x%02x, addr=0x%02x, alen=0x%02x, len=0x%02x)\n",chip,addr,alen,len));
	404
	405	i2c_reset();
	406
	407	/* chip address write */
	408	PRINTD(("i2c_write: chip address write\n"));
	409	msg.condition = I2C_COND_START;
	410	msg.acknack = I2C_ACKNAK_WAITACK;
	411	msg.direction = I2C_WRITE;
	412	msg.data = (chip << 1);
	413	msg.data &= 0xFE;
	414	if (i2c_transfer(&msg)) return -1;
8bde7f77	415
43d9616c	416	/*
8bde7f77 WD	417	* send memory address bytes;
8bde7f77 WD	418	* alen defines how much bytes we have to send.
43d9616c WD	419	*/
	420	addr_bytes[0] = (u8)((addr >> 0) & 0x000000FF);
	421	addr_bytes[1] = (u8)((addr >> 8) & 0x000000FF);
	422	addr_bytes[2] = (u8)((addr >> 16) & 0x000000FF);
	423
	424	while (--alen >= 0) {
	425
	426	PRINTD(("i2c_write: send memory word address\n"));
	427	msg.condition = I2C_COND_NORMAL;
	428	msg.acknack = I2C_ACKNAK_WAITACK;
	429	msg.direction = I2C_WRITE;
	430	msg.data = addr_bytes[alen];
	431	if (i2c_transfer(&msg)) return -1;
	432	}
8bde7f77	433
43d9616c WD	434	/* write bytes; send NACK at last byte */
	435	while (len--) {
	436
	437	PRINTD(("i2c_write: writing byte (0x%08x)=0x%02x\n",(unsigned int)buffer,*buffer));
	438
8bde7f77	439	if (len==0)
43d9616c WD	440	msg.condition = I2C_COND_STOP;
	441	else
	442	msg.condition = I2C_COND_NORMAL;
	443
	444	msg.acknack = I2C_ACKNAK_WAITACK;
	445	msg.direction = I2C_WRITE;
	446	msg.data = *(buffer++);
8bde7f77	447
43d9616c WD	448	if (i2c_transfer(&msg)) return -1;
	449
	450	}
	451
	452	i2c_reset();
	453
	454	return 0;
	455
	456	}
	457
	458	uchar i2c_reg_read (uchar chip, uchar reg)
	459	{
8412d814	460	uchar buf;
efa329cb	461
43d9616c	462	PRINTD(("i2c_reg_read(chip=0x%02x, reg=0x%02x)\n",chip,reg));
efa329cb WD	463	i2c_read(chip, reg, 1, &buf, 1);
efa329cb WD	464	return (buf);
43d9616c WD	465	}
	466
	467	void i2c_reg_write(uchar chip, uchar reg, uchar val)
	468	{
	469	PRINTD(("i2c_reg_write(chip=0x%02x, reg=0x%02x, val=0x%02x)\n",chip,reg,val));
efa329cb	470	i2c_write(chip, reg, 1, &val, 1);
43d9616c WD	471	}
	472
	473	#endif /* CONFIG_HARD_I2C */