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Commit | Line | Data |
---|---|---|
777a2882 | 1 | LIBS=../../libcrypto |
636b087e | 2 | |
d9dfeb94 RL |
3 | $BNASM=bn_asm.c |
4 | IF[{- !$disabled{asm} -}] | |
5 | # Define source files and macros per asm architecture | |
6 | # Known macros are: | |
7 | # | |
8 | # OPENSSL_BN_ASM_PART_WORDS For any collection with /-586/ file names | |
9 | # OPENSSL_BN_ASM_MONT For any collection with /-mont/ file names | |
10 | # OPENSSL_BN_ASM_MONT5 For any collection with /-mont5/ file names | |
11 | # OPENSSL_BN_ASM_GF2m For any collection with /-gf2m/ file names | |
12 | # OPENSSL_IA32_SSE2 For any collection with /86/ file names | |
13 | # when sse2 is enabled | |
14 | # BN_DIV3W For any collection with /-div3w/ file names | |
15 | # | |
16 | # All variables are named in such a way that they can be "indexed" with | |
17 | # $target{asm_arch} | |
18 | ||
19 | $BNASM_x86=bn-586.s co-586.s x86-mont.s x86-gf2m.s | |
20 | # bn-586 is the only one implementing bn_*_part_words | |
21 | # => OPENSSL_BN_ASM_PART_WORDS | |
22 | $BNDEF_x86=OPENSSL_BN_ASM_PART_WORDS OPENSSL_BN_ASM_MONT OPENSSL_BN_ASM_GF2m | |
23 | $BNDEF_x86_sse2=OPENSSL_IA32_SSE2 | |
24 | ||
25 | $BNASM_x86_64=\ | |
26 | x86_64-mont.s x86_64-mont5.s x86_64-gf2m.s rsaz_exp.c rsaz-x86_64.s \ | |
c781eb1c | 27 | rsaz-avx2.s rsaz_exp_x2.c rsaz-avx512.s |
d9dfeb94 RL |
28 | IF[{- $config{target} !~ /^VC/ -}] |
29 | $BNASM_x86_64=asm/x86_64-gcc.c $BNASM_x86_64 | |
30 | ELSE | |
31 | $BNASM_x86_64=bn_asm.c $BNASM_x86_64 | |
32 | ENDIF | |
33 | $BNDEF_x86_64=OPENSSL_BN_ASM_MONT OPENSSL_BN_ASM_MONT5 OPENSSL_BN_ASM_GF2m | |
34 | $BNDEF_x86_64_sse2=OPENSSL_IA32_SSE2 | |
35 | ||
36 | IF[{- $config{target} !~ /^VC/ -}] | |
37 | $BNASM_ia64=bn-ia64.s ia64-mont.s | |
38 | ELSE | |
39 | $BNASM_ia64=bn_asm.c ia64-mont.s | |
40 | ENDIF | |
41 | ||
42 | $BNASM_sparcv9=asm/sparcv8plus.S sparcv9-mont.S sparcv9a-mont.S vis3-mont.S \ | |
52f7e44e | 43 | sparct4-mont.S bn_sparc.c |
d9dfeb94 RL |
44 | $BNDEF_sparcv9=OPENSSL_BN_ASM_MONT |
45 | $BNASM_sparcv9_ec2m=sparcv9-gf2m.S | |
46 | $BNDEF_sparcv9_ec2m=OPENSSL_BN_ASM_GF2m | |
47 | ||
48 | $BNASM_sparcv8=asm/sparcv8.S | |
49 | ||
50 | $BNASM_alpha=bn_asm.c alpha-mont.S | |
51 | $BNDEF_alpha=OPENSSL_BN_ASM_MONT | |
52 | ||
53 | $BNASM_mips32=bn-mips.S mips-mont.S | |
54 | $BNDEF_mips32=OPENSSL_BN_ASM_MONT | |
55 | $BNASM_mips64=$BNASM_mips32 | |
56 | $BNDEF_mips64=$BNDEF_mips32 | |
57 | ||
58 | IF[{- ($target{perlasm_scheme} // '') eq '31' -}] | |
59 | $BNASM_s390x=bn_asm.c s390x-mont.S | |
60 | ELSE | |
61 | $BNASM_s390x=asm/s390x.S s390x-mont.S | |
62 | ENDIF | |
63 | $BNDEF_s390x=OPENSSL_BN_ASM_MONT | |
64 | $BNASM_s390x_ec2m=s390x-gf2m.s | |
65 | $BNDEF_s390x_ec2m=OPENSSL_BN_ASM_GF2m | |
66 | ||
67 | $BNASM_armv4=bn_asm.c armv4-mont.S | |
68 | $BNDEF_armv4=OPENSSL_BN_ASM_MONT | |
69 | $BNASM_armv4_ec2m=armv4-gf2m.S | |
70 | $BNDEF_armv4_ec2m=OPENSSL_BN_ASM_GF2m | |
71 | ||
72 | $BNASM_aarch64=bn_asm.c armv8-mont.S | |
73 | $BNDEF_aarch64=OPENSSL_BN_ASM_MONT | |
74 | ||
75 | $BNASM_parisc11=bn_asm.c parisc-mont.s | |
76 | $BNDEF_parisc11=OPENSSL_BN_ASM_MONT | |
77 | $BNASM_parisc20_64=$BNASM_parisc11 | |
78 | $BNDEF_parisc20_64=$BNDEF_parisc11 | |
79 | ||
3d178db7 | 80 | $BNASM_ppc32=bn_ppc.c bn-ppc.s ppc-mont.s |
d9dfeb94 | 81 | $BNDEF_ppc32=OPENSSL_BN_ASM_MONT |
0d40ca47 | 82 | $BNASM_ppc64=$BNASM_ppc32 ppc64-mont-fixed.s |
d9dfeb94 RL |
83 | $BNDEF_ppc64=$BNDEF_ppc32 |
84 | ||
85 | $BNASM_c64xplus=asm/bn-c64xplus.asm | |
86 | $BNASM_c64xplus_ec2m=c64xplus-gf2m.s | |
87 | $BNDEF_c64xplus_ec2m=OPENSSL_BN_ASM_GF2m | |
88 | ||
89 | # Now that we have defined all the arch specific variables, use the | |
90 | # appropriate ones, and define the appropriate macros | |
91 | IF[$BNASM_{- $target{asm_arch} -}] | |
92 | $BNASM=$BNASM_{- $target{asm_arch} -} | |
93 | $BNDEF=$BNDEF_{- $target{asm_arch} -} | |
94 | IF[{- !$disabled{ec2m} -}] | |
95 | $BNASM=$BNASM $BNASM_{- $target{asm_arch} -}_ec2m | |
96 | $BNDEF=$BNDEF $BNDEF_{- $target{asm_arch} -}_ec2m | |
97 | ENDIF | |
98 | IF[{- !$disabled{sse2} -}] | |
d5d32e78 | 99 | $BNDEF=$BNDEF $BNDEF_{- $target{asm_arch} -}_sse2 |
d9dfeb94 RL |
100 | ENDIF |
101 | ENDIF | |
102 | ENDIF | |
103 | ||
07c244f0 RL |
104 | $COMMON=bn_add.c bn_div.c bn_exp.c bn_lib.c bn_ctx.c bn_mul.c \ |
105 | bn_mod.c bn_conv.c bn_rand.c bn_shift.c bn_word.c bn_blind.c \ | |
106 | bn_kron.c bn_sqrt.c bn_gcd.c bn_prime.c bn_sqr.c \ | |
107 | bn_recp.c bn_mont.c bn_mpi.c bn_exp2.c bn_gf2m.c bn_nist.c \ | |
c27e7922 | 108 | bn_intern.c bn_dh.c bn_rsa_fips186_4.c bn_const.c |
c450922c | 109 | SOURCE[../../libcrypto]=$COMMON $BNASM bn_print.c bn_err.c bn_srp.c |
5ad3e6c5 | 110 | DEFINE[../../libcrypto]=$BNDEF |
92d7120c SL |
111 | IF[{- !$disabled{'deprecated-0.9.8'} -}] |
112 | SOURCE[../../libcrypto]=bn_depr.c | |
113 | ENDIF | |
705536e2 | 114 | IF[{- !$disabled{'deprecated-3.0'} -}] |
92d7120c | 115 | SOURCE[../../libcrypto]=bn_x931p.c |
705536e2 | 116 | ENDIF |
c450922c | 117 | SOURCE[../../providers/libfips.a]=$COMMON $BNASM |
5ad3e6c5 RL |
118 | DEFINE[../../providers/libfips.a]=$BNDEF |
119 | # Because some CPUID implementations use some BN assembler (!!!), we | |
120 | # must include assembler code into the legacy provider under the same | |
121 | # conditions as CPUID code is included. See ../build.info | |
c450922c | 122 | SOURCE[../../providers/liblegacy.a]=$BNASM |
5ad3e6c5 | 123 | DEFINE[../../providers/liblegacy.a]=$BNDEF |
64fd90fb SL |
124 | # Implementations are now spread across several libraries, so the defines |
125 | # need to be applied to all affected libraries and modules. | |
5ad3e6c5 | 126 | DEFINE[../../providers/libcommon.a]=$BNDEF |
636b087e | 127 | |
12940f08 AP |
128 | INCLUDE[bn_exp.o]=.. |
129 | ||
a1c8befd | 130 | GENERATE[bn-586.s]=asm/bn-586.pl |
6bd7a4d9 | 131 | DEPEND[bn-586.s]=../perlasm/x86asm.pl |
a1c8befd | 132 | GENERATE[co-586.s]=asm/co-586.pl |
6bd7a4d9 | 133 | DEPEND[co-586.s]=../perlasm/x86asm.pl |
a1c8befd | 134 | GENERATE[x86-mont.s]=asm/x86-mont.pl |
6bd7a4d9 | 135 | DEPEND[x86-mont.s]=../perlasm/x86asm.pl |
a1c8befd | 136 | GENERATE[x86-gf2m.s]=asm/x86-gf2m.pl |
6bd7a4d9 RL |
137 | DEPEND[x86-gf2m.s]=../perlasm/x86asm.pl |
138 | ||
a1c8befd | 139 | GENERATE[sparcv9a-mont.S]=asm/sparcv9a-mont.pl |
f0667b14 | 140 | INCLUDE[sparcv9a-mont.o]=.. |
a1c8befd | 141 | GENERATE[sparcv9-mont.S]=asm/sparcv9-mont.pl |
f0667b14 | 142 | INCLUDE[sparcv9-mont.o]=.. |
a1c8befd | 143 | GENERATE[vis3-mont.S]=asm/vis3-mont.pl |
f0667b14 | 144 | INCLUDE[vis3-mont.o]=.. |
a1c8befd | 145 | GENERATE[sparct4-mont.S]=asm/sparct4-mont.pl |
f0667b14 | 146 | INCLUDE[sparct4-mont.o]=.. |
a1c8befd | 147 | GENERATE[sparcv9-gf2m.S]=asm/sparcv9-gf2m.pl |
12940f08 | 148 | INCLUDE[sparcv9-gf2m.o]=.. |
6bd7a4d9 | 149 | |
a1c8befd | 150 | GENERATE[bn-mips.S]=asm/mips.pl |
947716c1 | 151 | INCLUDE[bn-mips.o]=.. |
a1c8befd | 152 | GENERATE[mips-mont.S]=asm/mips-mont.pl |
947716c1 | 153 | INCLUDE[mips-mont.o]=.. |
6bd7a4d9 | 154 | |
a1c8befd RL |
155 | GENERATE[s390x-mont.S]=asm/s390x-mont.pl |
156 | GENERATE[s390x-gf2m.s]=asm/s390x-gf2m.pl | |
6bd7a4d9 | 157 | |
a1c8befd RL |
158 | GENERATE[x86_64-mont.s]=asm/x86_64-mont.pl |
159 | GENERATE[x86_64-mont5.s]=asm/x86_64-mont5.pl | |
160 | GENERATE[x86_64-gf2m.s]=asm/x86_64-gf2m.pl | |
161 | GENERATE[rsaz-x86_64.s]=asm/rsaz-x86_64.pl | |
162 | GENERATE[rsaz-avx2.s]=asm/rsaz-avx2.pl | |
c781eb1c | 163 | GENERATE[rsaz-avx512.s]=asm/rsaz-avx512.pl |
6bd7a4d9 RL |
164 | |
165 | GENERATE[bn-ia64.s]=asm/ia64.S | |
a1c8befd | 166 | GENERATE[ia64-mont.s]=asm/ia64-mont.pl |
6bd7a4d9 | 167 | |
a1c8befd | 168 | GENERATE[parisc-mont.s]=asm/parisc-mont.pl |
6bd7a4d9 RL |
169 | |
170 | # ppc - AIX, Linux, MacOS X... | |
a1c8befd RL |
171 | GENERATE[bn-ppc.s]=asm/ppc.pl |
172 | GENERATE[ppc-mont.s]=asm/ppc-mont.pl | |
173 | GENERATE[ppc64-mont.s]=asm/ppc64-mont.pl | |
0d40ca47 | 174 | GENERATE[ppc64-mont-fixed.s]=asm/ppc64-mont-fixed.pl |
6bd7a4d9 | 175 | |
a1c8befd | 176 | GENERATE[alpha-mont.S]=asm/alpha-mont.pl |
567a9e6f | 177 | |
a1c8befd | 178 | GENERATE[armv4-mont.S]=asm/armv4-mont.pl |
f0667b14 | 179 | INCLUDE[armv4-mont.o]=.. |
a1c8befd | 180 | GENERATE[armv4-gf2m.S]=asm/armv4-gf2m.pl |
f0667b14 | 181 | INCLUDE[armv4-gf2m.o]=.. |
a1c8befd | 182 | GENERATE[armv8-mont.S]=asm/armv8-mont.pl |
10646160 | 183 | INCLUDE[armv8-mont.o]=.. |