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RSA padding Zeroization fixes
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b1322259 1/*
83cf7abf 2 * Copyright 2009-2018 The OpenSSL Project Authors. All Rights Reserved.
b1322259
RS
3 *
4 * Licensed under the OpenSSL license (the "License"). You may not use
5 * this file except in compliance with the License. You can obtain a copy
6 * in the file LICENSE in the source distribution or at
7 * https://www.openssl.org/source/license.html
8 */
9
b4b48a10
AP
10#include <stdio.h>
11#include <stdlib.h>
12#include <string.h>
13#include <setjmp.h>
14#include <signal.h>
fd054957 15#include <unistd.h>
d5630dd6 16#if defined(__linux) || defined(_AIX)
0f113f3e 17# include <sys/utsname.h>
78c3e205 18#endif
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AP
19#if defined(_AIX53) /* defined even on post-5.3 */
20# include <sys/systemcfg.h>
21# if !defined(__power_set)
22# define __power_set(a) (_system_configuration.implementation & (a))
23# endif
24#endif
0bd93bbe
AP
25#if defined(__APPLE__) && defined(__MACH__)
26# include <sys/types.h>
27# include <sys/sysctl.h>
28#endif
11252459 29#include <openssl/crypto.h>
10b0b5ec 30#include <openssl/bn.h>
8c8fbca9
BE
31#include <internal/cryptlib.h>
32#include <internal/chacha.h>
33#include "bn/bn_lcl.h"
b4b48a10 34
0e716d92 35#include "ppc_arch.h"
b4b48a10 36
07f3e4f3 37unsigned int OPENSSL_ppccap_P = 0;
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AP
38
39static sigset_t all_masked;
40
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RL
41#ifdef OPENSSL_BN_ASM_MONT
42int bn_mul_mont(BN_ULONG *rp, const BN_ULONG *ap, const BN_ULONG *bp,
43 const BN_ULONG *np, const BN_ULONG *n0, int num)
44{
45 int bn_mul_mont_int(BN_ULONG *rp, const BN_ULONG *ap, const BN_ULONG *bp,
46 const BN_ULONG *np, const BN_ULONG *n0, int num);
47 int bn_mul4x_mont_int(BN_ULONG *rp, const BN_ULONG *ap, const BN_ULONG *bp,
48 const BN_ULONG *np, const BN_ULONG *n0, int num);
49
50 if (num < 4)
51 return 0;
52
53 if ((num & 3) == 0)
54 return bn_mul4x_mont_int(rp, ap, bp, np, n0, num);
55
56 /*
57 * There used to be [optional] call to bn_mul_mont_fpu64 here,
58 * but above subroutine is faster on contemporary processors.
59 * Formulation means that there might be old processors where
60 * FPU code path would be faster, POWER6 perhaps, but there was
61 * no opportunity to figure it out...
62 */
63
64 return bn_mul_mont_int(rp, ap, bp, np, n0, num);
65}
66#endif
67
68void sha256_block_p8(void *ctx, const void *inp, size_t len);
69void sha256_block_ppc(void *ctx, const void *inp, size_t len);
8c8fbca9 70void sha256_block_data_order(void *ctx, const void *inp, size_t len);
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RL
71void sha256_block_data_order(void *ctx, const void *inp, size_t len)
72{
73 OPENSSL_ppccap_P & PPC_CRYPTO207 ? sha256_block_p8(ctx, inp, len) :
74 sha256_block_ppc(ctx, inp, len);
75}
76
77void sha512_block_p8(void *ctx, const void *inp, size_t len);
78void sha512_block_ppc(void *ctx, const void *inp, size_t len);
8c8fbca9 79void sha512_block_data_order(void *ctx, const void *inp, size_t len);
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RL
80void sha512_block_data_order(void *ctx, const void *inp, size_t len)
81{
82 OPENSSL_ppccap_P & PPC_CRYPTO207 ? sha512_block_p8(ctx, inp, len) :
83 sha512_block_ppc(ctx, inp, len);
84}
85
86#ifndef OPENSSL_NO_CHACHA
87void ChaCha20_ctr32_int(unsigned char *out, const unsigned char *inp,
88 size_t len, const unsigned int key[8],
89 const unsigned int counter[4]);
90void ChaCha20_ctr32_vmx(unsigned char *out, const unsigned char *inp,
91 size_t len, const unsigned int key[8],
92 const unsigned int counter[4]);
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AP
93void ChaCha20_ctr32_vsx(unsigned char *out, const unsigned char *inp,
94 size_t len, const unsigned int key[8],
95 const unsigned int counter[4]);
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RL
96void ChaCha20_ctr32(unsigned char *out, const unsigned char *inp,
97 size_t len, const unsigned int key[8],
98 const unsigned int counter[4])
99{
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AP
100 OPENSSL_ppccap_P & PPC_CRYPTO207
101 ? ChaCha20_ctr32_vsx(out, inp, len, key, counter)
102 : OPENSSL_ppccap_P & PPC_ALTIVEC
103 ? ChaCha20_ctr32_vmx(out, inp, len, key, counter)
104 : ChaCha20_ctr32_int(out, inp, len, key, counter);
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RL
105}
106#endif
107
108#ifndef OPENSSL_NO_POLY1305
109void poly1305_init_int(void *ctx, const unsigned char key[16]);
110void poly1305_blocks(void *ctx, const unsigned char *inp, size_t len,
111 unsigned int padbit);
112void poly1305_emit(void *ctx, unsigned char mac[16],
113 const unsigned int nonce[4]);
114void poly1305_init_fpu(void *ctx, const unsigned char key[16]);
115void poly1305_blocks_fpu(void *ctx, const unsigned char *inp, size_t len,
116 unsigned int padbit);
117void poly1305_emit_fpu(void *ctx, unsigned char mac[16],
118 const unsigned int nonce[4]);
8c8fbca9 119int poly1305_init(void *ctx, const unsigned char key[16], void *func[2]);
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RL
120int poly1305_init(void *ctx, const unsigned char key[16], void *func[2])
121{
122 if (sizeof(size_t) == 4 && (OPENSSL_ppccap_P & PPC_FPU)) {
123 poly1305_init_fpu(ctx, key);
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BE
124 func[0] = (void*)(uintptr_t)poly1305_blocks_fpu;
125 func[1] = (void*)(uintptr_t)poly1305_emit_fpu;
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RL
126 } else {
127 poly1305_init_int(ctx, key);
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BE
128 func[0] = (void*)(uintptr_t)poly1305_blocks;
129 func[1] = (void*)(uintptr_t)poly1305_emit;
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RL
130 }
131 return 1;
132}
133#endif
134
135#ifdef ECP_NISTZ256_ASM
136void ecp_nistz256_mul_mont(unsigned long res[4], const unsigned long a[4],
137 const unsigned long b[4]);
138
139void ecp_nistz256_to_mont(unsigned long res[4], const unsigned long in[4]);
140void ecp_nistz256_to_mont(unsigned long res[4], const unsigned long in[4])
141{
142 static const unsigned long RR[] = { 0x0000000000000003U,
143 0xfffffffbffffffffU,
144 0xfffffffffffffffeU,
145 0x00000004fffffffdU };
146
147 ecp_nistz256_mul_mont(res, in, RR);
148}
149
150void ecp_nistz256_from_mont(unsigned long res[4], const unsigned long in[4]);
151void ecp_nistz256_from_mont(unsigned long res[4], const unsigned long in[4])
152{
153 static const unsigned long one[] = { 1, 0, 0, 0 };
154
155 ecp_nistz256_mul_mont(res, in, one);
156}
157#endif
158
b4b48a10 159static sigjmp_buf ill_jmp;
0f113f3e
MC
160static void ill_handler(int sig)
161{
162 siglongjmp(ill_jmp, sig);
163}
b4b48a10 164
2688d999 165void OPENSSL_fpu_probe(void);
70b76d39 166void OPENSSL_ppc64_probe(void);
fd054957 167void OPENSSL_altivec_probe(void);
de51e830 168void OPENSSL_crypto207_probe(void);
53385e1f 169void OPENSSL_madd300_probe(void);
70b76d39 170
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AP
171/*
172 * Use a weak reference to getauxval() so we can use it if it is available
173 * but don't break the build if it is not. Note that this is *link-time*
174 * feature detection, not *run-time*. In other words if we link with
175 * symbol present, it's expected to be present even at run-time.
176 */
177#if defined(__GNUC__) && __GNUC__>=2 && defined(__ELF__)
178extern unsigned long getauxval(unsigned long type) __attribute__ ((weak));
179#else
180static unsigned long (*getauxval) (unsigned long) = NULL;
181#endif
182
183/* I wish <sys/auxv.h> was universally available */
184#define HWCAP 16 /* AT_HWCAP */
185#define HWCAP_PPC64 (1U << 30)
186#define HWCAP_ALTIVEC (1U << 28)
187#define HWCAP_FPU (1U << 27)
188#define HWCAP_POWER6_EXT (1U << 9)
189#define HWCAP_VSX (1U << 7)
190
191#define HWCAP2 26 /* AT_HWCAP2 */
192#define HWCAP_VEC_CRYPTO (1U << 25)
e0e53282 193#define HWCAP_ARCH_3_00 (1U << 23)
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AP
194
195# if defined(__GNUC__) && __GNUC__>=2
196__attribute__ ((constructor))
197# endif
b4b48a10 198void OPENSSL_cpuid_setup(void)
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MC
199{
200 char *e;
201 struct sigaction ill_oact, ill_act;
202 sigset_t oset;
203 static int trigger = 0;
204
205 if (trigger)
206 return;
207 trigger = 1;
208
0f113f3e
MC
209 if ((e = getenv("OPENSSL_ppccap"))) {
210 OPENSSL_ppccap_P = strtoul(e, NULL, 0);
211 return;
212 }
b4b48a10 213
0f113f3e 214 OPENSSL_ppccap_P = 0;
6415dd7b 215
fd054957 216#if defined(_AIX)
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AP
217 OPENSSL_ppccap_P |= PPC_FPU;
218
0f113f3e
MC
219 if (sizeof(size_t) == 4) {
220 struct utsname uts;
fd054957 221# if defined(_SC_AIX_KERNEL_BITMODE)
0f113f3e
MC
222 if (sysconf(_SC_AIX_KERNEL_BITMODE) != 64)
223 return;
fd054957 224# endif
0f113f3e
MC
225 if (uname(&uts) != 0 || atoi(uts.version) < 6)
226 return;
227 }
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AP
228
229# if defined(__power_set)
230 /*
231 * Value used in __power_set is a single-bit 1<<n one denoting
232 * specific processor class. Incidentally 0xffffffff<<n can be
233 * used to denote specific processor and its successors.
234 */
235 if (sizeof(size_t) == 4) {
236 /* In 32-bit case PPC_FPU64 is always fastest [if option] */
237 if (__power_set(0xffffffffU<<13)) /* POWER5 and later */
238 OPENSSL_ppccap_P |= PPC_FPU64;
239 } else {
240 /* In 64-bit case PPC_FPU64 is fastest only on POWER6 */
241 if (__power_set(0x1U<<14)) /* POWER6 */
242 OPENSSL_ppccap_P |= PPC_FPU64;
243 }
244
245 if (__power_set(0xffffffffU<<14)) /* POWER6 and later */
246 OPENSSL_ppccap_P |= PPC_ALTIVEC;
247
248 if (__power_set(0xffffffffU<<16)) /* POWER8 and later */
249 OPENSSL_ppccap_P |= PPC_CRYPTO207;
250
e0e53282
AP
251 if (__power_set(0xffffffffU<<17)) /* POWER9 and later */
252 OPENSSL_ppccap_P |= PPC_MADD300;
253
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AP
254 return;
255# endif
256#endif
257
0bd93bbe
AP
258#if defined(__APPLE__) && defined(__MACH__)
259 OPENSSL_ppccap_P |= PPC_FPU;
260
261 {
262 int val;
263 size_t len = sizeof(val);
264
265 if (sysctlbyname("hw.optional.64bitops", &val, &len, NULL, 0) == 0) {
266 if (val)
267 OPENSSL_ppccap_P |= PPC_FPU64;
268 }
269
270 len = sizeof(val);
271 if (sysctlbyname("hw.optional.altivec", &val, &len, NULL, 0) == 0) {
272 if (val)
273 OPENSSL_ppccap_P |= PPC_ALTIVEC;
274 }
275
276 return;
277 }
278#endif
279
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AP
280 if (getauxval != NULL) {
281 unsigned long hwcap = getauxval(HWCAP);
282
283 if (hwcap & HWCAP_FPU) {
dccd20d1 284 OPENSSL_ppccap_P |= PPC_FPU;
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AP
285
286 if (sizeof(size_t) == 4) {
287 /* In 32-bit case PPC_FPU64 is always fastest [if option] */
288 if (hwcap & HWCAP_PPC64)
289 OPENSSL_ppccap_P |= PPC_FPU64;
290 } else {
291 /* In 64-bit case PPC_FPU64 is fastest only on POWER6 */
292 if (hwcap & HWCAP_POWER6_EXT)
293 OPENSSL_ppccap_P |= PPC_FPU64;
294 }
295 }
296
297 if (hwcap & HWCAP_ALTIVEC) {
298 OPENSSL_ppccap_P |= PPC_ALTIVEC;
299
300 if ((hwcap & HWCAP_VSX) && (getauxval(HWCAP2) & HWCAP_VEC_CRYPTO))
301 OPENSSL_ppccap_P |= PPC_CRYPTO207;
302 }
303
e0e53282
AP
304 if (hwcap & HWCAP_ARCH_3_00) {
305 OPENSSL_ppccap_P |= PPC_MADD300;
306 }
307
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AP
308 return;
309 }
310
311 sigfillset(&all_masked);
312 sigdelset(&all_masked, SIGILL);
313 sigdelset(&all_masked, SIGTRAP);
314#ifdef SIGEMT
315 sigdelset(&all_masked, SIGEMT);
fd054957 316#endif
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AP
317 sigdelset(&all_masked, SIGFPE);
318 sigdelset(&all_masked, SIGBUS);
319 sigdelset(&all_masked, SIGSEGV);
fd054957 320
0f113f3e
MC
321 memset(&ill_act, 0, sizeof(ill_act));
322 ill_act.sa_handler = ill_handler;
323 ill_act.sa_mask = all_masked;
6415dd7b 324
0f113f3e
MC
325 sigprocmask(SIG_SETMASK, &ill_act.sa_mask, &oset);
326 sigaction(SIGILL, &ill_act, &ill_oact);
6415dd7b 327
2688d999
AP
328 if (sigsetjmp(ill_jmp,1) == 0) {
329 OPENSSL_fpu_probe();
330 OPENSSL_ppccap_P |= PPC_FPU;
331
332 if (sizeof(size_t) == 4) {
78c3e205 333#ifdef __linux
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AP
334 struct utsname uts;
335 if (uname(&uts) == 0 && strcmp(uts.machine, "ppc64") == 0)
78c3e205 336#endif
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AP
337 if (sigsetjmp(ill_jmp, 1) == 0) {
338 OPENSSL_ppc64_probe();
339 OPENSSL_ppccap_P |= PPC_FPU64;
340 }
341 } else {
342 /*
343 * Wanted code detecting POWER6 CPU and setting PPC_FPU64
344 */
345 }
0f113f3e
MC
346 }
347
348 if (sigsetjmp(ill_jmp, 1) == 0) {
349 OPENSSL_altivec_probe();
350 OPENSSL_ppccap_P |= PPC_ALTIVEC;
351 if (sigsetjmp(ill_jmp, 1) == 0) {
352 OPENSSL_crypto207_probe();
353 OPENSSL_ppccap_P |= PPC_CRYPTO207;
354 }
355 }
356
e0e53282
AP
357 if (sigsetjmp(ill_jmp, 1) == 0) {
358 OPENSSL_madd300_probe();
359 OPENSSL_ppccap_P |= PPC_MADD300;
360 }
361
0f113f3e
MC
362 sigaction(SIGILL, &ill_oact, NULL);
363 sigprocmask(SIG_SETMASK, &oset, NULL);
364}