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b1322259
RS
1/*
2 * Copyright 2009-2016 The OpenSSL Project Authors. All Rights Reserved.
3 *
4 * Licensed under the OpenSSL license (the "License"). You may not use
5 * this file except in compliance with the License. You can obtain a copy
6 * in the file LICENSE in the source distribution or at
7 * https://www.openssl.org/source/license.html
8 */
9
b4b48a10
AP
10#include <stdio.h>
11#include <stdlib.h>
12#include <string.h>
13#include <setjmp.h>
14#include <signal.h>
fd054957 15#include <unistd.h>
d5630dd6 16#if defined(__linux) || defined(_AIX)
0f113f3e 17# include <sys/utsname.h>
78c3e205 18#endif
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AP
19#if defined(_AIX53) /* defined even on post-5.3 */
20# include <sys/systemcfg.h>
21# if !defined(__power_set)
22# define __power_set(a) (_system_configuration.implementation & (a))
23# endif
24#endif
0bd93bbe
AP
25#if defined(__APPLE__) && defined(__MACH__)
26# include <sys/types.h>
27# include <sys/sysctl.h>
28#endif
11252459 29#include <openssl/crypto.h>
10b0b5ec 30#include <openssl/bn.h>
b4b48a10 31
0e716d92 32#include "ppc_arch.h"
b4b48a10 33
07f3e4f3 34unsigned int OPENSSL_ppccap_P = 0;
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35
36static sigset_t all_masked;
37
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RL
38#ifdef OPENSSL_BN_ASM_MONT
39int bn_mul_mont(BN_ULONG *rp, const BN_ULONG *ap, const BN_ULONG *bp,
40 const BN_ULONG *np, const BN_ULONG *n0, int num)
41{
42 int bn_mul_mont_int(BN_ULONG *rp, const BN_ULONG *ap, const BN_ULONG *bp,
43 const BN_ULONG *np, const BN_ULONG *n0, int num);
44 int bn_mul4x_mont_int(BN_ULONG *rp, const BN_ULONG *ap, const BN_ULONG *bp,
45 const BN_ULONG *np, const BN_ULONG *n0, int num);
46
47 if (num < 4)
48 return 0;
49
50 if ((num & 3) == 0)
51 return bn_mul4x_mont_int(rp, ap, bp, np, n0, num);
52
53 /*
54 * There used to be [optional] call to bn_mul_mont_fpu64 here,
55 * but above subroutine is faster on contemporary processors.
56 * Formulation means that there might be old processors where
57 * FPU code path would be faster, POWER6 perhaps, but there was
58 * no opportunity to figure it out...
59 */
60
61 return bn_mul_mont_int(rp, ap, bp, np, n0, num);
62}
63#endif
64
65void sha256_block_p8(void *ctx, const void *inp, size_t len);
66void sha256_block_ppc(void *ctx, const void *inp, size_t len);
67void sha256_block_data_order(void *ctx, const void *inp, size_t len)
68{
69 OPENSSL_ppccap_P & PPC_CRYPTO207 ? sha256_block_p8(ctx, inp, len) :
70 sha256_block_ppc(ctx, inp, len);
71}
72
73void sha512_block_p8(void *ctx, const void *inp, size_t len);
74void sha512_block_ppc(void *ctx, const void *inp, size_t len);
75void sha512_block_data_order(void *ctx, const void *inp, size_t len)
76{
77 OPENSSL_ppccap_P & PPC_CRYPTO207 ? sha512_block_p8(ctx, inp, len) :
78 sha512_block_ppc(ctx, inp, len);
79}
80
81#ifndef OPENSSL_NO_CHACHA
82void ChaCha20_ctr32_int(unsigned char *out, const unsigned char *inp,
83 size_t len, const unsigned int key[8],
84 const unsigned int counter[4]);
85void ChaCha20_ctr32_vmx(unsigned char *out, const unsigned char *inp,
86 size_t len, const unsigned int key[8],
87 const unsigned int counter[4]);
88void ChaCha20_ctr32(unsigned char *out, const unsigned char *inp,
89 size_t len, const unsigned int key[8],
90 const unsigned int counter[4])
91{
92 OPENSSL_ppccap_P & PPC_ALTIVEC
93 ? ChaCha20_ctr32_vmx(out, inp, len, key, counter)
94 : ChaCha20_ctr32_int(out, inp, len, key, counter);
95}
96#endif
97
98#ifndef OPENSSL_NO_POLY1305
99void poly1305_init_int(void *ctx, const unsigned char key[16]);
100void poly1305_blocks(void *ctx, const unsigned char *inp, size_t len,
101 unsigned int padbit);
102void poly1305_emit(void *ctx, unsigned char mac[16],
103 const unsigned int nonce[4]);
104void poly1305_init_fpu(void *ctx, const unsigned char key[16]);
105void poly1305_blocks_fpu(void *ctx, const unsigned char *inp, size_t len,
106 unsigned int padbit);
107void poly1305_emit_fpu(void *ctx, unsigned char mac[16],
108 const unsigned int nonce[4]);
109int poly1305_init(void *ctx, const unsigned char key[16], void *func[2])
110{
111 if (sizeof(size_t) == 4 && (OPENSSL_ppccap_P & PPC_FPU)) {
112 poly1305_init_fpu(ctx, key);
113 func[0] = poly1305_blocks_fpu;
114 func[1] = poly1305_emit_fpu;
115 } else {
116 poly1305_init_int(ctx, key);
117 func[0] = poly1305_blocks;
118 func[1] = poly1305_emit;
119 }
120 return 1;
121}
122#endif
123
124#ifdef ECP_NISTZ256_ASM
125void ecp_nistz256_mul_mont(unsigned long res[4], const unsigned long a[4],
126 const unsigned long b[4]);
127
128void ecp_nistz256_to_mont(unsigned long res[4], const unsigned long in[4]);
129void ecp_nistz256_to_mont(unsigned long res[4], const unsigned long in[4])
130{
131 static const unsigned long RR[] = { 0x0000000000000003U,
132 0xfffffffbffffffffU,
133 0xfffffffffffffffeU,
134 0x00000004fffffffdU };
135
136 ecp_nistz256_mul_mont(res, in, RR);
137}
138
139void ecp_nistz256_from_mont(unsigned long res[4], const unsigned long in[4]);
140void ecp_nistz256_from_mont(unsigned long res[4], const unsigned long in[4])
141{
142 static const unsigned long one[] = { 1, 0, 0, 0 };
143
144 ecp_nistz256_mul_mont(res, in, one);
145}
146#endif
147
b4b48a10 148static sigjmp_buf ill_jmp;
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MC
149static void ill_handler(int sig)
150{
151 siglongjmp(ill_jmp, sig);
152}
b4b48a10 153
2688d999 154void OPENSSL_fpu_probe(void);
70b76d39 155void OPENSSL_ppc64_probe(void);
fd054957 156void OPENSSL_altivec_probe(void);
de51e830 157void OPENSSL_crypto207_probe(void);
53385e1f 158void OPENSSL_madd300_probe(void);
70b76d39 159
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AP
160/*
161 * Use a weak reference to getauxval() so we can use it if it is available
162 * but don't break the build if it is not. Note that this is *link-time*
163 * feature detection, not *run-time*. In other words if we link with
164 * symbol present, it's expected to be present even at run-time.
165 */
166#if defined(__GNUC__) && __GNUC__>=2 && defined(__ELF__)
167extern unsigned long getauxval(unsigned long type) __attribute__ ((weak));
168#else
169static unsigned long (*getauxval) (unsigned long) = NULL;
170#endif
171
172/* I wish <sys/auxv.h> was universally available */
173#define HWCAP 16 /* AT_HWCAP */
174#define HWCAP_PPC64 (1U << 30)
175#define HWCAP_ALTIVEC (1U << 28)
176#define HWCAP_FPU (1U << 27)
177#define HWCAP_POWER6_EXT (1U << 9)
178#define HWCAP_VSX (1U << 7)
179
180#define HWCAP2 26 /* AT_HWCAP2 */
181#define HWCAP_VEC_CRYPTO (1U << 25)
e0e53282 182#define HWCAP_ARCH_3_00 (1U << 23)
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AP
183
184# if defined(__GNUC__) && __GNUC__>=2
185__attribute__ ((constructor))
186# endif
b4b48a10 187void OPENSSL_cpuid_setup(void)
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MC
188{
189 char *e;
190 struct sigaction ill_oact, ill_act;
191 sigset_t oset;
192 static int trigger = 0;
193
194 if (trigger)
195 return;
196 trigger = 1;
197
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MC
198 if ((e = getenv("OPENSSL_ppccap"))) {
199 OPENSSL_ppccap_P = strtoul(e, NULL, 0);
200 return;
201 }
b4b48a10 202
0f113f3e 203 OPENSSL_ppccap_P = 0;
6415dd7b 204
fd054957 205#if defined(_AIX)
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AP
206 OPENSSL_ppccap_P |= PPC_FPU;
207
0f113f3e
MC
208 if (sizeof(size_t) == 4) {
209 struct utsname uts;
fd054957 210# if defined(_SC_AIX_KERNEL_BITMODE)
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MC
211 if (sysconf(_SC_AIX_KERNEL_BITMODE) != 64)
212 return;
fd054957 213# endif
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MC
214 if (uname(&uts) != 0 || atoi(uts.version) < 6)
215 return;
216 }
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AP
217
218# if defined(__power_set)
219 /*
220 * Value used in __power_set is a single-bit 1<<n one denoting
221 * specific processor class. Incidentally 0xffffffff<<n can be
222 * used to denote specific processor and its successors.
223 */
224 if (sizeof(size_t) == 4) {
225 /* In 32-bit case PPC_FPU64 is always fastest [if option] */
226 if (__power_set(0xffffffffU<<13)) /* POWER5 and later */
227 OPENSSL_ppccap_P |= PPC_FPU64;
228 } else {
229 /* In 64-bit case PPC_FPU64 is fastest only on POWER6 */
230 if (__power_set(0x1U<<14)) /* POWER6 */
231 OPENSSL_ppccap_P |= PPC_FPU64;
232 }
233
234 if (__power_set(0xffffffffU<<14)) /* POWER6 and later */
235 OPENSSL_ppccap_P |= PPC_ALTIVEC;
236
237 if (__power_set(0xffffffffU<<16)) /* POWER8 and later */
238 OPENSSL_ppccap_P |= PPC_CRYPTO207;
239
e0e53282
AP
240 if (__power_set(0xffffffffU<<17)) /* POWER9 and later */
241 OPENSSL_ppccap_P |= PPC_MADD300;
242
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AP
243 return;
244# endif
245#endif
246
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AP
247#if defined(__APPLE__) && defined(__MACH__)
248 OPENSSL_ppccap_P |= PPC_FPU;
249
250 {
251 int val;
252 size_t len = sizeof(val);
253
254 if (sysctlbyname("hw.optional.64bitops", &val, &len, NULL, 0) == 0) {
255 if (val)
256 OPENSSL_ppccap_P |= PPC_FPU64;
257 }
258
259 len = sizeof(val);
260 if (sysctlbyname("hw.optional.altivec", &val, &len, NULL, 0) == 0) {
261 if (val)
262 OPENSSL_ppccap_P |= PPC_ALTIVEC;
263 }
264
265 return;
266 }
267#endif
268
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AP
269 if (getauxval != NULL) {
270 unsigned long hwcap = getauxval(HWCAP);
271
272 if (hwcap & HWCAP_FPU) {
dccd20d1 273 OPENSSL_ppccap_P |= PPC_FPU;
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AP
274
275 if (sizeof(size_t) == 4) {
276 /* In 32-bit case PPC_FPU64 is always fastest [if option] */
277 if (hwcap & HWCAP_PPC64)
278 OPENSSL_ppccap_P |= PPC_FPU64;
279 } else {
280 /* In 64-bit case PPC_FPU64 is fastest only on POWER6 */
281 if (hwcap & HWCAP_POWER6_EXT)
282 OPENSSL_ppccap_P |= PPC_FPU64;
283 }
284 }
285
286 if (hwcap & HWCAP_ALTIVEC) {
287 OPENSSL_ppccap_P |= PPC_ALTIVEC;
288
289 if ((hwcap & HWCAP_VSX) && (getauxval(HWCAP2) & HWCAP_VEC_CRYPTO))
290 OPENSSL_ppccap_P |= PPC_CRYPTO207;
291 }
292
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AP
293 if (hwcap & HWCAP_ARCH_3_00) {
294 OPENSSL_ppccap_P |= PPC_MADD300;
295 }
296
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AP
297 return;
298 }
299
300 sigfillset(&all_masked);
301 sigdelset(&all_masked, SIGILL);
302 sigdelset(&all_masked, SIGTRAP);
303#ifdef SIGEMT
304 sigdelset(&all_masked, SIGEMT);
fd054957 305#endif
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AP
306 sigdelset(&all_masked, SIGFPE);
307 sigdelset(&all_masked, SIGBUS);
308 sigdelset(&all_masked, SIGSEGV);
fd054957 309
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MC
310 memset(&ill_act, 0, sizeof(ill_act));
311 ill_act.sa_handler = ill_handler;
312 ill_act.sa_mask = all_masked;
6415dd7b 313
0f113f3e
MC
314 sigprocmask(SIG_SETMASK, &ill_act.sa_mask, &oset);
315 sigaction(SIGILL, &ill_act, &ill_oact);
6415dd7b 316
2688d999
AP
317 if (sigsetjmp(ill_jmp,1) == 0) {
318 OPENSSL_fpu_probe();
319 OPENSSL_ppccap_P |= PPC_FPU;
320
321 if (sizeof(size_t) == 4) {
78c3e205 322#ifdef __linux
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AP
323 struct utsname uts;
324 if (uname(&uts) == 0 && strcmp(uts.machine, "ppc64") == 0)
78c3e205 325#endif
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AP
326 if (sigsetjmp(ill_jmp, 1) == 0) {
327 OPENSSL_ppc64_probe();
328 OPENSSL_ppccap_P |= PPC_FPU64;
329 }
330 } else {
331 /*
332 * Wanted code detecting POWER6 CPU and setting PPC_FPU64
333 */
334 }
0f113f3e
MC
335 }
336
337 if (sigsetjmp(ill_jmp, 1) == 0) {
338 OPENSSL_altivec_probe();
339 OPENSSL_ppccap_P |= PPC_ALTIVEC;
340 if (sigsetjmp(ill_jmp, 1) == 0) {
341 OPENSSL_crypto207_probe();
342 OPENSSL_ppccap_P |= PPC_CRYPTO207;
343 }
344 }
345
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AP
346 if (sigsetjmp(ill_jmp, 1) == 0) {
347 OPENSSL_madd300_probe();
348 OPENSSL_ppccap_P |= PPC_MADD300;
349 }
350
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MC
351 sigaction(SIGILL, &ill_oact, NULL);
352 sigprocmask(SIG_SETMASK, &oset, NULL);
353}